6 years ago[X86] Don't pass the default value to the High argument of getX86SubSuperRegister...
Craig Topper [Fri, 25 Dec 2015 19:44:16 +0000 (19:44 +0000)]
[X86] Don't pass the default value to the High argument of getX86SubSuperRegister. Most place don't care about this argument. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256424 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objdump] Use stderr and not stdout for fatal errors.
Davide Italiano [Fri, 25 Dec 2015 18:16:45 +0000 (18:16 +0000)]
[llvm-objdump] Use stderr and not stdout for fatal errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256423 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] getX86SubSuperRegisterOrZero shouldn't call getX86SubSuperRegister recursively...
Craig Topper [Fri, 25 Dec 2015 17:07:32 +0000 (17:07 +0000)]
[X86] getX86SubSuperRegisterOrZero shouldn't call getX86SubSuperRegister recursively. It should call itself instead. Otherwise it might fire an assertion when it was designed not too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256422 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add missing X86II::MRM_C4, MRM_C5, etc. encodings to getMemoryOperandNo. These...
Craig Topper [Fri, 25 Dec 2015 17:07:30 +0000 (17:07 +0000)]
[X86] Add missing X86II::MRM_C4, MRM_C5, etc. encodings to getMemoryOperandNo. These aren't used by any instructions, but could be someday. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256421 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Use assert instead of if and llvm_unreachable. NFC
Craig Topper [Fri, 25 Dec 2015 17:07:27 +0000 (17:07 +0000)]
[X86] Use assert instead of if and llvm_unreachable. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256420 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Minor identation fixes. NFC
Craig Topper [Fri, 25 Dec 2015 17:07:24 +0000 (17:07 +0000)]
[X86] Minor identation fixes. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256419 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CodeGen] Use generic printAsOperand machinery instead of hand rolling it
David Majnemer [Fri, 25 Dec 2015 09:37:26 +0000 (09:37 +0000)]
[CodeGen] Use generic printAsOperand machinery instead of hand rolling it

We already know how to properly print out basic blocks in
printAsOperand, we should not roll it ourselves in
AsmPrinter::EmitBasicBlockStart.  No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256413 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[IR] Mark the Type subclass helper methods 'inline' and move their definitions to...
Craig Topper [Fri, 25 Dec 2015 04:06:20 +0000 (04:06 +0000)]
[IR] Mark the Type subclass helper methods 'inline' and move their definitions to DerivedTypes.h so they can be inlined by the compiler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256406 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Transforms] Use asserts instead of ifs around llvm_unreachable. NFC
Craig Topper [Fri, 25 Dec 2015 02:04:17 +0000 (02:04 +0000)]
[Transforms] Use asserts instead of ifs around llvm_unreachable. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256405 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.
Dan Gohman [Fri, 25 Dec 2015 00:31:02 +0000 (00:31 +0000)]
[WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.

Move RegStackify after coalescing and teach it to use LiveIntervals instead
of depending on SSA form. This avoids a problem where a register in a COPY
instruction is stackified and then subsequently coalesced with a register
that is not stackified.

This also puts it after the scheduler, which allows us to simplify the
EXPR_STACK constraint, as we no longer have instructions being reordered
after stackification and before coloring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256402 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] transform more extract/insert pairs into shuffles (PR2109)
Sanjay Patel [Thu, 24 Dec 2015 21:17:56 +0000 (21:17 +0000)]
[InstCombine] transform more extract/insert pairs into shuffles (PR2109)

This is an extension of the shuffle combining from r203229:

The idea is to widen a short input vector with undef elements so the
existing shuffle transform for extract/insert can kick in.

The motivation is to finally solve PR2109:

For that example, the IR becomes:

%1 = bitcast <2 x i32>* %P to <2 x float>*
%ld1 = load <2 x float>, <2 x float>* %1, align 8
%2 = shufflevector <2 x float> %ld1, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
%i2 = shufflevector <4 x float> %A, <4 x float> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
ret <4 x float> %i2

And x86 SSE output improves from:

movq (%rdi), %xmm1           ## xmm1 = mem[0],zero
movdqa %xmm1, %xmm2
shufps $229, %xmm2, %xmm2      ## xmm2 = xmm2[1,1,2,3]
shufps $48, %xmm0, %xmm1       ## xmm1 = xmm1[0,0],xmm0[3,0]
shufps $132, %xmm1, %xmm0      ## xmm0 = xmm0[0,1],xmm1[0,2]
shufps $32, %xmm0, %xmm2       ## xmm2 = xmm2[0,0],xmm0[2,0]
shufps $36, %xmm2, %xmm0       ## xmm0 = xmm0[0,1],xmm2[2,0]

To the almost optimal:

movhpd (%rdi), %xmm0

Note: There's a tension in the existing transform related to generating
arbitrary shufflevector masks. We avoid that in other places in InstCombine
because we're scared that codegen can't handle strange masks, but it looks
like we're ok with producing those here. I purposely chose weird insert/extract
indexes for the regression tests to see the effect in these cases.
For PowerPC+Altivec, AArch64, and X86+SSE/AVX, I think the codegen is equal or
better for these examples.

Differential Revision: http://reviews.llvm.org/D15096

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256394 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix signed/unsigned warning in Line.h.
Dave Bartolomeo [Thu, 24 Dec 2015 19:17:54 +0000 (19:17 +0000)]
Fix signed/unsigned warning in Line.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256390 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove unused constants from TypeTableBuilder.cpp.
Dave Bartolomeo [Thu, 24 Dec 2015 19:15:56 +0000 (19:15 +0000)]
Remove unused constants from TypeTableBuilder.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256389 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix case of path name
Bill Seurer [Thu, 24 Dec 2015 18:54:35 +0000 (18:54 +0000)]
Fix case of path name

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256388 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix CodeView library name and non-CMake builds
Dave Bartolomeo [Thu, 24 Dec 2015 18:51:35 +0000 (18:51 +0000)]
Fix CodeView library name and non-CMake builds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256387 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix initializer order warning in TypeRecord.h
Dave Bartolomeo [Thu, 24 Dec 2015 18:25:54 +0000 (18:25 +0000)]
Fix initializer order warning in TypeRecord.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256386 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLLVM CodeView library
Dave Bartolomeo [Thu, 24 Dec 2015 18:12:38 +0000 (18:12 +0000)]
LLVM CodeView library

Summary: This diff is the initial implementation of the LLVM CodeView library. There is much more work to be done, namely a CodeView dumper and tests. This patch should help others make progress on the LLVM->CodeView debug info emission while I continue with the implementation of the dumper and tests.

This library implements support for emitting debug info in the CodeView format. This phase of the implementation only includes support for CodeView type records. Clients that need to emit type records will use a class derived from TypeTableBuilder. TypeTableBuilder provides member functions for writing each kind of type record; each of these functions eventually calls the writeRecord virtual function to emit the actual bits of the record. Derived classes override writeRecord to implement the folding of duplicate records and the actual emission to the appropriate destination. LLVMCodeView provides MemoryTypeTableBuilder, which creates the table in memory. In the future, other classes derived from TypeTableBuilder will write to other destinations, such as the type stream in a PDB.

The rest of the types in LLVMCodeView define the actual CodeView type records and all of the supporting enums and other types used in the type records. The TypeIndex class is of particular interest, because it is used by clients as a handle to a type in the type table.

The library provides a relatively low-level interface based on the actual on-disk format of CodeView. For example, type records refer to other type records by TypeIndex, rather than by an actual pointer to the referent record. This allows clients to emit type records one at a time, rather than having to keep the entire transitive closure of type records in memory until everything has been emitted. At some point, having a higher-level interface layered on top of this one may be useful for debuggers and other tools that want a more holistic view of the debug info. The lower-level interface should be sufficient for compilers and linkers to do the debug info manipulation that they need to do efficiently.

Reviewers: rnk, majnemer

Subscribers: silvas, rnk, jevinskie, llvm-commits

Differential Revision: http://reviews.llvm.org/D14961

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256385 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][ms-inline asm] Add support for memory operands that include structs
Marina Yatsina [Thu, 24 Dec 2015 12:09:51 +0000 (12:09 +0000)]
[X86][ms-inline asm] Add support for memory operands that include structs

Add ability to reference struct symbols in memory operands.
Test case will be added on the clang side (review http://reviews.llvm.org/D15749)

Differential Revision: http://reviews.llvm.org/D15748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256381 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ProfileData] Make helper function static.
Benjamin Kramer [Thu, 24 Dec 2015 10:03:37 +0000 (10:03 +0000)]
[ProfileData] Make helper function static.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256375 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[FunctionImport] Move pass into anonymous namespace.
Benjamin Kramer [Thu, 24 Dec 2015 10:03:35 +0000 (10:03 +0000)]
[FunctionImport] Move pass into anonymous namespace.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256374 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd a missing const qualifier on the context instruction. This somehow
Chandler Carruth [Thu, 24 Dec 2015 09:08:08 +0000 (09:08 +0000)]
Add a missing const qualifier on the context instruction. This somehow
has always been missing. =/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256371 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][PKU] Add {RD,WR}PKRU encoding
Asaf Badouh [Thu, 24 Dec 2015 08:25:00 +0000 (08:25 +0000)]
[X86][PKU] Add {RD,WR}PKRU encoding

Differential Revision: http://reviews.llvm.org/D15711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256366 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX-512: Kreg set 0/1 optimization
Elena Demikhovsky [Thu, 24 Dec 2015 08:12:22 +0000 (08:12 +0000)]
AVX-512: Kreg set 0/1 optimization
The patterns that set a mask register to 0/1
KXOR %kn, %kn, %kn / KXNOR %kn, %kn, %kn
are replaced with
KXOR %k0, %k0, %kn / KXNOR %k0, %k0, %kn - AVX-512 targets optimization.

KNL does not recognize dependency-breaking idioms for mask registers,
so kxnor %k1, %k1, %k2 has a RAW dependence on %k1.
Using %k0 as the undef input register is a performance heuristic based
on the assumption that %k0 is used less frequently than the other mask
registers, since it is not usable as a write mask.

Differential Revision: http://reviews.llvm.org/D15739

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256365 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX512: VPMOVM2B/W/D/Q intrinsic implementation.
Igor Breger [Thu, 24 Dec 2015 07:11:53 +0000 (07:11 +0000)]
AVX512: VPMOVM2B/W/D/Q intrinsic implementation.

Differential Revision: http://reviews.llvm.org//D15747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256364 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse range-based for loops. NFC
Craig Topper [Thu, 24 Dec 2015 05:20:40 +0000 (05:20 +0000)]
Use range-based for loops. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256363 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Fix getRegisterBitWidth for vectors
Matt Arsenault [Thu, 24 Dec 2015 05:14:55 +0000 (05:14 +0000)]
AMDGPU: Fix getRegisterBitWidth for vectors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256362 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r256336, it caused PR25939
Nico Weber [Thu, 24 Dec 2015 04:01:06 +0000 (04:01 +0000)]
Revert r256336, it caused PR25939

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256361 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/SI: Fix encoding of flat instructions on VI
Tom Stellard [Thu, 24 Dec 2015 03:18:18 +0000 (03:18 +0000)]
AMDGPU/SI: Fix encoding of flat instructions on VI

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15735

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256360 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/SI: Remove non-existent flat instructions
Tom Stellard [Thu, 24 Dec 2015 02:41:55 +0000 (02:41 +0000)]
AMDGPU/SI: Remove non-existent flat instructions

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15734

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256357 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAddress Sanjoy's review comments to r256326
David Majnemer [Thu, 24 Dec 2015 02:31:20 +0000 (02:31 +0000)]
Address Sanjoy's review comments to r256326

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256356 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoWebAssembly: remove 'external' from test
JF Bastien [Wed, 23 Dec 2015 23:56:13 +0000 (23:56 +0000)]
WebAssembly: remove 'external' from test

Summary: Linker testing was sad at seeing an unresolved external symbol. For now don't do that: it's valid but we're not playing with multi-file linking yet, and the LLVM tests are used as hacky sanity tests for single-file linking (the GCC torture tests are much better for this purpose). Another solution would be to use '.extern' to make the intent explicit (don't simple-file link this, there's an unresolved symbol), some assemblers use '.extern' while others ignore it, so we wouldn't really be inventing anything new.

Reviewers: sunfish, kripken

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: http://reviews.llvm.org/D15753

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256353 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Statepoints] Use Indirect operands for spill slots
Philip Reames [Wed, 23 Dec 2015 23:44:28 +0000 (23:44 +0000)]
[Statepoints] Use Indirect operands for spill slots

Teach the statepoint lowering code to emit Indirect stackmap entries for spill inserted by StatepointLowering (i.e. SelectionDAG), but Direct stackmap entries for in-IR allocas which represent manual stack slots. This is what the docs call for (http://llvm.org/docs/StackMaps.html#stack-map-format), but we've been emitting both as Direct. This was pointed out recently on the mailing list as a bug. It also blocks http://reviews.llvm.org/D15632 which extends the lowering to handle vector-of-pointers since only Indirect references can encode a variable sized slot.

To implement this, I introduced a new flag on the StackObject class used to maintian information about stack slots. I original considered (and prototyped in http://reviews.llvm.org/D15632), the idea of using the existing isSpillSlot flag, but end up deciding that was a bit too risky and that the cost of adding a new flag was low. Having the new flag will also allow us - in the future - to emit better comments in verbose assembly which indicate where a particular stack spill around a call comes from. (deopt, gc, regalloc).

Differential Revision: http://reviews.llvm.org/D15759

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256352 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm-dwarfdump: Add support for dumping .dSYM bundles.
Adrian Prantl [Wed, 23 Dec 2015 21:51:13 +0000 (21:51 +0000)]
llvm-dwarfdump: Add support for dumping .dSYM bundles.

This replicates the logic of Darwin dwarfdump for manually opening up
.dSYM bundles without introducing any new dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256350 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Use stderr and not stdout for error messages.
Davide Italiano [Wed, 23 Dec 2015 19:29:34 +0000 (19:29 +0000)]
[llvm-readobj] Use stderr and not stdout for error messages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256347 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MemOperands] Clarify code around dropping memory operands [NFC]
Philip Reames [Wed, 23 Dec 2015 19:16:04 +0000 (19:16 +0000)]
[MemOperands] Clarify code around dropping memory operands [NFC]

Clarify a comment about what it means to drop memory operands from an instruction.  While I'm adding change the name of the method slightly to make it a bit more clear what's going on when reading calling code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256346 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Function] Properly remove use when clearing personality
Keno Fischer [Wed, 23 Dec 2015 18:27:23 +0000 (18:27 +0000)]
[Function] Properly remove use when clearing personality

We need to actually remove the use of the personality function,
otherwise we can run into trouble if we want to e.g. delete
the personality function because ther's no way to get rid of
its uses. Do this by resetting to ConstantPointerNull value
that the operands are set to when first allocated.

Reviewers: vsk, dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D15752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256345 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix SCEV r256338.
JF Bastien [Wed, 23 Dec 2015 18:18:53 +0000 (18:18 +0000)]
Fix SCEV r256338.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256344 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SCEV] Fix getLoopBackedgeTakenCounts
Sanjoy Das [Wed, 23 Dec 2015 17:48:14 +0000 (17:48 +0000)]
[SCEV] Fix getLoopBackedgeTakenCounts

The way `getLoopBackedgeTakenCounts` is written right now isn't
correct. It will try to compute and store the BE counts of a Loop
 #{child loop} number of times (which may be zero).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256338 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LIR] General refactoring to simplify code and the ease future code review.
Chad Rosier [Wed, 23 Dec 2015 17:29:33 +0000 (17:29 +0000)]
[LIR] General refactoring to simplify code and the ease future code review.

Move several checks into isLegalStores. Also, delineate between those stores
that are memset-able and those that are memcpy-able.

Patch by Haicheng Wu <haicheng@codeaurora.org>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256336 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MachineLICM] Fix handling of memoperands
Philip Reames [Wed, 23 Dec 2015 17:05:57 +0000 (17:05 +0000)]
[MachineLICM] Fix handling of memoperands

As far as I can tell, the correct interpretation of an empty memoperands list is that we didn't have sufficient room to store information about the MachineInstr, NOT that the MachineInstr doesn't access any particular bit of memory. This appears to be fairly consistent in a number of places, but I'm not 100% sure of this interpretation. I'd really appreciate someone more knowledgeable confirming my reading of the code.

This patch fixes two latent bugs in MachineLICM - given the above assumption - and adds comments to document the meaning and required handling. I don't have test cases; these were noticed by inspection.

Differential Revision: http://reviews.llvm.org/D15730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256335 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] Only shuffle the lower half of vectors if the upper half is undefined
Simon Pilgrim [Wed, 23 Dec 2015 13:10:07 +0000 (13:10 +0000)]
[X86][AVX] Only shuffle the lower half of vectors if the upper half is undefined

First step towards making better use of AVX's implicit zeroing of the upper half of a 256-bit vector by instructions that only act on the lower 128-bit vector - discussed on D14151.

As well as the fact that 128-bit shuffle instructions are generally more capable, this can be performant for older CPUs with 128-bit ALUs (e.g. Jaguar, Sandy Bridge) that must treat 256-bit vectors as multiple micro-ops.

Moved the similar subvector extraction shuffle combines from PerformShuffleCombine256 to lowerVectorShuffle as well.

Note: I've avoided combining shuffles that reference elements from the upper halves of the input vectors - this may be reviewed in future work as well (AVX1 would probably always gain, but AVX2 does have some cross-lane shuffle instructions).

Differential Revision: http://reviews.llvm.org/D15477

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256332 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[OperandBundles] Have GlobalsModRef play nice with operand bundles
David Majnemer [Wed, 23 Dec 2015 09:58:46 +0000 (09:58 +0000)]
[OperandBundles] Have GlobalsModRef play nice with operand bundles

A call site's use of a Value might not correspond to an argument
operand but to a bundle operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256329 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[OperandBundles] Have TailCallElim play nice with operand bundles
David Majnemer [Wed, 23 Dec 2015 09:58:43 +0000 (09:58 +0000)]
[OperandBundles] Have TailCallElim play nice with operand bundles

A call site's use of a Value might not correspond to an argument
operand but to a bundle operand.

This fixes PR25928.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256328 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[OperandBundles] Have InstCombine play nice with operand bundles
David Majnemer [Wed, 23 Dec 2015 09:58:41 +0000 (09:58 +0000)]
[OperandBundles] Have InstCombine play nice with operand bundles

Don't assume a call's use corresponds to an argument operand, it might
correspond to a bundle operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256327 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[OperandBundles] Have DeadArgElim play nice with operand bundles
David Majnemer [Wed, 23 Dec 2015 09:58:36 +0000 (09:58 +0000)]
[OperandBundles] Have DeadArgElim play nice with operand bundles

A call site's use of a Value might not correspond to an argument
operand but to a bundle operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256326 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX512BW: Enable packed word shift for 512bit vector. Enable lowering scalar immidiat...
Igor Breger [Wed, 23 Dec 2015 08:06:50 +0000 (08:06 +0000)]
AVX512BW: Enable packed word shift for 512bit vector. Enable lowering scalar immidiate shift v64i8 .Fix predicate for AVX1/2 shifts.

Differential Revision: http://reviews.llvm.org/D15713

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256324 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WinEH] Don't visit the same catchswitch twice
David Majnemer [Wed, 23 Dec 2015 03:59:04 +0000 (03:59 +0000)]
[WinEH] Don't visit the same catchswitch twice

We visited the same catchswitch twice because it was both the child of
another funclet and the predecessor of a cleanuppad.

Instead, change the numbering algorithm to only recurse if the unwind
destination of the inner funclet agrees with the unwind destination of
the catchswitch.

This fixes PR25926.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256317 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agowin: Pass /W4 in front of all the -wd flags.
Nico Weber [Wed, 23 Dec 2015 02:38:31 +0000 (02:38 +0000)]
win: Pass /W4 in front of all the -wd flags.

This should fix many many -Wunused-parameter warnings in self-host builds on
Windows after r255382.  cl.exe doesn't care about the order of /W4 and
/wd flags, but clang-cl currently does (just like -Wno-foo -Wall order
matters for clang).  We might want to change how clang-cl behaves in
the future, but until then this change makes self-host builds much more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256315 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoForm reform for MCDwarf.
Paul Robinson [Wed, 23 Dec 2015 01:57:31 +0000 (01:57 +0000)]
Form reform for MCDwarf.

MCDwarf emits a canned abbreviation table, but was not emitting proper
forms for DWARF version 4, which is the default after r249655.

Differential Revision: http://reviews.llvm.org/D15732

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256313 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GC] Make GCStrategy::isGCManagedPointer a type predicate not a value predicate ...
Philip Reames [Wed, 23 Dec 2015 01:42:15 +0000 (01:42 +0000)]
[GC] Make GCStrategy::isGCManagedPointer a type predicate not a value predicate [NFC]

1) The existing form was a form of false generality.  None of the implemented GCStrategies use anything other than a type.  Its becoming more and more clear we're going to need some type of strong GC pointer in the type system and we shouldn't pretend otherwise at this point.
2) The API was awkward when applied to vectors-of-pointers.  The old one could have been made to work, but calling isGCManagedPointer(Ty->getScalarType()) is much cleaner than the Value alternatives.
3) The rewriting implementation effectively assumes the type based predicate as well.  We should be consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256312 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUnbreak LLVM_ENABLE_THREADS=OFF builds.
Nico Weber [Wed, 23 Dec 2015 01:04:53 +0000 (01:04 +0000)]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256308 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add a TODO comment for a possible future optimization.
Dan Gohman [Wed, 23 Dec 2015 00:22:04 +0000 (00:22 +0000)]
[WebAssembly] Add a TODO comment for a possible future optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256306 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RS4GC] Fix base pair printing for constants.
Manuel Jacob [Wed, 23 Dec 2015 00:19:45 +0000 (00:19 +0000)]
[RS4GC] Fix base pair printing for constants.

Previously, "%" + name of the value was printed for each derived and base
pointer.  This is correct for instructions, but wrong for e.g. globals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256305 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoProvide a way to specify inliner's attribute compatibility and merging.
Akira Hatanaka [Tue, 22 Dec 2015 23:57:37 +0000 (23:57 +0000)]
Provide a way to specify inliner's attribute compatibility and merging.

This reapplies r256277 with two changes:

- In emitFnAttrCompatCheck, change FuncName's type to std::string to fix
  a use-after-free bug.
- Remove an unnecessary install-local target in lib/IR/Makefile.

Original commit message for r252949:

Provide a way to specify inliner's attribute compatibility and merging
rules using table-gen. NFC.

This commit adds new classes CompatRule and MergeRule to Attributes.td,
which are used to generate code to check attribute compatibility and
merge attributes of the caller and callee.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256304 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BPI] Fix two potential divide-by-zero operations that are introduced in r256263.
Cong Hou [Tue, 22 Dec 2015 23:45:55 +0000 (23:45 +0000)]
[BPI] Fix two potential divide-by-zero operations that are introduced in r256263.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256303 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDisable use list order on the gold plugin.
Rafael Espindola [Tue, 22 Dec 2015 23:45:49 +0000 (23:45 +0000)]
Disable use list order on the gold plugin.

It turns out that his is *really* slow. With this change the link of
clang with plugin-opt=emit-llvm goes from 41 to 26 seconds.

We can add an option to enable it again if needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256302 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Trim unneeded #includes. NFC.
Dan Gohman [Tue, 22 Dec 2015 23:45:21 +0000 (23:45 +0000)]
[WebAssembly] Trim unneeded #includes. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256301 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Minor code simplification. NFC.
Dan Gohman [Tue, 22 Dec 2015 23:39:16 +0000 (23:39 +0000)]
[WebAssembly] Minor code simplification. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256300 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd an OperandNamespace field to Target.td's Operand.
Dan Gohman [Tue, 22 Dec 2015 23:37:37 +0000 (23:37 +0000)]
Add an OperandNamespace field to Target.td's Operand.

For targets to add their own operand types as needed, as advertised in
Operand's comment, they need to be able to specify an alternate namespace
for OperandType names too. This matches the RegisterOperand class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256299 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[unittest] Use Support/thread.h instead of <thread> (second try)
Vedant Kumar [Tue, 22 Dec 2015 23:12:41 +0000 (23:12 +0000)]
[unittest] Use Support/thread.h instead of <thread> (second try)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256292 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agolit: Limit number of processes on Windows to 32.
Nico Weber [Tue, 22 Dec 2015 23:12:00 +0000 (23:12 +0000)]
lit: Limit number of processes on Windows to 32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256291 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[unittest] Use Support/Thread.h instead of <thread> to fix the Windows build
Vedant Kumar [Tue, 22 Dec 2015 23:09:08 +0000 (23:09 +0000)]
[unittest] Use Support/Thread.h instead of <thread> to fix the Windows build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256290 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago AMDGPU/SI: Use flat for global load/store when targeting HSA
Changpeng Fang [Tue, 22 Dec 2015 20:55:23 +0000 (20:55 +0000)]
 AMDGPU/SI: Use flat for global load/store when targeting HSA

  For some reason doing executing an MUBUF instruction with the addr64
  bit set and a zero base pointer in the resource descriptor causes
  the memory operation to be dropped when the shader is executed using
  the HSA runtime.

  This kind of MUBUF instruction is commonly used when the pointer is
  stored in VGPRs.  The base pointer field in the resource descriptor
  is set to zero and and the pointer is stored in the vaddr field.

  This patch resolves the issue by only using flat instructions for
  global memory operations when targeting HSA. This is an overly
  conservative fix as all other configurations of MUBUF instructions
  appear to work.

  NOTE: re-commit by fixing a failure in Codegen/AMDGPU/llvm.dbg.value.ll

Reviewers: tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256282 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAlso add unnamed_addr to functions.
Rafael Espindola [Tue, 22 Dec 2015 20:43:30 +0000 (20:43 +0000)]
Also add unnamed_addr to functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256281 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r256277 and r256279.
Akira Hatanaka [Tue, 22 Dec 2015 20:29:09 +0000 (20:29 +0000)]
Revert r256277 and r256279.

Some of the bots failed again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256280 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd a .td file I forgot to add in r256277.
Akira Hatanaka [Tue, 22 Dec 2015 20:06:50 +0000 (20:06 +0000)]
Add a .td file I forgot to add in r256277.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256279 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoProvide a way to specify inliner's attribute compatibility and merging.
Akira Hatanaka [Tue, 22 Dec 2015 20:00:05 +0000 (20:00 +0000)]
Provide a way to specify inliner's attribute compatibility and merging.

This reapplies r252990 and r252949. I've added member function getKind
to the Attr classes which returns the enum or string of the attribute.

Original commit message for r252949:

Provide a way to specify inliner's attribute compatibility and merging
rules using table-gen. NFC.

This commit adds new classes CompatRule and MergeRule to Attributes.td,
which are used to generate code to check attribute compatibility and
merge attributes of the caller and callee.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256277 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDelete dead GlobalAliases.
Rafael Espindola [Tue, 22 Dec 2015 19:50:22 +0000 (19:50 +0000)]
Delete dead GlobalAliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256276 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "AMDGPU/SI: Use flat for global load/store when targeting HSA"
Rafael Espindola [Tue, 22 Dec 2015 19:46:44 +0000 (19:46 +0000)]
Revert "AMDGPU/SI: Use flat for global load/store when targeting HSA"

This reverts commit r256273.

It broke CodeGen/AMDGPU/llvm.dbg.value.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256275 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMerge duplicated code.
Rafael Espindola [Tue, 22 Dec 2015 19:38:07 +0000 (19:38 +0000)]
Merge duplicated code.

The code for deleting dead global variables and functions was

This is in preparation for also deleting dead global aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256274 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/SI: Use flat for global load/store when targeting HSA
Changpeng Fang [Tue, 22 Dec 2015 19:32:28 +0000 (19:32 +0000)]
AMDGPU/SI: Use flat for global load/store when targeting HSA

  For some reason doing executing an MUBUF instruction with the addr64
  bit set and a zero base pointer in the resource descriptor causes
  the memory operation to be dropped when the shader is executed using
  the HSA runtime.

  This kind of MUBUF instruction is commonly used when the pointer is
  stored in VGPRs.  The base pointer field in the resource descriptor
  is set to zero and and the pointer is stored in the vaddr field.

  This patch resolves the issue by only using flat instructions for
  global memory operations when targeting HSA. This is an overly
  conservative fix as all other configurations of MUBUF instructions
  appear to work.

Reviewers: tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256273 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse early continue to reduce indentation.
Rafael Espindola [Tue, 22 Dec 2015 19:26:18 +0000 (19:26 +0000)]
Use early continue to reduce indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256272 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSimplify iterator management. NFC.
Rafael Espindola [Tue, 22 Dec 2015 19:16:50 +0000 (19:16 +0000)]
Simplify iterator management. NFC.

Not passing an iterator to processGlobal will allow it to work with
other GlobalValues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256271 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd advice on choosing reviewers
Paul Robinson [Tue, 22 Dec 2015 18:59:02 +0000 (18:59 +0000)]
Add advice on choosing reviewers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256265 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BPI] Replace weights by probabilities in BPI.
Cong Hou [Tue, 22 Dec 2015 18:56:14 +0000 (18:56 +0000)]
[BPI] Replace weights by probabilities in BPI.

This patch removes all weight-related interfaces from BPI and replace
them by probability versions. With this patch, we won't use edge weight
anymore in either IR or MC passes. Edge probabilitiy is a better
representation in terms of CFG update and validation.

Differential revision: http://reviews.llvm.org/D15519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256263 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove deprecated llvm.experimental.gc.result.{int,float,ptr} intrinsics.
Manuel Jacob [Tue, 22 Dec 2015 18:44:45 +0000 (18:44 +0000)]
Remove deprecated llvm.experimental.gc.result.{int,float,ptr} intrinsics.

These were deprecated 11 months ago when a generic
llvm.experimental.gc.result intrinsic, which works for all types, was added.

Reviewers: sanjoy, reames

Subscribers: sanjoy, chenli, llvm-commits

Differential Revision: http://reviews.llvm.org/D15719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256262 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Allow multiple paired calls to {start,stop}Timer()
Vedant Kumar [Tue, 22 Dec 2015 17:36:17 +0000 (17:36 +0000)]
[Support] Allow multiple paired calls to {start,stop}Timer()

Differential Revision: http://reviews.llvm.org/D15619

Reviewed-by: rafael
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256258 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RS4GC] Fix crash in the case that a live variable has a constant base.
Manuel Jacob [Tue, 22 Dec 2015 16:50:44 +0000 (16:50 +0000)]
[RS4GC] Fix crash in the case that a live variable has a constant base.

Previously, RS4GC crashed in CreateGCRelocates() because it assumed
that every base is also in the array of live variables, which isn't true if a
live variable has a constant base.

This change fixes the crash by making sure CreateGCRelocates() won't try to
relocate a live variable with a constant base.  This would be unnecessary
anyway because anything with a constant base won't move.

Reviewers: reames

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D15556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256252 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Promote loads from stored
Jun Bum Lim [Tue, 22 Dec 2015 16:36:16 +0000 (16:36 +0000)]
[AArch64] Promote loads from stored

This is a recommit of r256004 which was reverted in r256160. The issue was the
incorrect promotion for half and byte loads transformed into mov instructions.
This fix will replace half and byte type loads only with bit field extracts.

Original commit message:

This change promotes load instructions which directly read from stored by
replacing them with mov instructions. If the store is wider than the load,
the load will be replaced with a bitfield extract.
For example :
  STRWui %W1, %X0, 1
  %W0 = LDRHHui %X0, 3
  STRWui %W1, %X0, 1
  %W0 = UBFMWri %W1, 16, 31

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256249 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTypo. NFC.
Chad Rosier [Tue, 22 Dec 2015 15:06:47 +0000 (15:06 +0000)]
Typo. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256242 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Add rcp14 and rsqrt14 intrinsics
Asaf Badouh [Tue, 22 Dec 2015 11:40:04 +0000 (11:40 +0000)]
[X86][AVX512] Add rcp14 and rsqrt14 intrinsics

Differential Revision: http://reviews.llvm.org/D15414

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256237 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ASMPrinter] Fix missing handling of DW_OP_bit_piece
Keno Fischer [Tue, 22 Dec 2015 07:14:50 +0000 (07:14 +0000)]
[ASMPrinter] Fix missing handling of DW_OP_bit_piece

In r256077, I added printing for DIExpressions in DEBUG_VALUE comments,
but neglected to handle DW_OP_bit_piece operands. Thanks to
Mikael Holmen and Joerg Sonnenberger for spotting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256236 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[libFuzzer] add AFL-style dictionary for C++, remove the old file with tokens
Kostya Serebryany [Tue, 22 Dec 2015 01:50:51 +0000 (01:50 +0000)]
[libFuzzer] add AFL-style dictionary for C++, remove the old file with tokens

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256229 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC] Don't use the architecture to govern which object file format to use
David Majnemer [Tue, 22 Dec 2015 01:39:04 +0000 (01:39 +0000)]
[MC] Don't use the architecture to govern which object file format to use

InitMCObjectFileInfo was trying to override the triple in awkward ways.
For example, a triple specifying COFF but not Windows was forced as ELF.
This makes it easy for internal invariants to get violated, such as
those which triggered PR25912.

This fixes PR25912.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256226 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoPartial fix for PR25912, see comment 13. Should fix the sanitizer bootstrap bot
Kostya Serebryany [Tue, 22 Dec 2015 01:18:49 +0000 (01:18 +0000)]
Partial fix for PR25912, see comment 13. Should fix the sanitizer bootstrap bot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256225 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoHandle empty Subprogram list when linking metadata.
Teresa Johnson [Tue, 22 Dec 2015 01:17:19 +0000 (01:17 +0000)]
Handle empty Subprogram list when linking metadata.

Use an iterator that handles an empty subprogram list.

Fixes PR25915.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256224 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDetermine callee's hotness and adjust threshold based on that. NFC.
Easwaran Raman [Tue, 22 Dec 2015 00:32:35 +0000 (00:32 +0000)]
Determine callee's hotness and adjust threshold based on that. NFC.

This uses the same criteria used in CFE's CodeGenPGO to identify hot and cold
callees and uses values of inlinehint-threshold and inlinecold-threshold
respectively as the thresholds for such callees.

Differential Revision: http://reviews.llvm.org/D15245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256222 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[safestack] Add option for non-TLS unsafe stack pointer.
Evgeniy Stepanov [Tue, 22 Dec 2015 00:13:11 +0000 (00:13 +0000)]
[safestack] Add option for non-TLS unsafe stack pointer.

This patch adds an option, -safe-stack-no-tls, for using normal
storage instead of thread-local storage for the unsafe stack pointer.
This can be useful when SafeStack is applied to an operating system


Patch by Michael LeMay.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256221 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Fix another comdat related issue for COFF
Xinliang David Li [Tue, 22 Dec 2015 00:11:15 +0000 (00:11 +0000)]
[PGO] Fix another comdat related issue for COFF

The linker requires that a comdat section must be associated
with a another comdat section that precedes it. This
means the comdat section's name needs to use the  profile name
var's name.

Patch tested by Johan Engelen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256220 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Timer: Use emplace_back() and range-based loops (NFC)
Vedant Kumar [Mon, 21 Dec 2015 23:41:38 +0000 (23:41 +0000)]
[Support] Timer: Use emplace_back() and range-based loops (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256217 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Timer: simplify the init() method
Vedant Kumar [Mon, 21 Dec 2015 23:27:44 +0000 (23:27 +0000)]
[Support] Timer: simplify the init() method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256215 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AVR] Added configuration file and machine function information class
Dylan McKay [Mon, 21 Dec 2015 23:13:15 +0000 (23:13 +0000)]
[AVR] Added configuration file and machine function information class

This commit adds the 'AVRMachineFunctionInfo' class, which simply stores
basic properties about generated machine functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256213 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix line endings after r256155. NFC.
Eric Christopher [Mon, 21 Dec 2015 23:04:27 +0000 (23:04 +0000)]
Fix line endings after r256155. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256211 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix test case comment (NFC)
Xinliang David Li [Mon, 21 Dec 2015 22:26:49 +0000 (22:26 +0000)]
Fix test case comment (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256206 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cfi] Fix LowerBitSets on 32-bit targets.
Evgeniy Stepanov [Mon, 21 Dec 2015 22:14:04 +0000 (22:14 +0000)]
[cfi] Fix LowerBitSets on 32-bit targets.

This code attempts to truncate IntPtrTy to i32, which may be the same

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256205 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC, COFF] Support link /incremental conditionally
David Majnemer [Mon, 21 Dec 2015 22:09:27 +0000 (22:09 +0000)]
[MC, COFF] Support link /incremental conditionally

Today, we always take into account the possibility that object files
produced by MC may be consumed by an incremental linker.  This results
in us initialing fields which vary with time (TimeDateStamp) which harms
hermetic builds (e.g. verifying a self-host went well) and produces
sub-optimal code because we cannot assume anything about the relative
position of functions within a section (call sites can get redirected
through incremental linker thunks).

Let's provide an MCTargetOption which controls this behavior so that we
can disable this functionality if we know a-priori that the build will
not rely on /incremental.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256203 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoEnhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst
Jun Bum Lim [Mon, 21 Dec 2015 22:00:51 +0000 (22:00 +0000)]
Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst

This is recommit of r256028 with minor fixes in unittests:

Original commit message:

When identifying blocks post-dominated by an unreachable-terminated block
in BranchProbabilityInfo, consider only the edge to the normal destination
block if the terminator is InvokeInst and let calcInvokeHeuristics() decide
edge weights for the InvokeInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256202 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoResubmit r256193 with test fix: assertion failure analyzed
Xinliang David Li [Mon, 21 Dec 2015 21:52:27 +0000 (21:52 +0000)]
Resubmit r256193 with test fix: assertion failure analyzed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256201 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r256193: build bot failure triggered
Xinliang David Li [Mon, 21 Dec 2015 21:00:33 +0000 (21:00 +0000)]
Revert r256193: build bot failure triggered

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256198 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Transform truncations between vectors of integers into X86ISD::PACKUS...
Cong Hou [Mon, 21 Dec 2015 20:42:43 +0000 (20:42 +0000)]
[X86][SSE] Transform truncations between vectors of integers into X86ISD::PACKUS/PACKSS operations during DAG combine.

This patch transforms truncation between vectors of integers into
X86ISD::PACKUS/PACKSS operations during DAG combine. We don't do it in
lowering phase because after type legalization, the original truncation
will be turned into a BUILD_VECTOR with each element that is extracted
from a vector and then truncated, and from them it is difficult to do
this optimization. This greatly improves the performance of truncations
on some specific types.

Cost table is updated accordingly.

Differential revision: http://reviews.llvm.org/D14588

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256194 91177308-0d34-0410-b5e6-96231b3b80d8