7 years agoFinish removing DestroySource.
Rafael Espindola [Tue, 23 Dec 2014 19:16:45 +0000 (19:16 +0000)]
Finish removing DestroySource.

Fixes pr21901.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224782 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDIBuilder: Similar to createPointerType, make createMemberPointerType take
Adrian Prantl [Tue, 23 Dec 2014 19:11:47 +0000 (19:11 +0000)]
DIBuilder: Similar to createPointerType, make createMemberPointerType take
a size and alignment. Several assertions in DwarfDebug rely on all variable
types to report back a size, or to be derived from a type with a size.

Tested in CFE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224780 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAlways assert in DAGCombine and not only when -debug is enabled
Mehdi Amini [Tue, 23 Dec 2014 18:59:02 +0000 (18:59 +0000)]
Always assert in DAGCombine and not only when -debug is enabled

Right now in DAG Combine check the validity of the returned type
only when -debug is given on the command line. However usually
the test cases in the validation does not use -debug.
An Assert build should always check this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224779 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPass LSAN_OPTIONS down so that it is possible to add suppressions.
Rafael Espindola [Tue, 23 Dec 2014 18:39:02 +0000 (18:39 +0000)]
Pass LSAN_OPTIONS down so that it is possible to add suppressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224777 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a leak found by asan.
Rafael Espindola [Tue, 23 Dec 2014 18:18:37 +0000 (18:18 +0000)]
Fix a leak found by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224776 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding word loads.
Colin LeMahieu [Tue, 23 Dec 2014 18:06:56 +0000 (18:06 +0000)]
[Hexagon] Adding word loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224775 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding signed halfword loads.
Colin LeMahieu [Tue, 23 Dec 2014 17:25:57 +0000 (17:25 +0000)]
[Hexagon] Adding signed halfword loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224774 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a leak found by asan.
Rafael Espindola [Tue, 23 Dec 2014 17:20:23 +0000 (17:20 +0000)]
Fix a leak found by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224773 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding unsigned halfword load.
Colin LeMahieu [Tue, 23 Dec 2014 16:42:57 +0000 (16:42 +0000)]
[Hexagon] Adding unsigned halfword load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224772 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement LWSP and SWSP instructions
Jozef Kolek [Tue, 23 Dec 2014 16:16:33 +0000 (16:16 +0000)]
[mips][microMIPS] Implement LWSP and SWSP instructions

Differential Revision: http://reviews.llvm.org/D6416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224771 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[OCaml] PR22014: OCaml bindings didn't link to libLLVM-*.so with -Wl,--as-needed
Peter Zotov [Tue, 23 Dec 2014 13:09:59 +0000 (13:09 +0000)]
[OCaml] PR22014: OCaml bindings didn't link to libLLVM-*.so with -Wl,--as-needed

Patch by Evangelos Foutras <evangelos@foutrelis.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224766 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] Move GlobalAlias handling to be after the max depth check in computeK...
Michael Kuperstein [Tue, 23 Dec 2014 11:33:41 +0000 (11:33 +0000)]
[ValueTracking] Move GlobalAlias handling to be after the max depth check in computeKnownBits()

GlobalAlias handling used to be after GlobalValue handling, which meant it was, in practice, dead code. r220165 moved GlobalAlias handling to be before GlobalValue handling, but also moved it to be before the max depth check, causing an assert due to a recursion depth limit violation.

This moves GlobalAlias handling forward to where it's safe, and changes the GlobalValue handling to only look at GlobalObjects.

Differential Revision: http://reviews.llvm.org/D6758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224765 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targets
Elena Demikhovsky [Tue, 23 Dec 2014 10:30:39 +0000 (10:30 +0000)]
AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targets

by Asaf Badouh


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224764 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Don't mark the return-address slot as immutable
Hal Finkel [Tue, 23 Dec 2014 09:45:06 +0000 (09:45 +0000)]
[PowerPC] Don't mark the return-address slot as immutable

It is tempting to mark the fixed stack slot used to store the return address as
immutable when lowering @llvm.returnaddress(i32 0). Unfortunately, within the
function, it is not completely immutable: it is written during the function
prologue. When using post-RA instruction scheduling, the prologue instructions
are available for scheduling, and we're not free to interchange the order of a
particular store in the prologue with loads from that stack location.

Fixes PR21976.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224761 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: BLENDM - fixed encoding of the broadcast version
Elena Demikhovsky [Tue, 23 Dec 2014 09:36:28 +0000 (09:36 +0000)]
AVX-512: BLENDM - fixed encoding of the broadcast version
Added more intrinsics and encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224760 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DagCombine] Improve DAGCombiner BUILD_VECTOR when it has two sources of elements
Michael Kuperstein [Tue, 23 Dec 2014 08:59:45 +0000 (08:59 +0000)]
[DagCombine] Improve DAGCombiner BUILD_VECTOR when it has two sources of elements

This partially fixes PR21943.

For AVX, we go from:

vmovq   (%rsi), %xmm0
vmovq   (%rdi), %xmm1
vpermilps       $-27, %xmm1, %xmm2 ## xmm2 = xmm1[1,1,2,3]
vinsertps       $16, %xmm2, %xmm1, %xmm1 ## xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
vinsertps       $32, %xmm0, %xmm1, %xmm1 ## xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
vpermilps       $-27, %xmm0, %xmm0 ## xmm0 = xmm0[1,1,2,3]
vinsertps       $48, %xmm0, %xmm1, %xmm0 ## xmm0 = xmm1[0,1,2],xmm0[0]

To the expected:

vmovq   (%rdi), %xmm0
vmovhpd (%rsi), %xmm0, %xmm0

Fixing this for AVX2 is still open.

Differential Revision: http://reviews.llvm.org/D6749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224759 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Don't attempt a 64-bit pow2 division on PPC32
Hal Finkel [Tue, 23 Dec 2014 08:38:50 +0000 (08:38 +0000)]
[PowerPC] Don't attempt a 64-bit pow2 division on PPC32

In r224033, in moving the signed power-of-2 division expansion into
BuildSDIVPow2, I accidentally made it possible to attempt the lowering for a
64-bit division on PPC32. This later asserts.

Fixes PR21928.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224758 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SimplifyCFG] Revise common code sinking
Michael Liao [Tue, 23 Dec 2014 08:26:55 +0000 (08:26 +0000)]
[SimplifyCFG] Revise common code sinking

- Fix the case where more than 1 common instructions derived from the same
  operand cannot be sunk. When a pair of value has more than 1 derived values
  in both branches, only 1 derived value could be sunk.
- Replace BB1 -> (BB2, PN) map with joint value map, i.e.
  map of (BB1, BB2) -> PN, which is more accurate to track common ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224757 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove a bad cast in CloneModule()
Michael Kuperstein [Tue, 23 Dec 2014 08:23:45 +0000 (08:23 +0000)]
Remove a bad cast in CloneModule()

A cast that was introduced in r209007 was accidentally left in after the changes made to GlobalAlias rules in r210062. This crashes if the aliasee is a now-leggal ConstantExpr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224756 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Don't break alignment when combining base updates into load/stores.
Ahmed Bougacha [Tue, 23 Dec 2014 06:07:31 +0000 (06:07 +0000)]
[ARM] Don't break alignment when combining base updates into load/stores.

r223862/r224203 tried to also combine base-updating load/stores.
There was a mistake there: the alignment was added as is as an operand to
the ARMISD::VLD/VST node.  However, the VLD/VST selection logic doesn't care
about less-than-standard alignment attributes.
For example, no matter the alignment of a v2i64 load (say 1), SelectVLD picks
VLD1q64 (because of the memory type).  But VLD1q64 ("vld1.64 {dXX, dYY}") is
8-aligned, per ARMARMv7a 3.2.1.
For the 1-aligned load, what we really want is VLD1q8.

This commit introduces bitcasts if necessary, and changes the vld/vst type to
one whose standard alignment matches the original load/store alignment.

Differential Revision: http://reviews.llvm.org/D6759

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224754 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix UBSan bootstrap: replace shift of negative value with multiplication.
Alexey Samsonov [Tue, 23 Dec 2014 04:15:53 +0000 (04:15 +0000)]
Fix UBSan bootstrap: replace shift of negative value with multiplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224752 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix UBSan bootstrap: don't bind reference to nullptr.
Alexey Samsonov [Tue, 23 Dec 2014 04:15:47 +0000 (04:15 +0000)]
Fix UBSan bootstrap: don't bind reference to nullptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224751 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r224739: Debug info: Teach SROA how to update debug info for
Chandler Carruth [Tue, 23 Dec 2014 02:58:14 +0000 (02:58 +0000)]
Revert r224739: Debug info: Teach SROA how to update debug info for
fragmented variables.

This caused codegen to start crashing when we built somewhat large
programs with debug info and optimizations. 'check-msan' hit in, and
I suspect a bootstrap would as well. I mailed a test case to the
review thread.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224750 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86: Don't over-align combined loads.
Jim Grosbach [Tue, 23 Dec 2014 00:35:23 +0000 (00:35 +0000)]
X86: Don't over-align combined loads.

When combining consecutive loads+inserts into a single vector load,
we should keep the alignment of the base load. Doing otherwise can, and does,
lead to using overly aligned instructions. In the included test case, for
example, using a 32-byte vmovaps on a 16-byte aligned value. Oops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224746 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake musttail more robust for vector types on x86
Reid Kleckner [Mon, 22 Dec 2014 23:58:37 +0000 (23:58 +0000)]
Make musttail more robust for vector types on x86

Previously I tried to plug musttail into the existing vararg lowering
code. That turned out to be a mistake, because non-vararg calls use
significantly different register lowering, even on x86. For example, AVX
vectors are usually passed in registers to normal functions and memory
to vararg functions.  Now musttail uses a completely separate lowering.

Hopefully this can be used as the basis for non-x86 perfect forwarding.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D6156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224745 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove dynamic allocation/indirection from GCOVBlocks owned by GCOVFunction
David Blaikie [Mon, 22 Dec 2014 23:12:42 +0000 (23:12 +0000)]
Remove dynamic allocation/indirection from GCOVBlocks owned by GCOVFunction

Since these are all created in the DenseMap before they are referenced,
there's no problem with pointer validity by the time it's required. This
removes another use of DeleteContainerSeconds/manual memory management
which I'm cleaning up from time to time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224744 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThumb1 frame lowering: Mark CFI instructions with the FrameSetup flag.
Adrian Prantl [Mon, 22 Dec 2014 23:09:14 +0000 (23:09 +0000)]
Thumb1 frame lowering: Mark CFI instructions with the FrameSetup flag.

Followup to r224294:

ARM/AArch64: Attach the FrameSetup MIFlag to CFI instructions.
Debug info marks the first instruction without the FrameSetup flag
as being the end of the function prologue. Any CFI instructions in the
middle of the function prologue would cause debug info to end the prologue
too early and worse, attach the line number of the CFI instruction, which
incidentally is often 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224743 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SROA] Lift the logic for traversing the alloca slices one partition at
Chandler Carruth [Mon, 22 Dec 2014 22:46:00 +0000 (22:46 +0000)]
[SROA] Lift the logic for traversing the alloca slices one partition at
a time into a partition iterator and a Partition class.

There is a lot of knock-on simplification that this enables, largely
stemming from having a Partition object to refer to in lots of helpers.
I've only done a minimal amount of that because enoguh stuff is changing
as-is in this commit.

This shouldn't change any observable behavior. I've worked hard to
preserve the *exact* traversal semantics which were originally present
even though some of them make no sense. I'll be changing some of this in
subsequent commits now that the logic is carefully factored into
a reusable place.

The primary motivation for this change is to break the rewriting into
phases in order to support more intelligent rewriting. For example, I'm
planning to change how split loads and stores are rewritten to remove
the significant overuse of integer bit packing in the resulting code and
allow more effective secondary splitting of aggregates. For any of this
to work, they have to share the exact traversal logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224742 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LCSSA] Handle PHI insertion in disjoint loops
Bruno Cardoso Lopes [Mon, 22 Dec 2014 22:35:46 +0000 (22:35 +0000)]
[LCSSA] Handle PHI insertion in disjoint loops

Take two disjoint Loops L1 and L2.

LoopSimplify fails to simplify some loops (e.g. when indirect branches
are involved). In such situations, it can happen that an exit for L1 is
the header of L2. Thus, when we create PHIs in one of such exits we are
also inserting PHIs in L2 header.

This could break LCSSA form for L2 because these inserted PHIs can also
have uses in L2 exits, which are never handled in the current
implementation. Provide a fix for this corner case and test that we
don't assert/crash on that.

Differential Revision: http://reviews.llvm.org/D6624


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224740 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebug info: Teach SROA how to update debug info for fragmented variables.
Adrian Prantl [Mon, 22 Dec 2014 22:26:00 +0000 (22:26 +0000)]
Debug info: Teach SROA how to update debug info for fragmented variables.
This allows us to generate debug info for extremely advanced code such as

  typedef struct { long int a; int b;} S;

  int foo(S s) {
    return s.b;

which at -O1 on x86_64 is codegen'd into

  define i32 @foo(i64 %s.coerce0, i32 %s.coerce1) #0 {
    ret i32 %s.coerce1, !dbg !24

with this patch we emit the following debug info for this

  TAG_formal_parameter [3]
    AT_location( 0x00000000
                 0x0000000000000000 - 0x0000000000000006: rdi, piece 0x00000008, rsi, piece 0x00000004
                 0x0000000000000006 - 0x0000000000000008: rdi, piece 0x00000008, rax, piece 0x00000004 )
                 AT_name( "s" )
                 AT_decl_file( "/Volumes/Data/llvm/_build.ninja.release/test.c" )

Thanks to chandlerc, dblaikie, and echristo for their feedback on all
previous iterations of this patch!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224739 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix Windows unwind info for functions in sections other than .text
Reid Kleckner [Mon, 22 Dec 2014 22:10:08 +0000 (22:10 +0000)]
Fix Windows unwind info for functions in sections other than .text

Previously we assumed the section name had the form .text$foo, which is
what we used to do for inline functions. If the dollar wasn't present,
we'd put unwind data in the .pdata and .xdata sections for the main
.text section, which is incorrect.

Fixes PR22001.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224738 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
Colin LeMahieu [Mon, 22 Dec 2014 21:40:43 +0000 (21:40 +0000)]
[Hexagon] Adding memb instruction.  Fixing whitespace in test from 224730.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224735 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse iterators rather than indices to make this forwards-compatible with a change...
David Blaikie [Mon, 22 Dec 2014 21:26:38 +0000 (21:26 +0000)]
Use iterators rather than indices to make this forwards-compatible with a change to the underlying container (to std::list)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224734 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agounique_ptrify MatchableInfo(const CodeGenInstAlias *Alias)'s parameter
David Blaikie [Mon, 22 Dec 2014 21:26:26 +0000 (21:26 +0000)]
unique_ptrify MatchableInfo(const CodeGenInstAlias *Alias)'s parameter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224733 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding classes and load unsigned byte instruction, updating usages.
Colin LeMahieu [Mon, 22 Dec 2014 21:20:03 +0000 (21:20 +0000)]
[Hexagon] Adding classes and load unsigned byte instruction, updating usages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224730 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Add vector @llvm.ctpop intrinsic custom lowering
Bruno Cardoso Lopes [Mon, 22 Dec 2014 19:45:43 +0000 (19:45 +0000)]
[x86] Add vector @llvm.ctpop intrinsic custom lowering

Currently, when ctpop is supported for scalar types, the expansion of
@llvm.ctpop.vXiY uses vector element extractions, insertions and individual
calls to @llvm.ctpop.iY. When not, expansion with bit-math operations is used
for the scalar calls.

Local haswell measurements show that we can improve vector @llvm.ctpop.vXiY
expansion in some cases by using a using a vector parallel bit twiddling
approach, based on:

v = v - ((v >> 1) & 0x55555555);
v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
v = ((v + (v >> 4) & 0xF0F0F0F)
v = v + (v >> 8)
v = v + (v >> 16)
v = v & 0x0000003F
(from http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel)

When scalar ctpop isn't supported, the approach above performs better for
v2i64, v4i32, v4i64 and v8i32 (see numbers below). And even when scalar ctpop
is supported, this approach performs ~2x better for v8i32.

Here, x86_64 implies -march=corei7-avx without ctpop and x86_64h includes ctpop
support with -march=core-avx2.

== [x86_64h - new]
v8i32: 0.661685
v4i32: 0.514678
v4i64: 0.652009
v2i64: 0.324289
== [x86_64h - old]
v8i32: 1.29578
v4i32: 0.528807
v4i64: 0.65981
v2i64: 0.330707

== [x86_64 - new]
v8i32: 1.003
v4i32: 0.656273
v4i64: 1.11711
v2i64: 0.754064
== [x86_64 - old]
v8i32: 2.34886
v4i32: 1.72053
v4i64: 1.41086
v2i64: 1.0244

More work for other vector types will come next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224725 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused header. NFC.
Juergen Ributzka [Mon, 22 Dec 2014 19:09:15 +0000 (19:09 +0000)]
Remove unused header. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224722 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a C++ marker to this header file.
Adrian Prantl [Mon, 22 Dec 2014 19:07:45 +0000 (19:07 +0000)]
Add a C++ marker to this header file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224721 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[C API] Expose LLVMGetGlobalValueAddress and LLVMGetFunctionAddress.
Peter Zotov [Mon, 22 Dec 2014 18:53:11 +0000 (18:53 +0000)]
[C API] Expose LLVMGetGlobalValueAddress and LLVMGetFunctionAddress.

Patch by Ramkumar Ramachandra <artagnon@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224720 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrepare] Handle properly the promotion of operands when this does not
Quentin Colombet [Mon, 22 Dec 2014 18:11:52 +0000 (18:11 +0000)]
[CodeGenPrepare] Handle properly the promotion of operands when this does not
generate instructions.

Fixes PR21978.
Related to <rdar://problem/18310086>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224717 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Added all forms of BLENDM instructions,
Elena Demikhovsky [Mon, 22 Dec 2014 13:52:48 +0000 (13:52 +0000)]
AVX-512: Added all forms of BLENDM instructions,
intrinsics, encoding tests for AVX-512F and skx instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224707 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLower multiply-negate operation to mneg on AArch64
Karthik Bhat [Mon, 22 Dec 2014 13:38:58 +0000 (13:38 +0000)]
Lower multiply-negate operation to mneg on AArch64

This patch pattern matches code such as-
neg  w8, w8
mul  w8, w9, w8
mneg  w8, w8, w9

Review: http://reviews.llvm.org/D6754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224706 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConvert a few tests to FileCheck. NFC.
Rafael Espindola [Mon, 22 Dec 2014 13:29:46 +0000 (13:29 +0000)]
Convert a few tests to FileCheck. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe leak detector is dead, long live asan and valgrind.
Rafael Espindola [Mon, 22 Dec 2014 13:00:36 +0000 (13:00 +0000)]
The leak detector is dead, long live asan and valgrind.

In resent times asan and valgrind have found way more memory management bugs
in llvm than the special purpose leak detector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224703 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: minor style tweaks to SSP
Saleem Abdulrasool [Sun, 21 Dec 2014 21:52:38 +0000 (21:52 +0000)]
CodeGen: minor style tweaks to SSP

Clean up some style related things in the StackProtector CodeGen.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224693 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add hasSideEffects = 0 to CALLpcrel16. This matches what is inferred from patte...
Craig Topper [Sun, 21 Dec 2014 20:05:06 +0000 (20:05 +0000)]
[X86] Add hasSideEffects = 0 to CALLpcrel16. This matches what is inferred from patterns for the 32-bit version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224692 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEnable (sext x) == C --> x == (trunc C) combine
Matt Arsenault [Sun, 21 Dec 2014 16:48:42 +0000 (16:48 +0000)]
Enable (sext x) == C --> x == (trunc C) combine

Extend the existing code which handles this for zext. This makes this
more useful for targets with ZeroOrNegativeOne BooleanContent and
obsoletes a custom combine SI uses for i1 setcc (sext(i1), 0, setne)
since the constant will now be shrunk to i1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224691 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Swap operand order in Intel syntax on a bunch of aliases.
Craig Topper [Sat, 20 Dec 2014 23:05:59 +0000 (23:05 +0000)]
[X86] Swap operand order in Intel syntax on a bunch of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224687 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Swap operand order of imul aliases in Intel syntax. Also disable printing of...
Craig Topper [Sat, 20 Dec 2014 23:05:57 +0000 (23:05 +0000)]
[X86] Swap operand order of imul aliases in Intel syntax. Also disable printing of the alias instead of the real instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224686 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove '*' from asm strings in far call/jump aliases for Intel syntax.
Craig Topper [Sat, 20 Dec 2014 23:05:55 +0000 (23:05 +0000)]
[X86] Remove '*' from asm strings in far call/jump aliases for Intel syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224685 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Don't swap the order of segment and offset in immediate form of far call/jump...
Craig Topper [Sat, 20 Dec 2014 23:05:52 +0000 (23:05 +0000)]
[X86] Don't swap the order of segment and offset in immediate form of far call/jump in Intel syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224684 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: constify and use range loop for SSP
Saleem Abdulrasool [Sat, 20 Dec 2014 21:37:51 +0000 (21:37 +0000)]
CodeGen: constify and use range loop for SSP

Use range-based for loop and constify the iterators.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224683 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: further improve deprecated diagnosis (LDM)
Saleem Abdulrasool [Sat, 20 Dec 2014 20:25:36 +0000 (20:25 +0000)]
ARM: further improve deprecated diagnosis (LDM)

The ARM ARM states:
    The SP can be in the list. However, ARM deprecates using these instructions
    with SP in the list.

    ARM deprecates using these instructions with both the LR and the PC in the

    The SP can be in the list. However, instructions that include the SP in the
    list are deprecated.

    Instructions that include both the LR and the PC in the list are deprecated.

    The SP can only be in the list before ARMv7. ARM deprecates any use of ARM
    instructions that include the SP, and the value of the SP after such an
    instruction is UNKNOWN.

    ARM deprecates the use of this instruction with both the LR and the PC in
    the list.

Attempt to diagnose use of deprecated forms of these instructions.  This mirrors
the previous changes to diagnose use of the deprecated forms of STM in ARM mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224682 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agostrnlen isn't available on some platforms, use StringRef instead
David Majnemer [Sat, 20 Dec 2014 08:24:43 +0000 (08:24 +0000)]
strnlen isn't available on some platforms, use StringRef instead

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224679 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Immediate forms of far call/jump are not valid in x86-64.
Craig Topper [Sat, 20 Dec 2014 07:43:27 +0000 (07:43 +0000)]
[X86] Immediate forms of far call/jump are not valid in x86-64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224678 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis should have been part of r224676.
David Majnemer [Sat, 20 Dec 2014 04:48:34 +0000 (04:48 +0000)]
This should have been part of r224676.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224677 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Squash an icmp+select into bitwise arithmetic
David Majnemer [Sat, 20 Dec 2014 04:45:35 +0000 (04:45 +0000)]
InstCombine: Squash an icmp+select into bitwise arithmetic

(X & INT_MIN) == 0 ? X ^ INT_MIN : X  into  X | INT_MIN
(X & INT_MIN) != 0 ? X ^ INT_MIN : X  into  X & INT_MAX

This fixes PR21993.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224676 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstSimplify: Don't bother if getScalarSizeInBits returns zero
David Majnemer [Sat, 20 Dec 2014 04:45:33 +0000 (04:45 +0000)]
InstSimplify: Don't bother if getScalarSizeInBits returns zero

getScalarSizeInBits returns zero when the comparison operands are not
integral.  No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224675 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify the code
David Majnemer [Sat, 20 Dec 2014 03:29:59 +0000 (03:29 +0000)]
Simplify the code

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224673 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSplit executeShTest into two parts so that it can be better leveraged by libc++
Eric Fiselier [Sat, 20 Dec 2014 03:23:53 +0000 (03:23 +0000)]
Split executeShTest into two parts so that it can be better leveraged by libc++

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224672 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstSimplify: Optimize away pointless comparisons
David Majnemer [Sat, 20 Dec 2014 03:04:38 +0000 (03:04 +0000)]
InstSimplify: Optimize away pointless comparisons

(X & INT_MIN) ? X & INT_MAX : X  into  X & INT_MAX
(X & INT_MIN) ? X : X & INT_MAX  into  X
(X & INT_MIN) ? X | INT_MIN : X  into  X
(X & INT_MIN) ? X : X | INT_MIN  into  X | INT_MIN

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224669 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SROA] Run clang-format over the entire SROA pass as I wrote it before
Chandler Carruth [Sat, 20 Dec 2014 02:39:18 +0000 (02:39 +0000)]
[SROA] Run clang-format over the entire SROA pass as I wrote it before
much of the glory of clang-format, and now any time I touch it I risk
introducing formatting changes as part of a functional commit.

Also, clang-format is *way* better at formatting my code than I am.
Most of this is a huge improvement although I reverted a couple of
places where I hit a clang-format bug with lambdas that has been filed
but not (fully) fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224666 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Change the test added in r223774 to first check the spelling of
Chandler Carruth [Sat, 20 Dec 2014 02:19:22 +0000 (02:19 +0000)]
[x86] Change the test added in r223774 to first check the spelling of
the error message for a bogus processor, and then look specifically for
that error message using FileCheck.

I actually tried to write the test this way at first, but drew a blank
on how to ensure the error message stayed in sync (oops). Now that I've
recalled how to do that, this is clearly better.

It also fixes an issue with a malloc implementation that actually prints
to stderr in all cases, which was causing problems for some builders it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224665 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveIntervalAnalysis: No kill flags for partially undefined uses.
Matthias Braun [Sat, 20 Dec 2014 01:54:50 +0000 (01:54 +0000)]
LiveIntervalAnalysis: No kill flags for partially undefined uses.

We must not add kill flags when reading a vreg with some undefined
subregisters, if subreg liveness tracking is enabled.  This is because
the register allocator may reuse these undefined subregisters for other
values which are not killed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224664 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveIntervalAnalysis: cleanup addKills(), NFC
Matthias Braun [Sat, 20 Dec 2014 01:54:48 +0000 (01:54 +0000)]
LiveIntervalAnalysis: cleanup addKills(), NFC

- Use more const modifiers
- Use references for things that can't be nullptr
- Improve some variable names

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224663 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUnbreak cmake build with shared libraries enabled.
Matthias Braun [Sat, 20 Dec 2014 01:51:02 +0000 (01:51 +0000)]
Unbreak cmake build with shared libraries enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224661 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused variable and initialization.
Eric Christopher [Sat, 20 Dec 2014 00:07:09 +0000 (00:07 +0000)]
Remove unused variable and initialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224655 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused variable, initializer, and accessor.
Eric Christopher [Fri, 19 Dec 2014 23:46:53 +0000 (23:46 +0000)]
Remove unused variable, initializer, and accessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224650 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Remove outdated comment
Matt Arsenault [Fri, 19 Dec 2014 23:29:13 +0000 (23:29 +0000)]
R600: Remove outdated comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224648 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMasked load and store codegen - fixed 128-bit vectors
Elena Demikhovsky [Fri, 19 Dec 2014 23:27:57 +0000 (23:27 +0000)]
Masked load and store codegen - fixed 128-bit vectors
The codegen failed on 128-bit types on AVX2.
I added patterns and in td files and tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224647 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Only form min/max with 1 use.
Matt Arsenault [Fri, 19 Dec 2014 23:15:30 +0000 (23:15 +0000)]
R600/SI: Only form min/max with 1 use.

If the condition is used for something else, this increases
the number of instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224646 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEH: Sink computation of local PadMap variable into function that uses it
Reid Kleckner [Fri, 19 Dec 2014 22:30:08 +0000 (22:30 +0000)]
EH: Sink computation of local PadMap variable into function that uses it

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224635 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIT] Add JSONMetricValue type to wrap types supported by the json encoder.
Eric Fiselier [Fri, 19 Dec 2014 22:29:12 +0000 (22:29 +0000)]
[LIT] Add JSONMetricValue type to wrap types supported by the json encoder.

The following types can be encoded and decoded by the json library:
`dict`, `list`, `tuple`, `str`, `unicode`, `int`, `long`, `float`, `bool`, `NoneType`.

`JSONMetricValue` can be constructed with any of these types, and used as part of Test.Result.
This patch also adds a toMetricValue function that converts a value into a MetricValue.

Reviewers: ddunbar, EricWF

Reviewed By: EricWF

Subscribers: cfe-commits, llvm-commits

Differential Revision: http://reviews.llvm.org/D6576

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224628 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd printing the LC_ROUTINES load commands with llvm-objdump’s -private-headers.
Kevin Enderby [Fri, 19 Dec 2014 22:25:22 +0000 (22:25 +0000)]
Add printing the LC_ROUTINES load commands with llvm-objdump’s -private-headers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224627 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd the ExceptionHandling::MSVC enumeration
Reid Kleckner [Fri, 19 Dec 2014 22:19:48 +0000 (22:19 +0000)]
Add the ExceptionHandling::MSVC enumeration

It is intended to be used for a family of personality functions that
have similar IR preparation requirements. Typically when interoperating
with MSVC personality functions, bits of functionality need to be
outlined from the main function into helper functions. There is also
usually more than one landing pad per invoke, which does not match the
LLVM IR landingpad representation.

None of this is implemented yet. This change just adds a new enum that
is active for *-windows-msvc and delegates to the EH removal preparation
pass.  No functionality change for other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224625 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoModel sqrtss as a binary operation with one source operand tied to the destination...
Sanjay Patel [Fri, 19 Dec 2014 22:16:28 +0000 (22:16 +0000)]
Model sqrtss as a binary operation with one source operand tied to the destination (PR14221)

This is a continuation of r167064 ( http://llvm.org/viewvc/llvm-project?view=revision&revision=167064 ).
That patch started to fix PR14221 ( http://llvm.org/bugs/show_bug.cgi?id=14221 ), but it was not completed.

Differential Revision: http://reviews.llvm.org/D6330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224624 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: isLegalOperand() shouldn't check constant bus for SALU instructions
Tom Stellard [Fri, 19 Dec 2014 22:15:37 +0000 (22:15 +0000)]
R600/SI: isLegalOperand() shouldn't check constant bus for SALU instructions

The constant bus restrictions only apply to VALU instructions.  This
enables SIFoldOperands to fold immediates into SALU instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224623 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
Tom Stellard [Fri, 19 Dec 2014 22:15:30 +0000 (22:15 +0000)]
R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand

mubuf instructions now define the soffset field using the SCSrc_32
register class which indicates that only SGPRs and inline constants
are allowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224622 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove isSubroutineType test for isCompositeType, getTag() is enough.
Yaron Keren [Fri, 19 Dec 2014 22:15:09 +0000 (22:15 +0000)]
Remove isSubroutineType test for isCompositeType, getTag() is enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224621 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate SmallPtrSet::insert's doc comment to match the new return type
David Blaikie [Fri, 19 Dec 2014 21:45:11 +0000 (21:45 +0000)]
Update SmallPtrSet::insert's doc comment to match the new return type

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224619 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd printing the LC_SUB_CLIENT load command with llvm-objdump’s -private-headers.
Kevin Enderby [Fri, 19 Dec 2014 21:06:24 +0000 (21:06 +0000)]
Add printing the LC_SUB_CLIENT load command with llvm-objdump’s -private-headers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224616 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: do not attempt to invalidate virtual registers for zero-sized phis.
Peter Collingbourne [Fri, 19 Dec 2014 20:50:07 +0000 (20:50 +0000)]
CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224615 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Removing old variants of instructions and updating references.
Colin LeMahieu [Fri, 19 Dec 2014 20:29:29 +0000 (20:29 +0000)]
[Hexagon] Removing old variants of instructions and updating references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224612 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agomerge consecutive stores of extracted vector elements
Sanjay Patel [Fri, 19 Dec 2014 20:23:41 +0000 (20:23 +0000)]
merge consecutive stores of extracted vector elements

Add a path to DAGCombiner::MergeConsecutiveStores()
to combine multiple scalar stores when the store operands
are extracted vector elements. This is a partial fix for
PR21711 ( http://llvm.org/bugs/show_bug.cgi?id=21711 ).

For the new test case, codegen improves from:

   vmovss  %xmm0, (%rdi)
   vextractps      $1, %xmm0, 4(%rdi)
   vextractps      $2, %xmm0, 8(%rdi)
   vextractps      $3, %xmm0, 12(%rdi)
   vextractf128    $1, %ymm0, %xmm0
   vmovss  %xmm0, 16(%rdi)
   vextractps      $1, %xmm0, 20(%rdi)
   vextractps      $2, %xmm0, 24(%rdi)
   vextractps      $3, %xmm0, 28(%rdi)


   vmovups %ymm0, (%rdi)

Patch reviewed by Nadav Rotem.

Differential Revision: http://reviews.llvm.org/D6698

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224611 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding bit extraction and table indexing instructions.
Colin LeMahieu [Fri, 19 Dec 2014 20:01:08 +0000 (20:01 +0000)]
[Hexagon] Adding bit extraction and table indexing instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224610 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding bit insertion instructions.
Colin LeMahieu [Fri, 19 Dec 2014 19:54:38 +0000 (19:54 +0000)]
[Hexagon] Adding bit insertion instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224609 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding more xtype shift instructions.
Colin LeMahieu [Fri, 19 Dec 2014 19:51:35 +0000 (19:51 +0000)]
[Hexagon] Adding more xtype shift instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224608 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd printing the LC_SUB_LIBRARY load command with llvm-objdump’s -private-headers.
Kevin Enderby [Fri, 19 Dec 2014 19:48:16 +0000 (19:48 +0000)]
Add printing the LC_SUB_LIBRARY load command with llvm-objdump’s -private-headers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224607 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding xtype shift instructions.
Colin LeMahieu [Fri, 19 Dec 2014 19:34:50 +0000 (19:34 +0000)]
[Hexagon] Adding xtype shift instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224604 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding transfers to and from control registers.
Colin LeMahieu [Fri, 19 Dec 2014 19:06:32 +0000 (19:06 +0000)]
[Hexagon] Adding transfers to and from control registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224599 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding doubleregs for control registers. Renaming control register class.
Colin LeMahieu [Fri, 19 Dec 2014 18:56:10 +0000 (18:56 +0000)]
[Hexagon] Adding doubleregs for control registers.  Renaming control register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224598 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DebugInfo] Move all DWARF headers to the public include directory.
Frederic Riss [Fri, 19 Dec 2014 18:26:33 +0000 (18:26 +0000)]
[DebugInfo] Move all DWARF headers to the public include directory.

dsymutil needs access to DWARF specific inforamtion, the small DIContext
wrapper isn't sufficient. Other DWARF consumers might want to use it too
(I'm looking at you lldb).

Differential Revision: http://reviews.llvm.org/D6694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224594 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BBVectorize] Remove two more redundant assignments.
Tilmann Scheller [Fri, 19 Dec 2014 17:21:38 +0000 (17:21 +0000)]
[BBVectorize] Remove two more redundant assignments.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224590 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BBVectorize] Remove redundant assignment.
Tilmann Scheller [Fri, 19 Dec 2014 17:13:12 +0000 (17:13 +0000)]
[BBVectorize] Remove redundant assignment.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224589 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply: [InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr
Bruno Cardoso Lopes [Fri, 19 Dec 2014 17:12:35 +0000 (17:12 +0000)]
Reapply: [InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr

The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. Also, fix code to also return the modified switch when only
the truncation is performed.

This fixes an assertion crash.

Differential Revision: http://reviews.llvm.org/D6644


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224588 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVectorize] Remove redundant assignment.
Tilmann Scheller [Fri, 19 Dec 2014 17:02:31 +0000 (17:02 +0000)]
[LoopVectorize] Remove redundant assignment.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224587 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Remove dead assignment.
Tilmann Scheller [Fri, 19 Dec 2014 16:57:33 +0000 (16:57 +0000)]
[ARM] Remove dead assignment.

Found by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224586 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse -0.0 when creating an fneg instruction
Sanjay Patel [Fri, 19 Dec 2014 16:44:08 +0000 (16:44 +0000)]
use -0.0 when creating an fneg instruction

Backends recognize (-0.0 - X) as the canonical form for fneg
and produce better code. Eg, ppc64 with 0.0:

   lis r2, ha16(LCPI0_0)
   lfs f0, lo16(LCPI0_0)(r2)
   fsubs f1, f0, f1

vs. -0.0:

   fneg f1, f1

Differential Revision: http://reviews.llvm.org/D6723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224583 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr"
Bruno Cardoso Lopes [Fri, 19 Dec 2014 14:36:24 +0000 (14:36 +0000)]
Revert "[InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr"

Reverts commit r224574 to appease buildbots:

The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. This fixes an assertion crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224576 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr
Bruno Cardoso Lopes [Fri, 19 Dec 2014 14:23:15 +0000 (14:23 +0000)]
[InstCombine] Fix visitSwitchInst to use right operand types for sub cstexpr

The visitSwitchInst generates SUB constant expressions to recompute the
switch condition. When truncating the condition to a smaller type, SUB
expressions should use the previous type (before trunc) for both
operands. This fixes an assertion crash.

Differential Revision: http://reviews.llvm.org/D6644


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224574 91177308-0d34-0410-b5e6-96231b3b80d8