9 years agotest-release.sh: Correct the logged configure command to match the one actually issued.
Daniel Sanders [Thu, 4 Dec 2014 11:00:09 +0000 (11:00 +0000)]
test-release.sh: Correct the logged configure command to match the one actually issued.

--disable-timestamps was added to the configure command way back in r142647 but
the command that echos this command to the log was not updated at the time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223351 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse DomTree in MachineSink to sink over diamonds.
Patrik Hagglund [Thu, 4 Dec 2014 10:36:42 +0000 (10:36 +0000)]
Use DomTree in MachineSink to sink over diamonds.

According to a previous FIXME comment we now not only look at MBB
successors, but also handle code sinking past them:

  x = computation
  if () {} else {}
  use x

The instruction could be sunk over the whole diamond for the
if/then/else (or loop, etc), allowing it to be sunk into other blocks
after that.

Modified test added in r204522, due to one spill less present.

Minor fixes in comments.

Patch provided by Jonas Paulsson. Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223350 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[InstCombine] Minor optimization for bswap with binary ops
Simon Pilgrim [Thu, 4 Dec 2014 09:44:01 +0000 (09:44 +0000)]
[InstCombine] Minor optimization for bswap with binary ops

Added instcombine optimizations for BSWAP with AND/OR/XOR ops:

OP( BSWAP(x), BSWAP(y) ) -> BSWAP( OP(x, y) )

Since its just a one liner, I've also added BSWAP to the DAGCombiner equivalent as well:

fold (OP (bswap x), (bswap y)) -> (bswap (OP x, y))

Refactored bswap-fold tests to use FileCheck instead of just checking that the bswaps had gone.

Differential Revision: http://reviews.llvm.org/D6407

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223349 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMasked Load / Store Intrinsics - the CodeGen part.
Elena Demikhovsky [Thu, 4 Dec 2014 09:40:44 +0000 (09:40 +0000)]
Masked Load / Store Intrinsics - the CodeGen part.
I'm recommiting the codegen part of the patch.
The vectorizer part will be send to review again.

Masked Vector Load and Store Intrinsics.
Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores.
Added SDNodes for masked operations and lowering patterns for X86 code generator.
<16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask)
declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask)

Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223348 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRestrict somewhat the memory-allocation pointer cmp opt from r223093
Hal Finkel [Thu, 4 Dec 2014 09:22:28 +0000 (09:22 +0000)]
Restrict somewhat the memory-allocation pointer cmp opt from r223093

Based on review comments from Richard Smith, restrict this optimization from
applying to globals that might resolve lazily to other dynamically-loaded
modules, and also from dynamic allocas (which might be transformed into malloc
calls). In short, take extra care that the compared-to pointer is really
simultaneously live with the memory allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223347 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd missing test file
Jean-Daniel Dupas [Thu, 4 Dec 2014 09:20:13 +0000 (09:20 +0000)]
Add missing test file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223346 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoclang-formatted ranged loops and assignment, NFC.
Yaron Keren [Thu, 4 Dec 2014 08:30:39 +0000 (08:30 +0000)]
clang-formatted ranged loops and assignment, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223344 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd mach-o LC_RPATH support to llvm-objdump
Jean-Daniel Dupas [Thu, 4 Dec 2014 07:37:02 +0000 (07:37 +0000)]
Add mach-o LC_RPATH support to llvm-objdump

Summary: Add rpath load command support in Mach-O object and update llvm-objdump to use it.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223343 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Clean up whitespace as well as minor coding style
Michael Liao [Thu, 4 Dec 2014 05:20:33 +0000 (05:20 +0000)]
[X86] Clean up whitespace as well as minor coding style

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223339 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Add missing test dependency and use a more canonical target name."
Rafael Espindola [Thu, 4 Dec 2014 04:33:32 +0000 (04:33 +0000)]
Revert "Add missing test dependency and use a more canonical target name."

This reverts commit r223336.

NAKAMURA Takumi did the same thing in r223332!

Sorry about the noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223337 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd missing test dependency and use a more canonical target name.
Rafael Espindola [Thu, 4 Dec 2014 04:30:56 +0000 (04:30 +0000)]
Add missing test dependency and use a more canonical target name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223336 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Adding lit exception if Hexagon isn't built.
Colin LeMahieu [Thu, 4 Dec 2014 04:28:38 +0000 (04:28 +0000)]
[Hexagon] Adding lit exception if Hexagon isn't built.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223335 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests.
Colin LeMahieu [Thu, 4 Dec 2014 03:41:21 +0000 (03:41 +0000)]
[Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223334 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIntroduce "llvm-ranlib" as a name of targets since Object/archive-symtab.test require...
NAKAMURA Takumi [Thu, 4 Dec 2014 01:34:11 +0000 (01:34 +0000)]
Introduce "llvm-ranlib" as a name of targets since Object/archive-symtab.test requires llvm-ranlib.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223332 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSort by alphabetical order.
NAKAMURA Takumi [Thu, 4 Dec 2014 01:27:53 +0000 (01:27 +0000)]
Sort by alphabetical order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223331 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Restore X86 base pointer after call to llvm.eh.sjlj.setjmp
Michael Liao [Thu, 4 Dec 2014 00:56:38 +0000 (00:56 +0000)]
[X86] Restore X86 base pointer after call to llvm.eh.sjlj.setjmp

Commit on

- This patch fixes the bug described in

The fix allocates an extra slot just below the GPRs and stores the base pointer
there. This is done only for functions containing llvm.eh.sjlj.setjmp that also
need a base pointer. Because code containing llvm.eh.sjlj.setjmp saves all of
the callee-save GPRs in the prologue, the offset to the extra slot can be
computed before prologue generation runs.

Impact at run-time on affected functions is::

  - One extra store in the prologue, The store saves the base pointer.
  - One extra load after a llvm.eh.sjlj.setjmp. The load restores the base pointer.

Because the extra slot is just above a gap between frame-pointer-relative and
base-pointer-relative chunks of memory, there is no impact on other offset
calculations other than ensuring there is room for the extra slot.


Patch by Arch Robison <arch.robison@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223329 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] 'cc' should be an alias only to 'cr0'
Hal Finkel [Thu, 4 Dec 2014 00:46:20 +0000 (00:46 +0000)]
[PowerPC] 'cc' should be an alias only to 'cr0'

We had mistakenly believed that GCC's 'cc' referred to the entire
condition-code register (cr0 through cr7) -- and implemented this in r205630 to
fix PR19326, but 'cc' is actually an alias only to 'cr0'. This is causing LLVM
to clobber too much with legacy code with inline asm using the 'cc' clobber.

Fixes PR21451.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223328 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMinor typo and link fixes for Statepoint documentation
Philip Reames [Thu, 4 Dec 2014 00:45:23 +0000 (00:45 +0000)]
Minor typo and link fixes for Statepoint documentation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223327 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHexagonMCInst.h: Qualify constants explicitly to appease msc17.
NAKAMURA Takumi [Thu, 4 Dec 2014 00:26:39 +0000 (00:26 +0000)]
HexagonMCInst.h: Qualify constants explicitly to appease msc17.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223325 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFor copy, cmake needs the full path to llvm-ar.
Rafael Espindola [Thu, 4 Dec 2014 00:23:58 +0000 (00:23 +0000)]
For copy, cmake needs the full path to llvm-ar.

This should fix the windows build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223324 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAllow target to specify prefix for labels
Matt Arsenault [Thu, 4 Dec 2014 00:06:57 +0000 (00:06 +0000)]
Allow target to specify prefix for labels

Use the MCAsmInfo instead of the DataLayout, and allow
specifying a custom prefix for labels specifically. HSAIL
requires that labels begin with @, but global symbols with &.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223323 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoA few more checks for gc.statepoints in the Verifier
Philip Reames [Thu, 4 Dec 2014 00:01:48 +0000 (00:01 +0000)]
A few more checks for gc.statepoints in the Verifier

This is simply a grab bag of unrelated checks:
- A statepoint call can't be marked readonly or readnone
- We don't currently support inline asm or varadic target functions.  Both could be supported, but don't currently work.
- I forgot to check that the number of call arguments actually matched the wrapped callee in my previous change.  Included here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223322 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd missing dependency on llvm-ar. Should hopefully fix the bots.
Rafael Espindola [Thu, 4 Dec 2014 00:00:36 +0000 (00:00 +0000)]
Add missing dependency on llvm-ar. Should hopefully fix the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223321 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] Fix inline asm memory operands not to use r0
Hal Finkel [Wed, 3 Dec 2014 23:40:13 +0000 (23:40 +0000)]
[PowerPC] Fix inline asm memory operands not to use r0

On PowerPC, inline asm memory operands might be expanded as 0($r), where $r is
a register containing the address. As a result, this register cannot be r0, and
we need to enforce this register subclass constraint to prevent miscompiling
the code (we'd get this constraint for free with the usual instruction
definitions, but that scheme has no knowledge of how we end up printing inline
asm memory operands, and so here we need to do it 'by hand'). We can accomplish
this within the current address-mode selection framework by introducing an
explicit COPY_TO_REGCLASS node.

Fixes PR21443.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223318 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[RegAllocFast] Handle implicit definitions conservatively.
Quentin Colombet [Wed, 3 Dec 2014 23:38:08 +0000 (23:38 +0000)]
[RegAllocFast] Handle implicit definitions conservatively.

Prior to this commit, physical registers defined implicitly were considered free
right after their definition, i.e.. like dead definitions. Therefore, their uses
had to immediately follow their definitions, otherwise the related register may
be reused to allocate a virtual register.

This commit fixes this assumption by keeping implicit definitions alive until
they are actually used. The downside is that if the implicit definition was dead
(and not marked at such), we block an otherwise available register. This is
however conservatively correct and makes the fast register allocator much more
robust in particular regarding the scheduling of the instructions.

Fixes PR21700.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223317 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoThis reverts commit r223306 and r223277.
Rafael Espindola [Wed, 3 Dec 2014 23:29:34 +0000 (23:29 +0000)]
This reverts commit r223306 and  r223277.

The code is using uninitialized memory and failing on linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223315 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[msan] allow -fsanitize-coverage=N together with -fsanitize=memory, llvm part
Kostya Serebryany [Wed, 3 Dec 2014 23:28:26 +0000 (23:28 +0000)]
[msan] allow -fsanitize-coverage=N together with -fsanitize=memory, llvm part

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223312 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTest commit.
Jacques Pienaar [Wed, 3 Dec 2014 23:21:02 +0000 (23:21 +0000)]
Test commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223310 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake llvm-ar a real build target and install it.
Rafael Espindola [Wed, 3 Dec 2014 23:17:24 +0000 (23:17 +0000)]
Make llvm-ar a real build target and install it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223309 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a test-case for lit xunit output
Chris Matthews [Wed, 3 Dec 2014 23:01:35 +0000 (23:01 +0000)]
Add a test-case for lit xunit output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223307 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove tests for llvm-objdump for universal files to X86 directory to fix build bots.
Kevin Enderby [Wed, 3 Dec 2014 23:00:16 +0000 (23:00 +0000)]
Move tests for llvm-objdump for universal files to X86 directory to fix build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223306 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDon't allow test-suite names with . in them in xml output
Chris Matthews [Wed, 3 Dec 2014 22:59:15 +0000 (22:59 +0000)]
Don't allow test-suite names with . in them in xml output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223305 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSplit the set of identified struct types into opaque and non-opaque ones.
Rafael Espindola [Wed, 3 Dec 2014 22:36:37 +0000 (22:36 +0000)]
Split the set of identified struct types into opaque and non-opaque ones.

The non-opaque part can be structurally uniqued. To keep this to just
a hash lookup, we don't try to unique cyclic types.

Also change the type mapping algorithm to be optimistic about a type
not being recursive and only create a new type when proven to be wrong.
This is not as strong as trying to speculate that we can keep the source
type, but is simpler (no speculation to revert) and more powerfull
than what we had before (we don't copy non-recursive types at least).

I initially wrote this to try to replace the name based type merging.
It is not strong enough to replace it, but is is a useful addition.

With this patch the number of named struct types is a clang lto bootstrap goes
from 49674 to 15986.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223278 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd support to llvm-objdump for Mach-O universal files and archives with -macho.
Kevin Enderby [Wed, 3 Dec 2014 22:29:40 +0000 (22:29 +0000)]
Add support to llvm-objdump for Mach-O universal files and archives with -macho.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223277 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agofix typos, grammar, formatting; NFC
Sanjay Patel [Wed, 3 Dec 2014 22:28:05 +0000 (22:28 +0000)]
fix typos, grammar, formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223276 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoStrength Verifier checks around the types involved in a statepoint
Philip Reames [Wed, 3 Dec 2014 22:23:24 +0000 (22:23 +0000)]
Strength Verifier checks around the types involved in a statepoint

Add checks that the types in a gc.statepoint sequence match the wrapper callee and that relocating a pointer doesn't change it's type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223275 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agocorrect spelling, NFC
Matthias Braun [Wed, 3 Dec 2014 22:10:39 +0000 (22:10 +0000)]
correct spelling, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223274 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SimplifyLibCalls] Improve double->float shrinking to consider constants
Matthias Braun [Wed, 3 Dec 2014 21:46:33 +0000 (21:46 +0000)]
[SimplifyLibCalls] Improve double->float shrinking to consider constants

This allows cases like float x; fmin(1.0, x); to be optimized to fminf(1.0f, x);


Differential Revision: http://reviews.llvm.org/D6496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223270 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SimplifyLibCalls] Enable double to float shrinking for copysign
Matthias Braun [Wed, 3 Dec 2014 21:46:29 +0000 (21:46 +0000)]
[SimplifyLibCalls] Enable double to float shrinking for copysign


Differential Revision: http://reviews.llvm.org/D6495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223269 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Converting member InstrDesc to static variable.
Colin LeMahieu [Wed, 3 Dec 2014 21:40:25 +0000 (21:40 +0000)]
[Hexagon] Converting member InstrDesc to static variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223268 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix grammar-o.
Nico Weber [Wed, 3 Dec 2014 20:58:23 +0000 (20:58 +0000)]
Fix grammar-o.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223265 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Converting subclass members to an implicit operand.
Colin LeMahieu [Wed, 3 Dec 2014 20:23:22 +0000 (20:23 +0000)]
[Hexagon] Converting subclass members to an implicit operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223264 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agorange-for some things
David Blaikie [Wed, 3 Dec 2014 19:58:49 +0000 (19:58 +0000)]
range-for some things

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223263 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSimplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing an iterat...
David Blaikie [Wed, 3 Dec 2014 19:58:48 +0000 (19:58 +0000)]
Simplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing an iterator rather than index

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223262 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSimplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vecto...
David Blaikie [Wed, 3 Dec 2014 19:58:45 +0000 (19:58 +0000)]
Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*>

This complicates a few algorithms due to not having random access, but
not by a huge degree I don't think (open to debate/design

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223261 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRange-for some stuff related to RegClasses, and comment cases where range-for isn...
David Blaikie [Wed, 3 Dec 2014 19:58:41 +0000 (19:58 +0000)]
Range-for some stuff related to RegClasses, and comment cases where range-for isn't suitable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223260 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake the Verifier more strict about gc.statepoints
Philip Reames [Wed, 3 Dec 2014 19:53:15 +0000 (19:53 +0000)]
Make the Verifier more strict about gc.statepoints

The recently added documentation for statepoints claimed that we checked the parameters of the various intrinsics for validity.  This patch adds the code to actually do so.  I also removed a couple of redundant checks for conditions which are checked elsewhere in the Verifier and simplified the logic using the helper functions from Statepoint.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223259 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd TableGen info for Power8.
Will Schmidt [Wed, 3 Dec 2014 18:46:30 +0000 (18:46 +0000)]
Add TableGen info for Power8.
This is based on the Power7 version, with units added and renamed to match P8.

Differential Revision: http://reviews.llvm.org/D6358

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223257 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChange the name to be in style.
Roman Divacky [Wed, 3 Dec 2014 18:39:44 +0000 (18:39 +0000)]
Change the name to be in style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223255 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix sphinx error from Statepoints.rst
Matt Arsenault [Wed, 3 Dec 2014 18:35:11 +0000 (18:35 +0000)]
Fix sphinx error from Statepoints.rst

It was complaining it wasn't included in any toctree

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223254 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()
Tom Stellard [Wed, 3 Dec 2014 18:27:08 +0000 (18:27 +0000)]
R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()

This pass needs to be run after PrologEpilogInserter, because
that pass may inserter spill code which reads or writes memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223253 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Don't run SI passes on R600 subtargets
Tom Stellard [Wed, 3 Dec 2014 18:27:05 +0000 (18:27 +0000)]
R600/SI: Don't run SI passes on R600 subtargets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223252 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAArch64: fix wrong-endian parameter passing.
Tim Northover [Wed, 3 Dec 2014 17:49:26 +0000 (17:49 +0000)]
AArch64: fix wrong-endian parameter passing.

The blocked arguments code didn't take account of the hacks needed to support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223247 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[NFC] Fixing pendantic warning extra semicolons.
Colin LeMahieu [Wed, 3 Dec 2014 17:36:39 +0000 (17:36 +0000)]
[NFC] Fixing pendantic warning extra semicolons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223246 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] [NFC] Moving function implementations out of header. Clang-formatting...
Colin LeMahieu [Wed, 3 Dec 2014 17:35:39 +0000 (17:35 +0000)]
[Hexagon] [NFC] Moving function implementations out of header.  Clang-formatting files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223245 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix test to use the right metadata node (reapply r223239 plus a fix) and also to...
Nick Lewycky [Wed, 3 Dec 2014 17:32:44 +0000 (17:32 +0000)]
Fix test to use the right metadata node (reapply r223239 plus a fix) and also to use the correct path to the GCNO file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223244 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] [NFC] Renaming *packetStart to *packetBegin
Colin LeMahieu [Wed, 3 Dec 2014 17:31:43 +0000 (17:31 +0000)]
[Hexagon] [NFC] Renaming *packetStart to *packetBegin

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223243 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r223239, which broke some bots.
Alexander Potapenko [Wed, 3 Dec 2014 16:03:08 +0000 (16:03 +0000)]
Revert r223239, which broke some bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223240 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix the metadata number used by llvm.gcov to match the number of the inserted metadat...
Alexander Potapenko [Wed, 3 Dec 2014 15:15:58 +0000 (15:15 +0000)]
Fix the metadata number used by llvm.gcov to match the number of the inserted metadata node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223239 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSilencing several "multiple copy constructors" warnings from MSVC; NFC.
Aaron Ballman [Wed, 3 Dec 2014 14:44:16 +0000 (14:44 +0000)]
Silencing several "multiple copy constructors" warnings from MSVC; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223238 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSilencing a 32-bit implicit conversion warning in MSVC; NFC.
Aaron Ballman [Wed, 3 Dec 2014 14:39:58 +0000 (14:39 +0000)]
Silencing a 32-bit implicit conversion warning in MSVC; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223237 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agomsan] Add compile-time checks for missing origins.
Evgeniy Stepanov [Wed, 3 Dec 2014 14:15:53 +0000 (14:15 +0000)]
msan] Add compile-time checks for missing origins.

This change makes MemorySanitizer instrumentation a bit more strict
about instructions that have no origin id assigned to them.

This would have caught the bug that was fixed in r222918.

This is re-commit of r222997, reverted in r223211, with 3 more
missing origins added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223236 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInstCombine: simplify signed range checks
Erik Eckstein [Wed, 3 Dec 2014 10:39:15 +0000 (10:39 +0000)]
InstCombine: simplify signed range checks

Try to convert two compares of a signed range check into a single unsigned compare.
(icmp sge x, 0) & (icmp slt x, n) --> icmp ult x, n
(icmp slt x, 0) | (icmp sgt x, n) --> icmp ugt x, n

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223224 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] Print all inline-asm consts as signed numbers
Hal Finkel [Wed, 3 Dec 2014 09:37:50 +0000 (09:37 +0000)]
[PowerPC] Print all inline-asm consts as signed numbers

Almost all immediates in PowerPC assembly (both 32-bit and 64-bit) are signed
numbers, and it is important that we print them as such. To make sure that
happens, we change PPCTargetLowering::LowerAsmOperandForConstraint so that it
does all intermediate checks on a signed-extended int64_t value, and then
creates the resulting target constant using MVT::i64. This will ensure that all
negative values are printed as negative values (mirroring what is done in other
backends to achieve the same sign-extension effect).

This came up in the context of inline assembly like this:
  "add%I2   %0,%0,%2", ..., "Ir"(-1ll)
where we used to print:
  addi   3,3,4294967295
and gcc would print:
  addi   3,3,-1
and gas accepts both forms, but our builtin assembler (correctly) does not. Now
we print -1 like gcc does.

While here, I replaced a bunch of custom integer checks with isInt<16> and
friends from MathExtras.h.

Thanks to Paul Hargrove for the bug report.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223220 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoEmit ABI_FP_rounding attribute.
Charlie Turner [Wed, 3 Dec 2014 08:12:26 +0000 (08:12 +0000)]
Emit ABI_FP_rounding attribute.

LLVM understands a -enable-sign-dependent-rounding-fp-math codegen option. When
the user has specified this option, the Tag_ABI_FP_rounding attribute should be
emitted with value 1. This option currently does not appear to disable
transformations and optimizations that assume default floating point rounding
behavior, AFAICT, but the intention should be recorded in the build attributes,
regardless of what the compiler actually does with the intention.

Change-Id: If838578df3dc652b6f2796b8d152545674bcb30e

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223218 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd tests for default value of Tag_ABI_FP_rounding.
Charlie Turner [Wed, 3 Dec 2014 07:59:50 +0000 (07:59 +0000)]
Add tests for default value of Tag_ABI_FP_rounding.

Change-Id: I051866d073fc6ce87ce3e693a3762da6d81f4393

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223217 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a typo in the documentation of LTO
Benjamin Poulain [Wed, 3 Dec 2014 07:32:36 +0000 (07:32 +0000)]
Fix a typo in the documentation of LTO

Fix defininitions->definitions.

Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223216 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAsk the module for its the identified types.
Rafael Espindola [Wed, 3 Dec 2014 07:18:23 +0000 (07:18 +0000)]
Ask the module for its the identified types.

When lazy reading a module, the types used in a function will not be visible to
a TypeFinder until the body is read.

This patch fixes that by asking the module for its identified struct types.
If a materializer is present, the module asks it. If not, it uses a TypeFinder.

This fixes pr21374.

I will be the first to say that this is ugly, but it was the best I could find.

Some of the options I looked at:

* Asking the LLVMContext. This could be made to work for gold, but not currently
  for ld64. ld64 will load multiple modules into a single context before merging
  them. This causes us to see types from future merges. Unfortunately,
  MappedTypes is not just a cache when it comes to opaque types. Once the
  mapping has been made, we have to remember it for as long as the key may
  be used. This would mean moving MappedTypes to the Linker class and having
  to drop the Linker::LinkModules static methods, which are visible from C.

* Adding an option to ignore function bodies in the TypeFinder. This would
  fix the PR by picking the worst result. It would work, but unfortunately
  we are currently quite dependent on the upfront type merging. I will
  try to reduce our dependency, but it is not clear that we will be able
  to get rid of it for now.

The only clean solution I could think of is making the Module own the types.
This would have other advantages, but it is a much bigger change. I will
propose it, but it is nice to have this fixed while that is discussed.

With the gold plugin, this patch takes the number of types in the LTO clang
binary from 52817 to 49669.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223215 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoADT: Rename argument in emplace_back_impl
Duncan P. N. Exon Smith [Wed, 3 Dec 2014 05:53:24 +0000 (05:53 +0000)]
ADT: Rename argument in emplace_back_impl

Rename a functor argument in r223201 from `emplace` to `construct` to
reduce confusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223212 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r222997. The newly added compile-time checks are finding missing origins,...
Nick Lewycky [Wed, 3 Dec 2014 05:47:00 +0000 (05:47 +0000)]
Revert r222997. The newly added compile-time checks are finding missing origins, testcase is being reduced and a PR will be posted shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223211 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorize: Remove unnecessary RAUW
Duncan P. N. Exon Smith [Wed, 3 Dec 2014 05:41:20 +0000 (05:41 +0000)]
LoopVectorize: Remove unnecessary RAUW

Remove an unnecessary `MDNode::replaceAllUsesWith()`.  In the preceding
line, `TheLoop->setLoopID()` visits all backedges and sets the new loop
ID.  This sufficiently updates the loop metadata.

Metadata RAUW is going away as part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223210 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Fix SIFixSGPRCopies for copies to physical registers
Matt Arsenault [Wed, 3 Dec 2014 05:22:39 +0000 (05:22 +0000)]
R600/SI: Fix SIFixSGPRCopies for copies to physical registers

This shows up when operands required to be passed in VCC are copied

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223208 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove incorrect assertion
Matt Arsenault [Wed, 3 Dec 2014 05:22:38 +0000 (05:22 +0000)]
R600/SI: Remove incorrect assertion

This can be a COPY to a physical register, such as VCC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223207 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove i1 pseudo VALU ops
Matt Arsenault [Wed, 3 Dec 2014 05:22:35 +0000 (05:22 +0000)]
R600/SI: Remove i1 pseudo VALU ops

Select i1 logical ops directly to 64-bit SALU instructions.
Vector i1 values are always really in SGPRs, with each
bit for each item in the wave. This saves about 4 instructions
when and/or/xoring any condition, and also helps write conditions
that need to be passed in vcc.

This should work correctly now that the SGPR live range
fixing pass works. More work is needed to eliminate the VReg_1
pseudo regclass and possibly the entire SILowerI1Copies pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223206 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Fix suspicious indexing
Matt Arsenault [Wed, 3 Dec 2014 05:22:32 +0000 (05:22 +0000)]
R600/SI: Fix suspicious indexing

The loop is over the operands of an instruction, and checks the
register with the sub reg index of the dest register. This probably
meant to be checking the sub reg index of the same operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223205 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Fix running SILowerI1Copies a second time
Matt Arsenault [Wed, 3 Dec 2014 05:22:30 +0000 (05:22 +0000)]
R600/SI: Fix running SILowerI1Copies a second time

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223204 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Fix live range error hidden by SIFoldOperands
Matt Arsenault [Wed, 3 Dec 2014 05:22:29 +0000 (05:22 +0000)]
R600/SI: Fix live range error hidden by SIFoldOperands

m0 is treated as a virtual register class with a single register
rather than the physical register it really is. This was updating
the live range of the used virtual copy of m0 from the first ds_read
instruction, and leaving the unused copy unchanged. This resulted in a
"Live segment doesn't end at a valid instruction" verifier error because
the erased instructions. Update the live range of the second copy (which
should be dead).

No test since I'm not sure how to trigger this with SIFoldOperands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223203 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoADT: Add SmallVector<>::emplace_back(): fixup
Duncan P. N. Exon Smith [Wed, 3 Dec 2014 04:49:16 +0000 (04:49 +0000)]
ADT: Add SmallVector<>::emplace_back(): fixup

Add missing `void` return type from `!LLVM_HAS_VARIADIC_TEMPLATES` case
in r223201.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223202 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoADT: Add SmallVector<>::emplace_back()
Duncan P. N. Exon Smith [Wed, 3 Dec 2014 04:45:09 +0000 (04:45 +0000)]
ADT: Add SmallVector<>::emplace_back()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223201 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoStructurizeCFG: Use LoopInfo analysis for better loop detection
Tom Stellard [Wed, 3 Dec 2014 04:28:32 +0000 (04:28 +0000)]
StructurizeCFG: Use LoopInfo analysis for better loop detection

We were assuming that each back-edge in a region represented a unique
loop, which is not always the case.  We need to use LoopInfo to
correctly determine which back-edges are loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223199 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoNVPTX: Delete dead code
Duncan P. N. Exon Smith [Wed, 3 Dec 2014 04:13:23 +0000 (04:13 +0000)]
NVPTX: Delete dead code

`MDNode` does not inherit from `User`, and it never has a name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223198 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Enable inline assembly
Tom Stellard [Wed, 3 Dec 2014 04:08:00 +0000 (04:08 +0000)]
R600/SI: Enable inline assembly

We just needed to remove the assertion in
AMDGPURegisterInfo::getFrameRegister(), which is called when
initializing the parser for inline assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223197 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[OCaml] [cmake] Disable OCaml bindings if ctypes >=0.3 is not found.
Peter Zotov [Wed, 3 Dec 2014 03:39:01 +0000 (03:39 +0000)]
[OCaml] [cmake] Disable OCaml bindings if ctypes >=0.3 is not found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223195 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Change mubuf offsets to print as decimal
Matt Arsenault [Wed, 3 Dec 2014 03:12:13 +0000 (03:12 +0000)]
R600/SI: Change mubuf offsets to print as decimal

This matches SC's behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223194 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoEmit the entry block first and the exit block second, then all the blocks in between...
Nick Lewycky [Wed, 3 Dec 2014 02:45:01 +0000 (02:45 +0000)]
Emit the entry block first and the exit block second, then all the blocks in between afterwards. This is what gcc always does, and some out of tree tools depend on that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223193 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoGCRelocateOperands: Try to appease msc17.
NAKAMURA Takumi [Wed, 3 Dec 2014 02:40:24 +0000 (02:40 +0000)]
GCRelocateOperands: Try to appease msc17.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223192 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPrologue support
Peter Collingbourne [Wed, 3 Dec 2014 02:08:38 +0000 (02:08 +0000)]
Prologue support

Patch by Ben Gamari!

This redefines the `prefix` attribute introduced previously and
introduces a `prologue` attribute.  There are a two primary usecases
that these attributes aim to serve,

  1. Function prologue sigils

  2. Function hot-patching: Enable the user to insert `nop` operations
     at the beginning of the function which can later be safely replaced
     with a call to some instrumentation facility

  3. Runtime metadata: Allow a compiler to insert data for use by the
     runtime during execution. GHC is one example of a compiler that
     needs this functionality for its tables-next-to-code functionality.

Previously `prefix` served cases (1) and (2) quite well by allowing the user
to introduce arbitrary data at the entrypoint but before the function
body. Case (3), however, was poorly handled by this approach as it
required that prefix data was valid executable code.

Here we redefine the notion of prefix data to instead be data which
occurs immediately before the function entrypoint (i.e. the symbol
address). Since prefix data now occurs before the function entrypoint,
there is no need for the data to be valid code.

The previous notion of prefix data now goes under the name "prologue
data" to emphasize its duality with the function epilogue.

The intention here is to handle cases (1) and (2) with prologue data and
case (3) with prefix data.


This idea arose out of discussions[1] with Reid Kleckner in response to a
proposal to introduce the notion of symbol offsets to enable handling of
case (3).

[1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-May/073235.html

Test Plan: testsuite

Differential Revision: http://reviews.llvm.org/D6454

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9 years agoExceptionDemo: Let setMCJITMemoryManager() take unique_ptr, since r223183.
NAKAMURA Takumi [Wed, 3 Dec 2014 02:05:51 +0000 (02:05 +0000)]
ExceptionDemo: Let setMCJITMemoryManager() take unique_ptr, since r223183.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223188 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.
Ahmed Bougacha [Wed, 3 Dec 2014 02:03:26 +0000 (02:03 +0000)]
[X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.

The X86AsmParser intel handling was refactored in r216481, making it
try each different memory operand size to see which one matches.
Operand sizes larger than 80 ("[xyz]mmword ptr") were forgotten, which
led to an "invalid operand" error for code such as:
  movdqa [rax], xmm0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223187 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[MCJIT] Unique-ptrify the RTDyldMemoryManager member of MCJIT. NFC.
Lang Hames [Wed, 3 Dec 2014 00:51:19 +0000 (00:51 +0000)]
[MCJIT] Unique-ptrify the RTDyldMemoryManager member of MCJIT. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223183 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] Fix readcyclecounter to be custom expanded for all 32-bit targets
Hal Finkel [Wed, 3 Dec 2014 00:19:17 +0000 (00:19 +0000)]
[PowerPC] Fix readcyclecounter to be custom expanded for all 32-bit targets

We need to use the custom expansion of readcyclecounter on all 32-bit targets
(even those with 64-bit registers). This should fix the ppc64 buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223182 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAArch64: strengthen Darwin ABI alignment assumptions
Tim Northover [Tue, 2 Dec 2014 23:53:43 +0000 (23:53 +0000)]
AArch64: strengthen Darwin ABI alignment assumptions

A global variable without an explicit alignment specified should be assumed to
be ABI-aligned according to its type, like on other platforms. This allows us
to use better memory operations when accessing it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223180 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse a typed enum instead of 'unsigned char' for packed field. NFC.
Pete Cooper [Tue, 2 Dec 2014 23:34:23 +0000 (23:34 +0000)]
Use a typed enum instead of 'unsigned char' for packed field.  NFC.

This makes it easier to debug Twine as the 'Kind' fields now show their enum values in lldb and not escaped characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223178 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAArch64: don't be too greedy when folding :lo12: accesses into mem ops.
Tim Northover [Tue, 2 Dec 2014 23:13:39 +0000 (23:13 +0000)]
AArch64: don't be too greedy when folding :lo12: accesses into mem ops.

This frequently leads to cases like:
   ldr xD, [xN, :lo12:var]
   add xA, xN, :lo12:var
   ldr xD, [xA, #8]

where the ADD would have been needed anyway, and the two distinct addressing
modes can prevent the formation of an ldp. Because of how we handle ADRP
(aggressively forming an ADRP/ADD pseudo-inst at ISel time), this pattern also
results in duplicated ADRP instructions (one on its own to cover the ldr, and
one combined with the add).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223172 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPR21302. Vectorize only bottom-tested loops.
Michael Zolotukhin [Tue, 2 Dec 2014 22:59:06 +0000 (22:59 +0000)]
PR21302. Vectorize only bottom-tested loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223171 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoApply loop-rotate to several vectorizer tests.
Michael Zolotukhin [Tue, 2 Dec 2014 22:59:02 +0000 (22:59 +0000)]
Apply loop-rotate to several vectorizer tests.

Such loops shouldn't be vectorized due to the loops form.
After applying loop-rotate (+simplifycfg) the tests again start to check
what they are intended to check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223170 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets
Simon Pilgrim [Tue, 2 Dec 2014 22:31:23 +0000 (22:31 +0000)]
[X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets

4i32 shuffles for single insertions into zero vectors lowers to X86vzmovl which was using (v)blendps - causing domain switch stalls. This patch fixes this by using (v)pblendw instead.

The updated tests on test/CodeGen/X86/sse41.ll still contain a domain stall due to the use of insertps - I'm looking at fixing this in a future patch.

Differential Revision: http://reviews.llvm.org/D6458

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223165 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoGive lit a --xunit-xml-output option for saving results in xunit format
Chris Matthews [Tue, 2 Dec 2014 22:19:21 +0000 (22:19 +0000)]
Give lit a --xunit-xml-output option for saving results in xunit format

  --xunit-xml-output saves test results to disk in JUnit's xml format. This will allow Jenkins to report the details of a lit run.

  Based on a patch by David Chisnall.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223163 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] Implement readcyclecounter for PPC32
Hal Finkel [Tue, 2 Dec 2014 22:01:00 +0000 (22:01 +0000)]
[PowerPC] Implement readcyclecounter for PPC32

We've long supported readcyclecounter on PPC64, but it is easier there (the
read of the 64-bit time-base register can be accomplished via a single
instruction). This now provides an implementation for PPC32 as well. On PPC32,
the time-base register is still 64 bits, but can only be read 32 bits at a time
via two separate SPRs. The ISA manual explains how to do this properly (it
involves re-reading the upper bits and looping if the counter has wrapped while
being read).

This requires PPC to implement a custom integer splitting legalization for the
READCYCLECOUNTER node, turning it into a target-specific SDAG node, which then
gets turned into a pseudo-instruction, which is then expanded to the necessary
sequence (which has three SPR reads, the comparison and the branch).

Thanks to Paul Hargrove for pointing out to me that this was still unimplemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223161 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Emit amd_kernel_code_t header for AMDGPU environment
Tom Stellard [Tue, 2 Dec 2014 22:00:07 +0000 (22:00 +0000)]
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223160 91177308-0d34-0410-b5e6-96231b3b80d8