oota-llvm.git
7 years ago[libFuzzer] ensure that the dfsan tracing hooks actually run (using -verbosity=3...
Kostya Serebryany [Tue, 28 Jul 2015 01:25:00 +0000 (01:25 +0000)]
[libFuzzer] ensure that the dfsan tracing hooks actually run (using -verbosity=3 in tests)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] when using cmp traces, first check that the CMP is evaluated to one value...
Kostya Serebryany [Tue, 28 Jul 2015 00:59:53 +0000 (00:59 +0000)]
[libFuzzer] when using cmp traces, first check that the CMP is evaluated to one value much more frequently than to the other value (heuristic)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243363 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix invalid load folding with SSE/AVX FP logical instructions (PR22371)
Sanjay Patel [Tue, 28 Jul 2015 00:48:32 +0000 (00:48 +0000)]
fix invalid load folding with SSE/AVX FP logical instructions (PR22371)

This is a follow-up to the FIXME that was added with D7474 ( http://reviews.llvm.org/rL229531 ).
I thought this load folding bug had been made hard-to-hit, but it turns out to be very easy
when targeting 32-bit x86 and causes a miscompile/crash in Wine:
https://bugs.winehq.org/show_bug.cgi?id=38826
https://llvm.org/bugs/show_bug.cgi?id=22371#c25

The quick fix is to simply remove the scalar FP logical instructions from the load folding table
in X86InstrInfo, but that causes us to miss load folds that should be possible when lowering fabs,
fneg, fcopysign. So the majority of this patch is altering those lowerings to use *vector* FP
logical instructions (because that's all x86 gives us anyway). That lets us do the load folding
legally.

Differential Revision: http://reviews.llvm.org/D11477

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243361 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LSR] Move X86 specific test case to X86/
Sanjoy Das [Tue, 28 Jul 2015 00:13:42 +0000 (00:13 +0000)]
[LSR] Move X86 specific test case to X86/

rL243348 added the test case in the wrong directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243357 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opaque pointer type] Avoid using pointee types to retrieve InlineAsm's function...
David Blaikie [Tue, 28 Jul 2015 00:06:38 +0000 (00:06 +0000)]
[opaque pointer type] Avoid using pointee types to retrieve InlineAsm's function type

As a stop-gap, retrieving the InlineAsm's function type was done via the
pointee type of its (pointer) Value type.

Instead, pass down and store the FunctionType in the InlineAsm object.

The only wrinkle with this is the ConstantUniqueMap, which then needs to
ferry the FunctionType down through the InlineAsmKeyType. This could be
done a bit differently if the ConstantInfo trait were broadened a bit to
provide an extension point for access to the TypeClass object from the
ValType objects, so that the ConstantUniqueMap<InlineAsm> would then be
keyed on FunctionTypes instead of PointerTypes that point to
FunctionTypes.

This drops the number of IR tests that don't roundtrip through bitcode*
without calling PointerType::getElementType from 416 to 8 (out of
10733). 3 of those crash when roundtripping at ToT anyway.

* modulo various unavoidable uses of pointer types when validating IR
  (for now) and in the way globals are parsed, unfortunately. These
  cases will either go away (because such validation will no longer be
  necessary or possible when pointee types are opaque), or have to be
  made simultaneously with the removal of pointee types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Split out a helper to print a collection of memchecks
Adam Nemet [Mon, 27 Jul 2015 23:54:41 +0000 (23:54 +0000)]
[LAA] Split out a helper to print a collection of memchecks

This is effectively an NFC but we can no longer print the index of the
pointer group so instead I print its address.  This still lets us
cross-check the section that list the checks against the section that
list the groups (see how I modified the test).

E.g. before we printed this:

    Run-time memory checks:
    Check 0:
      Comparing group 0:
        %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
        %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
      Against group 1:
        %arrayidxA = getelementptr i16, i16* %a, i64 %ind
        %arrayidxA1 = getelementptr i16, i16* %a, i64 %add
    ...
    Grouped accesses:
      Group 0:
        (Low: %c High: (78 + %c))
          Member: {%c,+,4}<%for.body>
          Member: {(2 + %c),+,4}<%for.body>

Now we print this (changes are underlined):

    Run-time memory checks:
    Check 0:
      Comparing group (0x7f9c6040c320):
                       ~~~~~~~~~~~~~~
        %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
        %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
      Against group (0x7f9c6040c358):
                     ~~~~~~~~~~~~~~
        %arrayidxA1 = getelementptr i16, i16* %a, i64 %add
        %arrayidxA = getelementptr i16, i16* %a, i64 %ind
    ...
    Grouped accesses:
      Group 0x7f9c6040c320:
            ~~~~~~~~~~~~~~
        (Low: %c High: (78 + %c))
          Member: {(2 + %c),+,4}<%for.body>
          Member: {%c,+,4}<%for.body>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo; NFC
Sanjay Patel [Mon, 27 Jul 2015 23:43:09 +0000 (23:43 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opaque pointers] Avoid the use of pointee types when parsing inline asm in IR
David Blaikie [Mon, 27 Jul 2015 23:32:19 +0000 (23:32 +0000)]
[opaque pointers] Avoid the use of pointee types when parsing inline asm in IR

When parsing calls to inline asm the pointee type (of the pointer type
representing the value type of the InlineAsm value) was used. To avoid
using it, use the ValID structure to ferry the FunctionType directly
through to the InlineAsm construction.

This is a bit of a workaround - alternatively the inline asm could
explicitly describe the type but that'd be verbose/redundant in the IR
and so long as the inline asm calls directly in the context of a call or
invoke, this should suffice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243349 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LSR] Generate and use zero extends
Sanjoy Das [Mon, 27 Jul 2015 23:27:51 +0000 (23:27 +0000)]
[LSR] Generate and use zero extends

Summary:
If a scale or a base register can be rewritten as "Zext({A,+,1})" then
LSR will now consider a formula of that form in its normal cost
computation.

Depends on D9180

Reviewers: qcolombet, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243348 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TargetTransformInfo][NFCI] Add TargetTransformInfo::isZExtFree.
Sanjoy Das [Mon, 27 Jul 2015 23:27:43 +0000 (23:27 +0000)]
[TargetTransformInfo][NFCI] Add TargetTransformInfo::isZExtFree.

Summary:
This function is not used in this change but will be used in a
subsequent change.

Reviewers: mcrosier, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243347 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: add a generic CPU
JF Bastien [Mon, 27 Jul 2015 23:25:54 +0000 (23:25 +0000)]
WebAssembly: add a generic CPU

Summary: WebAssemblySubtarget.cpp expects a default 'generic' CPU to exist, and this seems to be prevalent with other targets. It makes sense to have something between MVP and bleeding-edge, even though for now it's the same as MVP. This removes a warning that's currently generated.

Subscribers: jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243345 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTweak llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins...
NAKAMURA Takumi [Mon, 27 Jul 2015 23:01:41 +0000 (23:01 +0000)]
Tweak llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll not to fail for targeting win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the unnamed basic block references.
Alex Lorenz [Mon, 27 Jul 2015 22:42:41 +0000 (22:42 +0000)]
MIR Serialization: Serialize the unnamed basic block references.

This commit serializes the references from the machine basic blocks to the
unnamed basic blocks.

This commit adds a new attribute to the machine basic block's YAML mapping
called 'ir-block'. This attribute contains the actual reference to the
basic block.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243340 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: more MCAsmInfo nits.
JF Bastien [Mon, 27 Jul 2015 22:40:31 +0000 (22:40 +0000)]
WebAssembly: more MCAsmInfo nits.

Summary: As suggested by sunfish.

Subscribers: jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11544

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243339 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-mc] Add --no-warn flag with -W alias to disable outputting warnings while assem...
Colin LeMahieu [Mon, 27 Jul 2015 22:39:14 +0000 (22:39 +0000)]
[llvm-mc] Add --no-warn flag with -W alias to disable outputting warnings while assembling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243338 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix -Wmicrosoft-enum warning
Reid Kleckner [Mon, 27 Jul 2015 22:35:50 +0000 (22:35 +0000)]
Fix -Wmicrosoft-enum warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243337 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Expose the method 'getLocalSlot' in the module slot tracker.
Alex Lorenz [Mon, 27 Jul 2015 22:31:04 +0000 (22:31 +0000)]
IR: Expose the method 'getLocalSlot' in the module slot tracker.

This commit publicly exposes the method 'getLocalSlot' in the
'ModuleSlotTracker' class.

This change is useful for MIR serialization, to serialize the unnamed basic
block and unnamed alloca references.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243336 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago- Added support for parsing HWDiv features using Target Parser.
Alexandros Lamprineas [Mon, 27 Jul 2015 22:26:59 +0000 (22:26 +0000)]
- Added support for parsing HWDiv features using Target Parser.
- Architecture extensions are represented as a bitmap.

Phabricator: http://reviews.llvm.org/D11457

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243335 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-mc] Pushing plumbing through for --fatal-warnings flag.
Colin LeMahieu [Mon, 27 Jul 2015 21:56:53 +0000 (21:56 +0000)]
[llvm-mc] Pushing plumbing through for --fatal-warnings flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IndVars] Make loop varying predicates loop invariant.
Sanjoy Das [Mon, 27 Jul 2015 21:42:49 +0000 (21:42 +0000)]
[IndVars] Make loop varying predicates loop invariant.

Summary:
Was D9784: "Remove loop variant range check when induction variable is
strictly increasing"

This change re-implements D9784 with the two differences:

 1. It does not use SCEVExpander and does not generate new
    instructions.  Instead, it does a quick local search for existing
    `llvm::Value`s that it needs when modifying the `icmp`
    instruction.

 2. It is more general -- it deals with both increasing and decreasing
    induction variables.

I've added all of the tests included with D9784, and two more.

As an example on what this change does (copied from D9784):

Given C code:

```
for (int i = M; i < N; i++) // i is known not to overflow
  if (i < 0) break;
  a[i] = 0;
}
```

This transformation produces:

```
for (int i = M; i < N; i++)
  if (M < 0) break;
  a[i] = 0;
}
```

Which can be unswitched into:

```
if (!(M < 0))
  for (int i = M; i < N; i++)
    a[i] = 0;
}
```

I went back and forth on whether the top level logic should live in
`SimplifyIndvar::eliminateIVComparison` or be put into its own
routine.  Right now I've put it under `eliminateIVComparison` because
even though the `icmp` is not *eliminated*, it no longer is an IV
comparison.  I'm open to putting it in its own helper routine if you
think that is better.

Reviewers: reames, nicholas, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11278

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove unnecessary forward declaration; NFC
Sanjay Patel [Mon, 27 Jul 2015 21:11:55 +0000 (21:11 +0000)]
remove unnecessary forward declaration; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243328 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodon't repeat function names in comments; NFC
Sanjay Patel [Mon, 27 Jul 2015 21:03:03 +0000 (21:03 +0000)]
don't repeat function names in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: minor MCAsmInfo fixes
JF Bastien [Mon, 27 Jul 2015 20:46:51 +0000 (20:46 +0000)]
WebAssembly: minor MCAsmInfo fixes

Summary:
Fix pointer / callee-save stack sto size.
Update comment character to be LISP-ish.

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243326 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Added shuffle tests to demonstrate missed bitmask.
Simon Pilgrim [Mon, 27 Jul 2015 20:41:57 +0000 (20:41 +0000)]
[X86][SSE] Added shuffle tests to demonstrate missed bitmask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243324 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.
Alex Lorenz [Mon, 27 Jul 2015 20:39:03 +0000 (20:39 +0000)]
MIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243322 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Rename the standalone parsing methods. NFC.
Alex Lorenz [Mon, 27 Jul 2015 20:29:27 +0000 (20:29 +0000)]
MIR Parser: Rename the standalone parsing methods. NFC.

This commit renames the methods 'parseMBB' and 'parseNamedRegister' to
'parseStandaloneMBB' and 'parseStandaloneNamedRegister' in order for their
names to be consistent with the method 'parseStandaloneVirtualRegister'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243319 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Bruno Cardoso Lopes [Mon, 27 Jul 2015 20:26:04 +0000 (20:26 +0000)]
Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"

Still breaks some ARM buildbots. This reverts r243271.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243318 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Upper-case variable names, NFC
Adam Nemet [Mon, 27 Jul 2015 19:38:50 +0000 (19:38 +0000)]
[LAA] Upper-case variable names, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243313 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Split out a helper from addRuntimeCheck to generate the check, NFC
Adam Nemet [Mon, 27 Jul 2015 19:38:48 +0000 (19:38 +0000)]
[LAA] Split out a helper from addRuntimeCheck to generate the check, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243312 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Remove check for Darwin that was needed to decide if x18 should
Akira Hatanaka [Mon, 27 Jul 2015 19:18:47 +0000 (19:18 +0000)]
[AArch64] Remove check for Darwin that was needed to decide if x18 should
be reserved.

The decision to reserve x18 is going to be made solely by the front-end,
so it isn't necessary to check if the OS is Darwin in the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243308 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixed signed/unsigned comparison warning.
Simon Pilgrim [Mon, 27 Jul 2015 19:07:15 +0000 (19:07 +0000)]
Fixed signed/unsigned comparison warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243306 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][FastISel] Add more truncation tests.
Juergen Ributzka [Mon, 27 Jul 2015 19:00:23 +0000 (19:00 +0000)]
[AArch64][FastISel] Add more truncation tests.

This is a follow-up to r243198 and adds more truncation tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243304 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine][X86][SSE] Replace sign/zero extension intrinsics with native IR
Simon Pilgrim [Mon, 27 Jul 2015 18:52:15 +0000 (18:52 +0000)]
[InstCombine][X86][SSE] Replace sign/zero extension intrinsics with native IR

Now that we are generating sane codegen for vector sext/zext nodes on SSE targets, this patch uses instcombine to replace the SSE41/AVX2 pmovsx and pmovzx intrinsics with the equivalent native IR code.

Differential Revision: http://reviews.llvm.org/D11503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243303 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Remove unnecessary null check. NFC."
Pete Cooper [Mon, 27 Jul 2015 18:37:58 +0000 (18:37 +0000)]
Revert "Remove unnecessary null check.  NFC."

This reverts commit r243167.

Duncan pointed out that dyn_cast can return null in these cases, so this
was an unsafe commit to make.  Sorry for the noise.

Worryingly there were no tests which fail...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243302 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix assert when inlining a constantexpr addrspacecast
Matt Arsenault [Mon, 27 Jul 2015 18:31:03 +0000 (18:31 +0000)]
Fix assert when inlining a constantexpr addrspacecast

The pointer size of the addrspacecasted pointer might not have matched,
so this would have hit an assert in accumulateConstantOffset.

I think this was here to allow constant folding of a load of an
addrspacecasted constant. Accumulating the offset through the
addrspacecast doesn't make much sense, so something else is necessary
to allow folding the load through this cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243300 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix ODR violation. NFC.
Diego Novillo [Mon, 27 Jul 2015 18:27:23 +0000 (18:27 +0000)]
Fix ODR violation. NFC.

There is an ODR conflict between lib/ExecutionEngine/ExecutionEngineBindings.cpp
and lib/Target/TargetMachineC.cpp. The inline definitions should simply
be marked static (thanks dblaikie for the hint).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243298 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix `llvm-config` to emit the linker flag for the combined shared object built by...
JF Bastien [Mon, 27 Jul 2015 18:26:30 +0000 (18:26 +0000)]
Fix `llvm-config` to emit the linker flag for the combined shared object built by autoconfig/make instead of the individual components.

Summary:
When LLVM is configured to build shared libraries, CMake builds each component as it's own shared object, while autoconfig/make builds them statically and then links them all together to create a single shared object. This change adds compile time config flags to `llvm-config` so it can know whether LLVM's components are separated or not and act accordingly.

This fixes `llvm-config` instead of fixing the makefiles to behave like CMake because, AIUI, LLVM's autoconfig/make build system is on the way out anyway.

This change only affects `llvm-config` from builds that use autoconfig/make.

Reviewers: jfb

Subscribers: echristo, dschuff, llvm-commits

Differential Revision: http://reviews.llvm.org/D11392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243297 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: don't match vgpr loads for constant loads
Marek Olsak [Mon, 27 Jul 2015 18:16:08 +0000 (18:16 +0000)]
AMDGPU: don't match vgpr loads for constant loads

Author: Dave Airlie <airlied@redhat.com>

In order to implement indirect sampler loads, we don't
want to match on a VGPR load but an SGPR one for constants,
as we cannot feed VGPRs to the sampler only SGPRs.

this should be applicable for llvm 3.7 as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243294 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agomove combineRepeatedFPDivisors logic into a helper function; NFCI
Sanjay Patel [Mon, 27 Jul 2015 17:58:49 +0000 (17:58 +0000)]
move combineRepeatedFPDivisors logic into a helper function; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243293 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReset the virtual registers in liveins when clearing the virtual registers.
Alex Lorenz [Mon, 27 Jul 2015 17:51:59 +0000 (17:51 +0000)]
Reset the virtual registers in liveins when clearing the virtual registers.

This commit zeroes out the virtual register references in the machine
function's liveins in the class 'MachineRegisterInfo' when the virtual
register definitions are cleared.

Reviewers: Matthias Braun

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243290 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the machine function's liveins.
Alex Lorenz [Mon, 27 Jul 2015 17:42:45 +0000 (17:42 +0000)]
MIR Serialization: Serialize the machine function's liveins.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243288 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo and spacing; NFC
Sanjay Patel [Mon, 27 Jul 2015 17:39:20 +0000 (17:39 +0000)]
fix typo and spacing; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243287 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Emit the correct error message.
Davide Italiano [Mon, 27 Jul 2015 17:22:19 +0000 (17:22 +0000)]
[TableGen] Emit the correct error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243284 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Add const to a bunch of Type* in DataLayout. NFC."
Pete Cooper [Mon, 27 Jul 2015 17:15:28 +0000 (17:15 +0000)]
Revert "Add const to a bunch of Type* in DataLayout.  NFC."

This reverts commit r243135.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243283 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Add const to some Type* parameters which didn't need to be mutable. NFC."
Pete Cooper [Mon, 27 Jul 2015 17:15:24 +0000 (17:15 +0000)]
Revert "Add const to some Type* parameters which didn't need to be mutable.  NFC."

This reverts commit r243146.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243282 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe tests added in r243270 require asserts to be enabled
Silviu Baranga [Mon, 27 Jul 2015 15:22:49 +0000 (15:22 +0000)]
The tests added in r243270 require asserts to be enabled

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243274 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the tests added in r243270. Use 2>&1 instead of |&
Silviu Baranga [Mon, 27 Jul 2015 15:08:55 +0000 (15:08 +0000)]
Fix the tests added in r243270. Use 2>&1 instead of |&

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243273 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PeepholeOptimizer] Look through PHIs to find additional register sources
Bruno Cardoso Lopes [Mon, 27 Jul 2015 14:39:46 +0000 (14:39 +0000)]
[PeepholeOptimizer] Look through PHIs to find additional register sources

Reapply r242295 with fixes in the implementation.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243271 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM/AArch64] Fix cost model for interleaved accesses
Silviu Baranga [Mon, 27 Jul 2015 14:39:34 +0000 (14:39 +0000)]
[ARM/AArch64] Fix cost model for interleaved accesses

Summary:
Fix the cost of interleaved accesses for ARM/AArch64.
We were calling getTypeAllocSize and using it to check
the number of bits, when we should have called
getTypeAllocSizeInBits instead.

This would pottentially cause the vectorizer to
generate loads/stores and shuffles which cannot
be matched with an interleaved access instruction.

No performance changes are expected for now since
matching/generating interleaved accesses is still
disabled by default.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243270 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend. NFCI.
Simon Pilgrim [Mon, 27 Jul 2015 12:37:19 +0000 (12:37 +0000)]
[X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend. NFCI.

Allows us to show diffs for D11518 more clearly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243264 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
Marek Olsak [Mon, 27 Jul 2015 11:37:42 +0000 (11:37 +0000)]
AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround

This is a candidate for 3.7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243263 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLoopAccessAnalysis.cpp: Tweak r243239 to avoid side effects. It caused different...
NAKAMURA Takumi [Mon, 27 Jul 2015 01:35:30 +0000 (01:35 +0000)]
LoopAccessAnalysis.cpp: Tweak r243239 to avoid side effects. It caused different emissions between gcc and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243258 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAvoid using uncommon acronym "MSROM".
Sean Silva [Mon, 27 Jul 2015 00:46:59 +0000 (00:46 +0000)]
Avoid using uncommon acronym "MSROM".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243256 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRoll forward r243250
Jingyue Wu [Sun, 26 Jul 2015 19:10:03 +0000 (19:10 +0000)]
Roll forward r243250

r243250 appeared to break clang/test/Analysis/dead-store.c on one of the build
slaves, but I couldn't reproduce this failure locally. Probably a false
positive as I saw this test was broken by r243246 or r243247 too but passed
later without people fixing anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243253 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r243250
Jingyue Wu [Sun, 26 Jul 2015 18:30:13 +0000 (18:30 +0000)]
Revert r243250

breaks tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243251 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TTI/CostModel] improve TTI::getGEPCost and use it in CostModel::getInstructionCost
Jingyue Wu [Sun, 26 Jul 2015 17:28:13 +0000 (17:28 +0000)]
[TTI/CostModel] improve TTI::getGEPCost and use it in CostModel::getInstructionCost

Summary:
This patch updates TargetTransformInfoImplCRTPBase::getGEPCost to consider
addressing modes. It now returns TCC_Free when the GEP can be completely folded
to an addresing mode.

I started this patch as I refactored SLSR. Function isGEPFoldable looks common
and is indeed used by some WIP of mine. So I extracted that logic to getGEPCost.

Furthermore, I noticed getGEPCost wasn't directly tested anywhere. The best
testing bed seems CostModel, but its getInstructionCost method invokes
getAddressComputationCost for GEPs which provides very coarse estimation. So
this patch also makes getInstructionCost call the updated getGEPCost for GEPs.
This change inevitably breaks some tests because the cost model changes, but
nothing looks seriously wrong -- if we believe the new cost model is the right
way to go, these tests should be updated.

This patch is not perfect yet -- the comments in some tests need to be updated.
I want to know whether this is a right approach before fixing those details.

Reviewers: chandlerc, hfinkel

Subscribers: aschwaighofer, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D9819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243250 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Refreshed vector bit count tests.
Simon Pilgrim [Sun, 26 Jul 2015 17:02:25 +0000 (17:02 +0000)]
[X86][SSE] Refreshed vector bit count tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243249 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX2] Refreshed avx2 conversion tests
Simon Pilgrim [Sun, 26 Jul 2015 17:01:16 +0000 (17:01 +0000)]
[X86][AVX2] Refreshed avx2 conversion tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243248 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agobugpoint: make the number of trim iterations a compile-time constant
Tobias Grosser [Sun, 26 Jul 2015 15:18:45 +0000 (15:18 +0000)]
bugpoint: make the number of trim iterations a compile-time constant

Around 10 year ago Chris limited this code to a single iteration by just
dropping a break into the loop body. We now make the number of trim iterations
a compile time constant to be able to play with it and see if this can
improve the bugpoint results. We currently use with '3' still a small and
conservative value, but this can be adjusted in the future, if needed.

I tried to look for a trivial test case, but did not succeed yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243247 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImplemented encoding and intrinsics of the following instructions
Igor Breger [Sun, 26 Jul 2015 14:41:44 +0000 (14:41 +0000)]
Implemented encoding and intrinsics of the following instructions
  vunpckhps/pd, vunpcklps/pd,
  vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11509

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243246 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typo in comment
Tobias Grosser [Sun, 26 Jul 2015 11:37:05 +0000 (11:37 +0000)]
Fix typo in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243244 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-dwarfump] Don't rely on global state, part 3.
Davide Italiano [Sun, 26 Jul 2015 05:35:59 +0000 (05:35 +0000)]
[llvm-dwarfump] Don't rely on global state, part 3.

Some tools used to rely on a global static variable to keep track of the
return value for main(). I changed llvm-cxxdump to use exit(1)
and Rafael shortly after did the same with llvm-readobj. This is
(yet) another step towards the goal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243240 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Begin moving the logic of generating checks out of addRuntimeCheck
Adam Nemet [Sun, 26 Jul 2015 05:32:14 +0000 (05:32 +0000)]
[LAA] Begin moving the logic of generating checks out of addRuntimeCheck

Summary:
The goal is to start moving us closer to the model where
RuntimePointerChecking will compute and store the checks.  Then a client
can filter the check according to its requirements and then use the
filtered list of checks with addRuntimeCheck.

Before the patch, this is all done in addRuntimeCheck.  So the patch
starts to split up addRuntimeCheck while providing the old API under
what's more or less a wrapper now.

The new underlying addRuntimeCheck takes a collection of checks now,
expands the code for the bounds then generates the code for the checks.

I am not completely happy with making expandBounds static because now it
needs so many explicit arguments but I don't want to make the type
PointerBounds part of LAI.  This should get fixed when addRuntimeCheck
is moved to LoopVersioning where it really belongs, IMO.

Audited the assembly diff of the testsuite (including externals).  There
is a tiny bit of assembly churn that is due to the different order the
code for the bounds is expanded now
(MultiSource/Benchmarks/Prolangs-C/bison/conflicts.s and with LoopDist
on 456.hmmer/fast_algorithms.s).

Reviewers: hfinkel

Subscribers: klimek, llvm-commits

Differential Revision: http://reviews.llvm.org/D11205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243239 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine][SSE4A] Standardized references to Length/Width and Index/Start to match...
Simon Pilgrim [Sat, 25 Jul 2015 20:41:00 +0000 (20:41 +0000)]
[InstCombine][SSE4A] Standardized references to Length/Width and Index/Start to match AMD docs. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243226 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Split off SSE4a tests.
Simon Pilgrim [Sat, 25 Jul 2015 17:14:01 +0000 (17:14 +0000)]
[InstCombine] Split off SSE4a tests.

These aren't vector demanded bits tests. More tests to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243223 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Added additional vector sign/zero load extension tests.
Simon Pilgrim [Sat, 25 Jul 2015 14:07:20 +0000 (14:07 +0000)]
[X86][SSE] Added additional vector sign/zero load extension tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243216 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Added additional vector sign/zero extension tests.
Simon Pilgrim [Sat, 25 Jul 2015 11:17:35 +0000 (11:17 +0000)]
[X86][SSE] Added additional vector sign/zero extension tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243212 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopUnswitch] Improve loop unswitch pass to find trivial unswitch conditions more...
Chen Li [Sat, 25 Jul 2015 03:21:06 +0000 (03:21 +0000)]
[LoopUnswitch] Improve loop unswitch pass to find trivial unswitch conditions more effectively

Summary:
This patch improves trivial loop unswitch.

The current trivial loop unswitch only checks if loop header's terminator contains a trivial unswitch condition. But if the loop header only has one reachable successor (due to intentionally or unintentionally missed code simplification), we should consider the successor as part of the loop header. Therefore, instead of stopping at loop header's terminator, we should keep traversing its successors within loop until reach a *real* conditional branch or switch (whose condition can not be constant folded). This change will enable a single -loop-unswitch pass to unswitch multiple trivial conditions (unswitch one trivial condition could open opportunity to unswitch another one in the same loop), while the old implementation can unswitch only one per pass.

Reviewers: reames, broune

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243203 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][FastISel] Always use an AND instruction when truncating to non-legal types.
Juergen Ributzka [Sat, 25 Jul 2015 02:16:53 +0000 (02:16 +0000)]
[AArch64][FastISel] Always use an AND instruction when truncating to non-legal types.

When truncating to non-legal types (such as i16, i8 and i1) always use an AND
instruction to mask out the upper bits. This was only done when the source type
was an i64, but not when the source type was an i32.

This commit fixes this and adds the missing i32 truncate tests.

This fixes rdar://problem/21990703.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243198 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix PPCMaterializeInt to check the size of the integer based on the
Eric Christopher [Sat, 25 Jul 2015 00:48:08 +0000 (00:48 +0000)]
Fix PPCMaterializeInt to check the size of the integer based on the
extension property we're requesting - zero or sign extended.

This fixes cases where we want to return a zero extended 32-bit -1
and not be sign extended for the entire register. Also updated the
already out of date comment with the current behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243192 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPPCMaterializeInt should only take a ConstantInt so represent this in the prototype
Eric Christopher [Sat, 25 Jul 2015 00:48:06 +0000 (00:48 +0000)]
PPCMaterializeInt should only take a ConstantInt so represent this in the prototype
and fix up all uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243191 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Define subtarget feature "reserve-x18", which is used to decide
Akira Hatanaka [Sat, 25 Jul 2015 00:18:31 +0000 (00:18 +0000)]
[AArch64] Define subtarget feature "reserve-x18", which is used to decide
whether register x18 should be reserved.

This change is needed because we cannot use a backend option to set
cl::opt "aarch64-reserve-x18" when doing LTO.

Out-of-tree projects currently using cl::opt option "-aarch64-reserve-x18"
to reserve x18 should make changes to add subtarget feature "reserve-x18"
to the IR.

rdar://problem/21529937

Differential Revision: http://reviews.llvm.org/D11463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243186 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI/Verifier: Fix argument bitrot in DILocalVariable
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 23:59:25 +0000 (23:59 +0000)]
DI/Verifier: Fix argument bitrot in DILocalVariable

Add a verifier check that `DILocalVariable`s of tag
`DW_TAG_arg_variable` always have a non-zero 'arg:' field, and those of
tag `DW_TAG_auto_variable` always have a zero 'arg:' field.  These are
the only configurations that are properly understood by the backend.

(Also, fix the bad examples in LangRef and test/Assembler, and fix the
bug in Kaleidoscope Ch8.)

A large number of testcases seem to have bitrotted their way forward
from some ancient version of the debug info hierarchy that didn't have
`arg:` parameters.  If you have out-of-tree testcases that start failing
in the verifier and you don't care enough to get the `arg:` right, you
may have some luck just calling:

    sed -e 's/, arg: 0/, arg: 1/'

or some such, but I hand-updated the ones in tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243183 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize MachineFrameInfo's callee saved information.
Alex Lorenz [Fri, 24 Jul 2015 22:22:50 +0000 (22:22 +0000)]
MIR Serialization: Serialize MachineFrameInfo's callee saved information.

This commit serializes the callee saved information from the class
'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and
the ordinary stack objects and adds an optional 'callee-saved-register'
attribute. This attribute is used to serialize the callee save information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243173 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHandle loop with negtive induction variable increment
Lawrence Hu [Fri, 24 Jul 2015 22:01:49 +0000 (22:01 +0000)]
Handle loop with negtive induction variable increment

This patch extend LoopReroll pass to hand the loops which
is similar to the following:

      while (len > 1) {
            sum4 += buf[len];
            sum4 += buf[len-1];
            len -= 2;
        }

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243171 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unnecessary null check. NFC.
Pete Cooper [Fri, 24 Jul 2015 21:38:01 +0000 (21:38 +0000)]
Remove unnecessary null check.  NFC.

Since both places which set this variable do so with dyn_cast, and not
dyn_cast_or_null, its impossible to get a nullptr here, so we can remove
the check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243167 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse make_range(rbegin(), rend()) to allow foreach loops. NFC.
Pete Cooper [Fri, 24 Jul 2015 21:13:43 +0000 (21:13 +0000)]
Use make_range(rbegin(), rend()) to allow foreach loops.  NFC.

Instead of the pattern

for (auto I = x.rbegin(), E = x.end(); I != E; ++I)

we can use make_range to construct the reverse range and iterate using
that instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243163 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Fix unit tests after r243160
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 21:11:06 +0000 (21:11 +0000)]
DI: Fix unit tests after r243160

These always empty fields are gone, so don't test that they're empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243162 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Remove unnecessary DICompositeTypeBase
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 20:56:36 +0000 (20:56 +0000)]
DI: Remove unnecessary DICompositeTypeBase

Remove unnecessary and confusing common base class for `DICompositeType`
and `DISubroutineType`.

While at a high-level `DISubroutineType` is a sort of composite of other
types, it has no shared code paths, and its fields are completely
disjoint.  This relationship was left over from the old debug info
hierarchy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243160 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Simplify DebugInfoFinder::processType(), NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 20:56:10 +0000 (20:56 +0000)]
DI: Simplify DebugInfoFinder::processType(), NFC

Handle `DISubroutineType` up-front rather than as part of a branch for
`DICompositeTypeBase`.  The only shared code path was looking through
the base type, but `DISubroutineType` can never have a base type.

This also removes the last use of `DICompositeTypeBase`, since we can
strengthen the cast to `DICompositeType`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243159 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Remove dead code: getDICompositeType()
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 20:46:46 +0000 (20:46 +0000)]
DI: Remove dead code: getDICompositeType()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243158 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAsmPrinter: Use DICompositeType in updateAcceleratorTables(), NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 20:45:26 +0000 (20:45 +0000)]
AsmPrinter: Use DICompositeType in updateAcceleratorTables(), NFC

`DISubroutineType` is impossible at this `dyn_cast` site, since we're
only dealing with named types and `DISubroutineType` cannot be named.
Strengthen the `dyn_cast` to `DICompositeType`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243157 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the simple virtual register allocation hints.
Alex Lorenz [Fri, 24 Jul 2015 20:35:40 +0000 (20:35 +0000)]
MIR Serialization: Serialize the simple virtual register allocation hints.

This commit serializes the virtual register allocations hints of type 0.
These hints specify the preferred physical registers for allocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243156 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Remove DIDerivedTypeBase
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 20:16:36 +0000 (20:16 +0000)]
DI: Remove DIDerivedTypeBase

Remove an unnecessary (and confusing) common subclass for
`DIDerivedType` and `DICompositeType`.  These classes aren't really
related, and even in the old debug info hierarchy, there was a
long-standing FIXME to separate them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243152 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoVerifier: Sink filename check into visitMDCompositeType(), NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 19:57:19 +0000 (19:57 +0000)]
Verifier: Sink filename check into visitMDCompositeType(), NFC

We really only want to check this for unions and classes (all the other
tags have been ruled out), so simplify the check and move it to the
right place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243150 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoVerifier: Remove unnecessary references to DW_TAG_subroutine_type, NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 19:52:18 +0000 (19:52 +0000)]
Verifier: Remove unnecessary references to DW_TAG_subroutine_type, NFC

Remove unnecessary references to `DW_TAG_subroutine_type` in
`visitDICompositeType()` and `visitDIDerivedTypeBase()`, since
`visitDISubroutineType()` doesn't call either of those (and shouldn't,
since subroutine types are really quite special).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243149 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Clarify isUnsignedDIType(), NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 19:42:12 +0000 (19:42 +0000)]
DI: Clarify isUnsignedDIType(), NFC

Refactor `isUnsignedDIType()` to deal with `DICompositeType` explicitly.
Since `DW_TAG_subroutine_type` isn't handled here (the assertions about
tags rule it out), this allows strengthening the `dyn_cast` to
`DIDerivedType`.

Besides making the code clearer, this it removes a use of
`DIDerivedTypeBase`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243148 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd const to some Type* parameters which didn't need to be mutable. NFC.
Pete Cooper [Fri, 24 Jul 2015 19:19:26 +0000 (19:19 +0000)]
Add const to some Type* parameters which didn't need to be mutable.  NFC.

We were only getting the size of the type which doesn't need to modify
the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243146 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused variable. NFC.
Diego Novillo [Fri, 24 Jul 2015 19:18:32 +0000 (19:18 +0000)]
Remove unused variable. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243145 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Strengthen some dyn_casts to DIDerivedType, NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 19:17:20 +0000 (19:17 +0000)]
DI: Strengthen some dyn_casts to DIDerivedType, NFC

The surrounding code proves in both cases that these must be
`DIDerivedType` if they're `DIDerivedTypeBase`, so strengthen the
`dyn_cast`s to the more specific type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243143 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the user-count threshold when analyzing read attributes
Jingyue Wu [Fri, 24 Jul 2015 19:05:53 +0000 (19:05 +0000)]
Remove the user-count threshold when analyzing read attributes

Summary:
This threshold limited FunctionAttrs ability to prove arguments to be read-only.
In NVPTX, a specialized instruction ld.global.nc can be used to load memory
with non-coherent texture cache. We notice that in SHOC [1] benchmark, some
function arguments are not marked with readonly because FunctionAttrs reaches
a hardcoded threshold when analysis uses.

Removing this threshold won't cause significant regression in compilation time, because the worst-case time complexity of the algorithm is still O(# of instructions) for each parameter.

Patched by Xuetian Weng.

[1] https://github.com/vetter/shoc

Reviewers: nlewycky, jingyue, nicholas

Subscribers: nicholas, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D11311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243141 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RewriteStatepointsForGC] Adjust naming scheme to be more stable
Philip Reames [Fri, 24 Jul 2015 19:01:39 +0000 (19:01 +0000)]
[RewriteStatepointsForGC] Adjust naming scheme to be more stable

The names for instructions inserted were previous dependent on iteration order.  By deriving the names from the original instructions, we can avoid instability in tests without resorting to ordered traversals.  It also makes the IR mildly easier to read at large scale.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243140 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Strengthen block-byref cast to DIDerivedType, NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 18:58:32 +0000 (18:58 +0000)]
DI: Strengthen block-byref cast to DIDerivedType, NFC

This code is visiting the members of a block-byref, and we know those
are all `DIDerivedType`.  Strengthen the cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243138 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse foreach loops for StructType::elements(). NFC.
Pete Cooper [Fri, 24 Jul 2015 18:55:49 +0000 (18:55 +0000)]
Use foreach loops for StructType::elements().  NFC.

We had a few places where we did

for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) {

but those could instead do

for (auto *EltTy : STy->elements()) {

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243136 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd const to a bunch of Type* in DataLayout. NFC.
Pete Cooper [Fri, 24 Jul 2015 18:29:09 +0000 (18:29 +0000)]
Add const to a bunch of Type* in DataLayout.  NFC.

Almost all methods in DataLayout took mutable pointers but didn't need to.
These were only accessing constant methods of the types, or using the Type*
to key a map.  Neither of these needs a mutable pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243135 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Only DICompositeType has getElements(), NFC
Duncan P. N. Exon Smith [Fri, 24 Jul 2015 18:17:17 +0000 (18:17 +0000)]
DI: Only DICompositeType has getElements(), NFC

There is an assertion inside `DICompositeTypeBase::getElements()` that
`this` is not a `DISubroutineType`, leaving only `DICompositeType`.
Make that clear at the call sites.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243134 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Run the machine verifier after initializing machine functions.
Alex Lorenz [Fri, 24 Jul 2015 17:44:49 +0000 (17:44 +0000)]
MIR Parser: Run the machine verifier after initializing machine functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243128 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RuntimeDyld] MachO: Add support for ARM scattered vanilla relocations.
Lang Hames [Fri, 24 Jul 2015 17:40:04 +0000 (17:40 +0000)]
[RuntimeDyld] MachO: Add support for ARM scattered vanilla relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243126 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Tests: Add liveins and successors to make tests pass with machine verifier.
Alex Lorenz [Fri, 24 Jul 2015 17:36:55 +0000 (17:36 +0000)]
MIR Tests: Add liveins and successors to make tests pass with machine verifier.

This commit adds the liveins and successors properties to machine basic blocks
in some of the MIR tests to ensure that the tests will pass when the MIR parser
will run the machine verifier after initializing a machine function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243124 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Tests: Make the basic block successor test an X86 specific test.
Alex Lorenz [Fri, 24 Jul 2015 17:31:55 +0000 (17:31 +0000)]
MIR Tests: Make the basic block successor test an X86 specific test.

This commit moves and transforms the generic test
'CodeGen/MIR/successor-basic-blocks.mir' into an X86 specific test
'CodeGen/MIR/X86/successor-basic-blocks.mir'. This change is required in order
to enable the machine verifier for the MIR parser, as the machine verifier
verifies that the machine basic blocks contain instructions that actually
determine the machine basic block successors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243123 91177308-0d34-0410-b5e6-96231b3b80d8