Chris pointed out that producing undef here is wrong in
general.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98649 91177308-0d34-0410-b5e6-96231b3b80d8

Remove redundant writeback flag in ARM addressing mode 5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98648 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the writeback flag from ARM's address mode 4.  Now that we have separate
instructions for ld/st with writeback, the flag is completely redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98643 91177308-0d34-0410-b5e6-96231b3b80d8

Fix unused variable warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98642 91177308-0d34-0410-b5e6-96231b3b80d8

--- Reverse-merging r98637 into '.':
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8

Initial ARM/Thumb disassembler check-in.  It consists of a tablgen backend
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w r9, [r7, #28]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8

Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98635 91177308-0d34-0410-b5e6-96231b3b80d8

more BranchInst tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98634 91177308-0d34-0410-b5e6-96231b3b80d8

NNT: Add -nouname option, so machine uniquing can occur across physical machines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98633 91177308-0d34-0410-b5e6-96231b3b80d8

add BranchInst tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98632 91177308-0d34-0410-b5e6-96231b3b80d8

appease valgrind testers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98628 91177308-0d34-0410-b5e6-96231b3b80d8

Check that P is not zero initialized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98627 91177308-0d34-0410-b5e6-96231b3b80d8

add single return tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98625 91177308-0d34-0410-b5e6-96231b3b80d8

fix PR6589
adjusted unittest

I have added some doxygen to OptionalOperandTraits,
so hopefully there will be no confusion in the future.

Incidentally OptionalOperandTraits is not used any more (IIUC),
but the obvious client would be BranchInstr, and I plan
to rearrange it that way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98624 91177308-0d34-0410-b5e6-96231b3b80d8

begin humbly with a repro of PR6589

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98623 91177308-0d34-0410-b5e6-96231b3b80d8

add support for bugpointing the integrated assembler.  Something like this
works for me: bugpoint Output/bisort.llvm.bc -run-llc-ia -safe-run-llc

This uses llc with the integrated assembler as the test compiler and llc
without it as the safe compiler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98618 91177308-0d34-0410-b5e6-96231b3b80d8

fix the same bug on the x86-64 side of the fence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98616 91177308-0d34-0410-b5e6-96231b3b80d8

fix the encoding of TAILJMPd.  This fixes Benchmarks/Olden/bisort
with the integrated assembler!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98615 91177308-0d34-0410-b5e6-96231b3b80d8

Avoid a memory leak in JITDebugRegisterer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98612 91177308-0d34-0410-b5e6-96231b3b80d8

Add a testcase for the change in r98586.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98610 91177308-0d34-0410-b5e6-96231b3b80d8

Use getFirstTerminator().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98604 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot testcase for r98599.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98602 91177308-0d34-0410-b5e6-96231b3b80d8

When checking if something's killed, don't rely simply on whether it's marked as
"used outside of the block". If the block ends in a return, then it won't be
used outside of it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98599 91177308-0d34-0410-b5e6-96231b3b80d8

don't form a RecordChild or CheckChildType for child #'s over 7, we don't
have enums for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98597 91177308-0d34-0410-b5e6-96231b3b80d8

Wrap a long line and add some parens to be consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98596 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the third (and last known) case of code update problems due
to LLVM IR changes with addr label weirdness.  In the testcase, we
generate references to the two bb's when codegen'ing the first
function:

_test1:                                 ## @test1
leaq Ltmp0(%rip), %rax
..
leaq Ltmp1(%rip), %rax

Then continue to codegen the second function where the blocks
get merged.  We're now smart enough to emit both labels, producing
this code:

_test_fun:                              ## @test_fun
## BB#0:                                ## %entry
Ltmp1:                                  ## Block address taken
Ltmp0:
## BB#1:                                ## %ret
movl $-1, %eax
ret

Rejoice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98595 91177308-0d34-0410-b5e6-96231b3b80d8

MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr.
 - Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
 - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98592 91177308-0d34-0410-b5e6-96231b3b80d8

Recognize code for doing vector gather/scatter index calculations with
32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98588 91177308-0d34-0410-b5e6-96231b3b80d8

Translate "cc" clobber in ARM inline assembly to ARM::CCRRegisterClass.
Radar 7459078.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98586 91177308-0d34-0410-b5e6-96231b3b80d8

Skip debug info intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98584 91177308-0d34-0410-b5e6-96231b3b80d8

MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and external relocations, but we don't have x86_64 relocations yet).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98583 91177308-0d34-0410-b5e6-96231b3b80d8

MC/Mach-O: Add MCSectionMachO::getType()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98582 91177308-0d34-0410-b5e6-96231b3b80d8

Skip debug info intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98581 91177308-0d34-0410-b5e6-96231b3b80d8

Now that the default for Darwin platforms is to place the LSDA into the TEXT
section, remove the target-specific code that performs this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98580 91177308-0d34-0410-b5e6-96231b3b80d8

Implement support for the case when a reference to a addr-of-bb
label is generated, but then the block is deleted.  Since the
value is undefined, we just emit the label right after the entry
label of the function.  It might matter that the label is in the
same section as the function was afterall.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98579 91177308-0d34-0410-b5e6-96231b3b80d8

use Mang->getSymbol()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98578 91177308-0d34-0410-b5e6-96231b3b80d8

use Mang->getSymbol() more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98577 91177308-0d34-0410-b5e6-96231b3b80d8

Extend MemoryBuffer::getFile() to take an optional "stat" structure
pointer. If given, the structure will be set with the stat information from
the file actually read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98575 91177308-0d34-0410-b5e6-96231b3b80d8

Create SDDbgValue for dbg_value intrinsics and remember its connections with DAG nodes.
This is a work in progress. Patch by Dale Johannesen!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98568 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the case when a reference to an address taken BB is emitted in one
function, then the BB is RAUW'd before the definition is emitted.  There
are still two cases not being handled, but this should improve us back to
the situation before I touched anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98566 91177308-0d34-0410-b5e6-96231b3b80d8

In "empty" bb, the return instruction may not be first instruction, if dbg value intrinsics are present in this bb. Use terminator to find return instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98565 91177308-0d34-0410-b5e6-96231b3b80d8

Place the LSDA into the TEXT section for x86 Darwin. If the global it's pointing
to is local to the translation unit, we need to place fill the value of that
symbol into the non-lazy pointer.

This should conclude all Darwin changes for placing the LSDA into the TEXT
section. There is some cleanup to do. I.e., there's no longer a special need for
target-specific code here. But that can come later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98564 91177308-0d34-0410-b5e6-96231b3b80d8

Avoid sibcall optimization if either caller or callee is using sret semantics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98561 91177308-0d34-0410-b5e6-96231b3b80d8

revert r98550, it isn't necessary or sufficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98558 91177308-0d34-0410-b5e6-96231b3b80d8

Emit dwarf variable info communicated by code generator through DBG_VALUE machine instructions.
This is a work in progress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98556 91177308-0d34-0410-b5e6-96231b3b80d8

don't eliminate address-taken blocks here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98550 91177308-0d34-0410-b5e6-96231b3b80d8

SIGN_EXTEND from the same type as the dest is valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98548 91177308-0d34-0410-b5e6-96231b3b80d8

sink the call to VT.getSizeInBits() down into its uses,
not all unary nodes necessarily have a simple result type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98547 91177308-0d34-0410-b5e6-96231b3b80d8

Treat copysignl like the other copysign functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98542 91177308-0d34-0410-b5e6-96231b3b80d8

Don't save a temporary string into a StringRef field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98538 91177308-0d34-0410-b5e6-96231b3b80d8

fix MCSectionELF to not leak memory, just like I did for MCSymbol.
MCSectionMachO is already fine (yay for fixed size arrays?),
MCSectionCOFF still leaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98537 91177308-0d34-0410-b5e6-96231b3b80d8

fix a memory leak yjasskin pointed out: MCSymbol is bump pointer
allocated and thus not freed.  This is cool except that it contains
and std::string so the string data didn't get freed.  In any case
there is no reason to redundantly store the string data in the
MCSymbol anyway, just make the MCSymbol ref the string data in the
MCContext StringMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98536 91177308-0d34-0410-b5e6-96231b3b80d8

eliminate some #if 0 code I added in r96905, type inference
now enforces that input/output named values have hte same type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98535 91177308-0d34-0410-b5e6-96231b3b80d8

Completely rewrite tblgen's type inference mechanism,
changing the primary datastructure from being a
"std::vector<unsigned char>" to being a new TypeSet class
that actually has (gasp) invariants!

This changes more things than I remember, but one major
innovation here is that it enforces that named input
values agree in type with their output values.

This also eliminates code that transparently assumes (in
some cases) that SDNodeXForm input/output types are the
same, because this is wrong in many case.

This also eliminates a bug which caused a lot of ambiguous
patterns to go undetected, where a register class would
sometimes pick the first possible type, causing an
ambiguous pattern to get arbitrary results.

With all the recent target changes, this causes no
functionality change!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98534 91177308-0d34-0410-b5e6-96231b3b80d8

MachineMove ctor doesn't need to to mutate input, add 'const'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98533 91177308-0d34-0410-b5e6-96231b3b80d8

do some serious surgery on CellSPU to get it back into a world
where it uses types consistently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98532 91177308-0d34-0410-b5e6-96231b3b80d8

fix a few more ambiguous types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98531 91177308-0d34-0410-b5e6-96231b3b80d8

add some missing types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98530 91177308-0d34-0410-b5e6-96231b3b80d8

Tell Valgrind when we modify already-executed machine code so it knows
to re-instrument the code.  We depend on the system valgrind.h to
avoid adding a new license.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98529 91177308-0d34-0410-b5e6-96231b3b80d8

various cleanups from daniel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98528 91177308-0d34-0410-b5e6-96231b3b80d8

fix an ambiguous pattern, contrary to expectations, scalar_to_vector
doesn't have a type constraint on the scalar because we don't have
an 'sAny' type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98527 91177308-0d34-0410-b5e6-96231b3b80d8

remove dead method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98526 91177308-0d34-0410-b5e6-96231b3b80d8

don't forget to close a FD on an error condition, found by
cppcheck, PR6617.  Patch by Ettl Martin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98525 91177308-0d34-0410-b5e6-96231b3b80d8

tidy up and expound more on how half-float works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98524 91177308-0d34-0410-b5e6-96231b3b80d8

tidy indentation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98523 91177308-0d34-0410-b5e6-96231b3b80d8

no really, all 64-bit cpu's have cmov support. This should
fix the rest of the buildbot failures on non-x86 hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98522 91177308-0d34-0410-b5e6-96231b3b80d8

filecheckize a test and mark these wiht a cpu so it passes
on hosts without cmovs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98521 91177308-0d34-0410-b5e6-96231b3b80d8

all 64-bit cpus have cmov, this should fix CodeGen/X86/cmov.ll
(at least) on non-x86 builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98520 91177308-0d34-0410-b5e6-96231b3b80d8

Remove pointless forward declaration, MSVC got confused by this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98519 91177308-0d34-0410-b5e6-96231b3b80d8

Turn calls to copysignl into an FCOPYSIGN node.  Handle FCOPYSIGN nodes
with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8

Rename SDDbgValue.h to SDNodeDbgValue.h for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98513 91177308-0d34-0410-b5e6-96231b3b80d8

fix ShrinkDemandedOps to not leave dead nodes around,
fixing PR6607

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98512 91177308-0d34-0410-b5e6-96231b3b80d8

rewrite ShrinkDemandedOps to be faster and indent less,
no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98511 91177308-0d34-0410-b5e6-96231b3b80d8

Fix jit encoding bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98510 91177308-0d34-0410-b5e6-96231b3b80d8

make -view-isel-dags print after the 'ShrinkDemandedOps' pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98509 91177308-0d34-0410-b5e6-96231b3b80d8

don't have i386-specific tests in CodeGen/Generic, PR6601.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98508 91177308-0d34-0410-b5e6-96231b3b80d8

fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), not
the operand type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98507 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98506 91177308-0d34-0410-b5e6-96231b3b80d8

Document fp16 intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98505 91177308-0d34-0410-b5e6-96231b3b80d8

Feature test for half precision FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98504 91177308-0d34-0410-b5e6-96231b3b80d8

Add substarget feature for FP16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98503 91177308-0d34-0410-b5e6-96231b3b80d8

Add codegen support for FP16 on ARM

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98502 91177308-0d34-0410-b5e6-96231b3b80d8

Make default expansion for FP16 <-> FP32 nodes into libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98501 91177308-0d34-0410-b5e6-96231b3b80d8

Add DAG nodes to represent FP16 <-> FP32 intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98500 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98499 91177308-0d34-0410-b5e6-96231b3b80d8

The fp16 <-> fp32 intrinsics are pure, mark them so they can be CSE'd, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98498 91177308-0d34-0410-b5e6-96231b3b80d8

Add intrinsics to represent fp16 <-> fp32 conversions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98497 91177308-0d34-0410-b5e6-96231b3b80d8

add support for pentium class CPUs which do not have cmov,
PR4841.  Patch by Craig Smith!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98496 91177308-0d34-0410-b5e6-96231b3b80d8

fix AsmPrinter::GetBlockAddressSymbol to always return a unique
label instead of trying to form one based on the BB name (which
causes collisions if the name is empty).  This fixes PR6608

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8

comment fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98494 91177308-0d34-0410-b5e6-96231b3b80d8

shrink 4-byte branches to 1-byte branches when lowering from
MachineInstr -> MCInst.  This is what the assembler backend wants,
it relaxes from smaller to larger things.  This fixes rdar://7750815

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98493 91177308-0d34-0410-b5e6-96231b3b80d8

Skip over debug info when trying to merge two return BBs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98491 91177308-0d34-0410-b5e6-96231b3b80d8

Make returns more consistent with others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98490 91177308-0d34-0410-b5e6-96231b3b80d8

get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8

fix these two get the mcsymbol operand instead of imm operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98487 91177308-0d34-0410-b5e6-96231b3b80d8

add a new CreateTempSymbol method, the use case for
CreateTempSymbol vs GetOrCreateTemporarySymbol are
completely different.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98486 91177308-0d34-0410-b5e6-96231b3b80d8

don't use getDWLabel("label" anymore, always go through MMI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98485 91177308-0d34-0410-b5e6-96231b3b80d8

remove now-dead code, all labels use MCSymbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98484 91177308-0d34-0410-b5e6-96231b3b80d8

change SrcLineInfo to contain a label instead of a label ID.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98483 91177308-0d34-0410-b5e6-96231b3b80d8

Now that DBG_LABEL is updated, we can finally make MachineMove
contain an MCSymbol instead of a label index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98482 91177308-0d34-0410-b5e6-96231b3b80d8