oota-llvm.git
7 years agoFix a typo I spotted when hacking on SROA. Somewhat alarming that
Chandler Carruth [Wed, 9 Sep 2015 09:46:16 +0000 (09:46 +0000)]
Fix a typo I spotted when hacking on SROA. Somewhat alarming that
nothing broke.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247127 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement CACHEE and PREFE instructions
Zoran Jovanovic [Wed, 9 Sep 2015 09:10:46 +0000 (09:10 +0000)]
[mips][microMIPS] Implement CACHEE and PREFE instructions
Differential Revision: http://reviews.llvm.org/D11628

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247125 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix not encoding src2 of VOP3b instructions
Matt Arsenault [Wed, 9 Sep 2015 08:39:49 +0000 (08:39 +0000)]
AMDGPU: Fix not encoding src2 of VOP3b instructions

Broken by r247074. Should include an assembler test,
but the assembler is currently broken for VOP3b apparently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247123 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IRCE] Add INITIALIZE_PASS_DEPENDENCY invocations.
Sanjoy Das [Wed, 9 Sep 2015 03:47:18 +0000 (03:47 +0000)]
[IRCE] Add INITIALIZE_PASS_DEPENDENCY invocations.

IRCE was just using INITIALIZE_PASS(), which is incorrect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247122 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RuntimeDyld] Add support for MachO x86_64 SUBTRACTOR relocation.
Lang Hames [Wed, 9 Sep 2015 03:14:29 +0000 (03:14 +0000)]
[RuntimeDyld] Add support for MachO x86_64 SUBTRACTOR relocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247119 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Fix lowering of calls with more than one argument.
Dan Gohman [Wed, 9 Sep 2015 01:52:45 +0000 (01:52 +0000)]
[WebAssembly] Fix lowering of calls with more than one argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247118 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSelectionDAG: Support Expand of f16 extloads
Matt Arsenault [Wed, 9 Sep 2015 01:12:27 +0000 (01:12 +0000)]
SelectionDAG: Support Expand of f16 extloads

Currently this hits an assert that extload should
always be supported, which assumes integer extloads.

This moves a hack out of SI's argument lowering and
is covered by existing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247113 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Implement WebAssemblyInstrInfo::copyPhysReg
Dan Gohman [Wed, 9 Sep 2015 00:52:47 +0000 (00:52 +0000)]
[WebAssembly] Implement WebAssemblyInstrInfo::copyPhysReg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247110 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typos / grammar
Matt Arsenault [Wed, 9 Sep 2015 00:38:33 +0000 (00:38 +0000)]
Fix typos / grammar

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247109 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC"
Duncan P. N. Exon Smith [Wed, 9 Sep 2015 00:37:52 +0000 (00:37 +0000)]
Revert "Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC"

This reverts commit r247107.  Turns out clang calls these functions
directly, and `ArrayRef<T>` doesn't have a working implicit conversion
from `SmallVector<T>`.

http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/14247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247108 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC
Duncan P. N. Exon Smith [Wed, 9 Sep 2015 00:34:25 +0000 (00:34 +0000)]
Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC

Change `EmitRecordWithAbbrev()` and friends to take an `ArrayRef<T>`
instead of requiring a `SmallVectorImpl<T>`.  No functionality change
intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247107 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] MachO -- dump LinkerOptions load command.
Davide Italiano [Wed, 9 Sep 2015 00:21:18 +0000 (00:21 +0000)]
[llvm-readobj] MachO -- dump LinkerOptions load command.

Example output:

Linker Options {
  Size: 32
  Count: 2
  Strings [
    Value: -framework
    Value: Cocoa
  ]
}

There were only two tests using this -- so I converted them as part of
this commit rather than separately.

Differential Revision:  http://reviews.llvm.org/D12702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247106 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Avoid creating MBBs for LLVM BBs that cannot contain code
Reid Kleckner [Tue, 8 Sep 2015 23:28:38 +0000 (23:28 +0000)]
[WinEH] Avoid creating MBBs for LLVM BBs that cannot contain code

Typically these are catchpads, which hold data used to decide whether to
catch the exception or continue unwinding. We also shouldn't create MBBs
for catchendpads, cleanupendpads, or terminatepads, since no real code
can live in them.

This fixes a problem where MI passes (like the register allocator) would
try to put code into catchpad blocks, which are not executed by the
runtime. In the new world, blocks ending in invokes now have many
possible successors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247102 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-apply r247080 with order of evaluation fix.
Peter Collingbourne [Tue, 8 Sep 2015 22:49:35 +0000 (22:49 +0000)]
Re-apply r247080 with order of evaluation fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247095 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Emit prologues and epilogues for funclets
Reid Kleckner [Tue, 8 Sep 2015 22:44:41 +0000 (22:44 +0000)]
[WinEH] Emit prologues and epilogues for funclets

Summary:
32-bit funclets have short prologues that allocate enough stack for the
largest call in the whole function. The runtime saves CSRs for the
funclet. It doesn't restore CSRs after we finally transfer control back
to the parent funciton via a CATCHRET, but that's a separate issue.
32-bit funclets also have to adjust the incoming EBP value, which is
what llvm.x86.seh.recoverframe does in the old model.

64-bit funclets need to spill CSRs as normal. For simplicity, this just
spills the same set of CSRs as the parent function, rather than trying
to compute different CSR sets for the parent function and each funclet.
64-bit funclets also allocate enough stack space for the largest
outgoing call frame, like 32-bit.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247092 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r247080, "LowerBitSets: Extend pass to support functions as bitset
Peter Collingbourne [Tue, 8 Sep 2015 22:33:23 +0000 (22:33 +0000)]
Revert r247080, "LowerBitSets: Extend pass to support functions as bitset
members." as it causes test failures on a number of bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247088 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Bitcode] Add compatibility tests for new instructions
Vedant Kumar [Tue, 8 Sep 2015 22:33:23 +0000 (22:33 +0000)]
[Bitcode] Add compatibility tests for new instructions

Adds basic compatibility tests for the following instructions:

  catchpad, catchendpad, cleanuppad, cleanupendpad, terminatepad,
  cleanupret, catchret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247087 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[docs] Fix typo in catchret example
Vedant Kumar [Tue, 8 Sep 2015 22:28:38 +0000 (22:28 +0000)]
[docs] Fix typo in catchret example

An example usage of catchret omitted the "to" in "to label" in
ExceptionHandling.rst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247086 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the PPC CTR Loop pass to look for calls to the intrinsics that
Eric Christopher [Tue, 8 Sep 2015 22:14:58 +0000 (22:14 +0000)]
Fix the PPC CTR Loop pass to look for calls to the intrinsics that
read CTR and count them as reading the CTR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247083 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLowerBitSets: Extend pass to support functions as bitset members.
Peter Collingbourne [Tue, 8 Sep 2015 21:57:45 +0000 (21:57 +0000)]
LowerBitSets: Extend pass to support functions as bitset members.

This change extends the bitset lowering pass to support bitsets that may
contain either functions or global variables. A function bitset is lowered to
a jump table that is laid out before one of the functions in the bitset.

Also add support for non-string bitset identifier names. This allows for
distinct metadata nodes to stand in for names with internal linkage,
as done in D11857.

Differential Revision: http://reviews.llvm.org/D11856

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247080 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer]Add a test for defeating a hash sum.
Ivan Krasin [Tue, 8 Sep 2015 21:22:52 +0000 (21:22 +0000)]
[libFuzzer]Add a test for defeating a hash sum.

Summary:
Add a test for a data followed by 4-byte hash value.
I use a slightly modified Jenkins hash function,
as described in https://en.wikipedia.org/wiki/Jenkins_hash_function

The modification is to ensure that hash(zeros) != 0.

Reviewers: kcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247076 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Fix input vcc operand for VOP2b instructions
Matt Arsenault [Tue, 8 Sep 2015 21:15:00 +0000 (21:15 +0000)]
AMDGPU/SI: Fix input vcc operand for VOP2b instructions

Adds vcc to output string input for e32. Allows option
of using e64 encoding with assembler.

Also fixes these instructions not implicitly reading exec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247074 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[NVPTX] Added run NVVMReflect pass to NVPTX back-end.
Artem Belevich [Tue, 8 Sep 2015 21:04:55 +0000 (21:04 +0000)]
[NVPTX] Added run NVVMReflect pass to NVPTX back-end.

The pass is needed to remove __nvvm_reflect calls when we link in
libdevice bitcode that comes with CUDA.

Differential Revision: http://reviews.llvm.org/D11663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247072 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix comments and RUN line in x86-64 stdarg test leftover from last commit
Derek Schuff [Tue, 8 Sep 2015 20:58:41 +0000 (20:58 +0000)]
Fix comments and RUN line in x86-64 stdarg test leftover from last commit

From http://reviews.llvm.org/D12346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247070 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agox32. Fixes a bug in how struct va_list is initialized in x32
Derek Schuff [Tue, 8 Sep 2015 20:51:31 +0000 (20:51 +0000)]
x32. Fixes a bug in how struct va_list is initialized in x32

Summary: This patch modifies X86TargetLowering::LowerVASTART so that
struct va_list is initialized with 32 bit pointers in x32. It also
includes tests that call @llvm.va_start() for x32.

Patch by João Porto

Subscribers: llvm-commits, hjl.tools
Differential Revision: http://reviews.llvm.org/D12346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247069 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] remove a piece of stale code
Kostya Serebryany [Tue, 8 Sep 2015 20:40:10 +0000 (20:40 +0000)]
[libFuzzer] remove a piece of stale code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247067 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] be more robust when dealing with files on disk (e.g. don't crash if a...
Kostya Serebryany [Tue, 8 Sep 2015 20:36:33 +0000 (20:36 +0000)]
[libFuzzer] be more robust when dealing with files on disk (e.g. don't crash if a file was there but disappeared)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247066 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Support running without a register allocator in the default CodeGen...
Dan Gohman [Tue, 8 Sep 2015 20:36:33 +0000 (20:36 +0000)]
[WebAssembly] Support running without a register allocator in the default CodeGen passes

This allows backends which don't use a traditional register allocator,
but do need PHI lowering and other passes, to use the default
TargetPassConfig::addFastRegAlloc and
TargetPassConfig::addOptimizedRegAlloc implementations.

Differential Revision: http://reviews.llvm.org/D12691

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247065 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd const overload of findRegisterUseOperand
Matt Arsenault [Tue, 8 Sep 2015 20:21:29 +0000 (20:21 +0000)]
Add const overload of findRegisterUseOperand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247063 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[docs] Update documentation for the landingpad instruction
Vedant Kumar [Tue, 8 Sep 2015 20:16:35 +0000 (20:16 +0000)]
[docs] Update documentation for the landingpad instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247062 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agorefactor matches for De Morgan's Laws; NFCI
Sanjay Patel [Tue, 8 Sep 2015 20:14:13 +0000 (20:14 +0000)]
refactor matches for De Morgan's Laws; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247061 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Mark s_barrier as a high latency instruction
Matt Arsenault [Tue, 8 Sep 2015 19:54:32 +0000 (19:54 +0000)]
AMDGPU: Mark s_barrier as a high latency instruction

These were marked as WriteSALU, which is low latency.
I'm guessing at the value to use, but it should probably
be considered the highest latency instruction.

I'm not sure this has any actual effect since hasSideEffects
probably is preventing any moving of these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247060 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix s_barrier flags
Matt Arsenault [Tue, 8 Sep 2015 19:54:25 +0000 (19:54 +0000)]
AMDGPU: Fix s_barrier flags

This should be convergent. This is not a
barrier in the isBarrier sense, nor
hasCtrlDep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247059 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agox32. Fixes a bug in i8mem_NOREX declaration.
Derek Schuff [Tue, 8 Sep 2015 19:47:15 +0000 (19:47 +0000)]
x32. Fixes a bug in i8mem_NOREX declaration.

The old implementation assumed LP64 which is broken for x32.  Specifically, the
MOVE8rm_NOREX and MOVE8mr_NOREX, when selected, would cause a 'Cannot emit
physreg copy instruction' error message to be reported.

This patch also enable the h-register*ll tests for x32.

Differential Revision: http://reviews.llvm.org/D12336

Patch by João Porto

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247058 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Handle sub of constant for DS offset folding
Matt Arsenault [Tue, 8 Sep 2015 19:34:22 +0000 (19:34 +0000)]
AMDGPU: Handle sub of constant for DS offset folding

sub C, x - > add (sub 0, x), C for DS offsets.

This is mostly to fix regressions that show up when
SeparateConstOffsetFromGEP is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247054 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix PR 24723 - Handle 0-mass backedges in irreducible loops
Diego Novillo [Tue, 8 Sep 2015 19:22:17 +0000 (19:22 +0000)]
Fix PR 24723 - Handle 0-mass backedges in irreducible loops

This corner case happens when we have an irreducible SCC that is
deeply nested.  As we work down the tree, the backedge masses start
getting smaller and smaller until we reach one that is down to 0.

Since we distribute the incoming mass using the backedge masses as
weight, the distributor does not allow zero weights.  So, we simply
ignore them (which will just use the weights of the non-zero nodes).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247050 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC/ELF] Accept zero for .align directive
Davide Italiano [Tue, 8 Sep 2015 18:59:47 +0000 (18:59 +0000)]
[MC/ELF] Accept zero for .align directive

.align directive refuses alignment 0 -- a comment in the code hints this is
done for GNU as compatibility, but it seems GNU as accepts .align 0
(and silently rounds up alignment to 1).

Differential Revision:  http://reviews.llvm.org/D12682

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247048 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix CPP Backend for GEP API changes for opaque pointer types
David Blaikie [Tue, 8 Sep 2015 18:42:29 +0000 (18:42 +0000)]
Fix CPP Backend for GEP API changes for opaque pointer types

Based on a patch by Jerome Witmann.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247047 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMerge or combine tests and convert to FileCheck.
Benjamin Kramer [Tue, 8 Sep 2015 18:36:56 +0000 (18:36 +0000)]
Merge or combine tests and convert to FileCheck.

- Move tests only exercising instsimplify to instsimplify's apint-or.ll
- Actually test the CHECK lines in instsimplify's apint-or.ll
- Merge the remaining tests in apint-or1.ll and apint-or2.ll, use FileCheck

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247045 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix isDiscardableIfUnused to include available_externally linkage.
Evgeniy Stepanov [Tue, 8 Sep 2015 18:25:20 +0000 (18:25 +0000)]
Fix isDiscardableIfUnused to include available_externally linkage.

AvailableExternally functions are discardable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247044 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove function names from comments; NFC
Sanjay Patel [Tue, 8 Sep 2015 18:24:36 +0000 (18:24 +0000)]
remove function names from comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247043 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix for bz24500: Avoid non-deterministic code generation triggered by the x86 call...
Andrew Kaylor [Tue, 8 Sep 2015 18:18:46 +0000 (18:18 +0000)]
Fix for bz24500: Avoid non-deterministic code generation triggered by the x86 call frame optimization

Patch by Dave Kreitzer

Differential Revision: http://reviews.llvm.org/D12620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247042 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd tests for De Morgan instcombines based on PR22723
Sanjay Patel [Tue, 8 Sep 2015 18:13:03 +0000 (18:13 +0000)]
add tests for De Morgan instcombines based on PR22723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247040 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typos, remove noise; NFCI
Sanjay Patel [Tue, 8 Sep 2015 17:58:22 +0000 (17:58 +0000)]
fix typos, remove noise; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247035 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] better documentatio for -save_minimized_corpus=1
Kostya Serebryany [Tue, 8 Sep 2015 17:43:51 +0000 (17:43 +0000)]
[libFuzzer] better documentatio for -save_minimized_corpus=1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247033 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Bitcode] Add compatibility test for llvm 3.7.0
Vedant Kumar [Tue, 8 Sep 2015 17:39:21 +0000 (17:39 +0000)]
[Bitcode] Add compatibility test for llvm 3.7.0

This patch adds llvm-3.7 IR and generated bitcode for our compatibility
test (in accordance with the developer policy).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247031 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] remove -iterations as redundant (there is also -num_runs)
Kostya Serebryany [Tue, 8 Sep 2015 17:30:35 +0000 (17:30 +0000)]
[libFuzzer] remove -iterations as redundant (there is also -num_runs)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247030 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: NFC rename shr/sar
JF Bastien [Tue, 8 Sep 2015 17:21:21 +0000 (17:21 +0000)]
WebAssembly: NFC rename shr/sar

Renamed from: https://github.com/WebAssembly/design/pull/332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247028 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add one more mutator: Mutate_ChangeASCIIInteger
Kostya Serebryany [Tue, 8 Sep 2015 17:19:31 +0000 (17:19 +0000)]
[libFuzzer] add one more mutator: Mutate_ChangeASCIIInteger

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247027 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove white space (test commit)
Jun Bum Lim [Tue, 8 Sep 2015 16:11:22 +0000 (16:11 +0000)]
Remove white space (test commit)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247021 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement LLE, LUI, LW and LWE instructions
Zoran Jovanovic [Tue, 8 Sep 2015 15:02:50 +0000 (15:02 +0000)]
[mips][microMIPS] Implement LLE, LUI, LW and LWE instructions
Differential Revision: http://reviews.llvm.org/D1179

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247017 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Temporarily disable this test, as it depends on additional patches...
Dan Gohman [Tue, 8 Sep 2015 13:21:12 +0000 (13:21 +0000)]
[WebAssembly] Temporarily disable this test, as it depends on additional patches that aren't yet checked in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247011 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: kunpck encoding implementation
Igor Breger [Tue, 8 Sep 2015 13:10:00 +0000 (13:10 +0000)]
AVX512: kunpck encoding implementation
Added tests for encoding.

Differential Revision: http://reviews.llvm.org/D12061

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247010 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Enable SSA lowering and other pre-regalloc passes
Dan Gohman [Tue, 8 Sep 2015 12:39:25 +0000 (12:39 +0000)]
[WebAssembly] Enable SSA lowering and other pre-regalloc passes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247008 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemoved an old comment, NFC
Elena Demikhovsky [Tue, 8 Sep 2015 12:22:22 +0000 (12:22 +0000)]
Removed an old comment, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247006 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIRLangRef: Add documentation for the subregister indices.
Alex Lorenz [Tue, 8 Sep 2015 11:39:47 +0000 (11:39 +0000)]
MIRLangRef: Add documentation for the subregister indices.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247005 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIRLangRef: Add documentation for the global value machine operands.
Alex Lorenz [Tue, 8 Sep 2015 11:38:16 +0000 (11:38 +0000)]
MIRLangRef: Add documentation for the global value machine operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247004 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructions
Zoran Jovanovic [Tue, 8 Sep 2015 10:18:38 +0000 (10:18 +0000)]
[mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructions
Differential Revision: http://reviews.llvm.org/D11801

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246999 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThere is a trunc(lshr (zext A), Cst) optimization in InstCombineCasts that
Jakub Kuderski [Tue, 8 Sep 2015 10:03:17 +0000 (10:03 +0000)]
There is a trunc(lshr (zext A), Cst) optimization in InstCombineCasts that
removes cast by performing the lshr on smaller types. However, currently there
is no trunc(lshr (sext A), Cst) variant.
This patch add such optimization by transforming trunc(lshr (sext A), Cst)
to ashr A, Cst.

Differential Revision: http://reviews.llvm.org/D12520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246997 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Reserve address spaces 1-255 for software use.
Daniel Sanders [Tue, 8 Sep 2015 09:07:03 +0000 (09:07 +0000)]
[mips] Reserve address spaces 1-255 for software use.

Summary: And define them to have noop casts with address spaces 0-255.

Reviewers: pekka.jaaskelainen

Subscribers: pekka.jaaskelainen, llvm-commits

Differential Revision: http://reviews.llvm.org/D12678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246990 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit LBU16...
Zoran Jovanovic [Tue, 8 Sep 2015 08:25:34 +0000 (08:25 +0000)]
[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit LBU16, LHU16, LW16, LWGP and LWSP instructions
Differential Revision: http://reviews.llvm.org/D10956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246987 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake][CMP0051] Avoid for user of objlib to use llvm_update_compile_flags().
NAKAMURA Takumi [Tue, 8 Sep 2015 07:42:06 +0000 (07:42 +0000)]
[CMake][CMP0051] Avoid for user of objlib to use llvm_update_compile_flags().

$<TARGET_OBJECTS> shouldn't require compile flags. Flags are set in obj.${name}.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246984 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agocompilation issue, NFC
Elena Demikhovsky [Tue, 8 Sep 2015 07:34:06 +0000 (07:34 +0000)]
compilation issue, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246983 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofixed compilation issue, NFC.
Elena Demikhovsky [Tue, 8 Sep 2015 07:10:08 +0000 (07:10 +0000)]
fixed compilation issue, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246982 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Lowering for 512-bit vector shuffles.
Elena Demikhovsky [Tue, 8 Sep 2015 06:38:21 +0000 (06:38 +0000)]
AVX-512: Lowering for 512-bit vector shuffles.
Vector types: <8 x 64>, <16 x 32>, <32 x 16> float and integer.

Differential Revision: http://reviews.llvm.org/D10683

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246981 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] Shrink code a little bit. No functional change.
Davide Italiano [Mon, 7 Sep 2015 20:47:03 +0000 (20:47 +0000)]
[llvm-readobj] Shrink code a little bit. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246976 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd missing regression tests for De Morgan's Law transform in InstCombine
Sanjay Patel [Mon, 7 Sep 2015 19:00:38 +0000 (19:00 +0000)]
add missing regression tests for De Morgan's Law transform in InstCombine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246973 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement ABS.fmt, CEIL.L.fmt, CEIL.W.fmt, FLOOR.L.fmt, FLOOR.W...
Zoran Jovanovic [Mon, 7 Sep 2015 13:01:04 +0000 (13:01 +0000)]
[mips][microMIPS] Implement ABS.fmt, CEIL.L.fmt, CEIL.W.fmt, FLOOR.L.fmt, FLOOR.W.fmt, TRUNC.L.fmt, TRUNC.W.fmt, RSQRT.fmt and SQRT.fmt instructions
Differential Revision: http://reviews.llvm.org/D11674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246968 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions
Zoran Jovanovic [Mon, 7 Sep 2015 11:56:37 +0000 (11:56 +0000)]
[mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions
Differential Revision: http://reviews.llvm.org/D11181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246963 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Get rid of SelectT2ShifterOperandReg, NFC
John Brawn [Mon, 7 Sep 2015 11:45:18 +0000 (11:45 +0000)]
[ARM] Get rid of SelectT2ShifterOperandReg, NFC

SelectT2ShifterOperandReg has identical behaviour to SelectImmShifterOperand,
so get rid of it and use SelectImmShifterOperand instead.

Differential Revision: http://reviews.llvm.org/D12195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246962 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, MAX.fmt,...
Zoran Jovanovic [Mon, 7 Sep 2015 10:31:31 +0000 (10:31 +0000)]
[mips][microMIPS] Implement CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, MAX.fmt, MIN.fmt, MAXA.fmt, MINA.fmt and CMP.condn.fmt instructions
Differential Revision: http://reviews.llvm.org/D12141

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246960 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCODE_OWNERS.TXT is supposed to be sorted by surname
David Majnemer [Mon, 7 Sep 2015 00:41:40 +0000 (00:41 +0000)]
CODE_OWNERS.TXT is supposed to be sorted by surname

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246954 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPrune utf8 chars in comments.
NAKAMURA Takumi [Mon, 7 Sep 2015 00:26:54 +0000 (00:26 +0000)]
Prune utf8 chars in comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246953 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][MMX] Added missing stack folding tests for MMX/SSSE3 instructions
Simon Pilgrim [Sun, 6 Sep 2015 17:50:15 +0000 (17:50 +0000)]
[X86][MMX] Added missing stack folding tests for MMX/SSSE3 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246949 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Added 512-bit vector shift tests.
Simon Pilgrim [Sun, 6 Sep 2015 13:36:32 +0000 (13:36 +0000)]
[X86][AVX512] Added 512-bit vector shift tests.

Only works for avx512f (dq) targets so far - need to add avx512bw tests once char/short shifts are supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246943 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Don't divide by zero when evaluating a potential transform
David Majnemer [Sun, 6 Sep 2015 06:49:59 +0000 (06:49 +0000)]
[InstCombine] Don't divide by zero when evaluating a potential transform

Trivial multiplication by zero may survive the worklist.  We tried to
reassociate the multiplication with a division instruction, causing us
to divide by zero; bail out instead.

This fixes PR24726.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246939 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Swap commutative binops before constant-based folding
Hal Finkel [Sun, 6 Sep 2015 05:42:13 +0000 (05:42 +0000)]
[SelectionDAG] Swap commutative binops before constant-based folding

In searching for a fix for the underlying code-quality bug highlighted by
r246937 (that SDAG simplification can lead to us generating an ISD::OR node
with a constant zero LHS), I ran across this:

We generically canonicalize commutative binary-operation nodes in SDAG getNode
so that, if only one operand is a constant, it will be on the RHS.  However, we
were doing this only after a bunch of constant-based simplification checks that
all assume this canonical form (that any constant will be on the RHS). Moving
the operand-swapping canonicalization prior to these checks seems like the
right thing to do (and, as it turns out, causes SDAG to completely fold away the
computation in test/CodeGen/ARM/2012-11-14-subs_carry.ll, just like InstCombine
would do).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246938 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Don't commute trivial rlwimi instructions
Hal Finkel [Sun, 6 Sep 2015 04:17:30 +0000 (04:17 +0000)]
[PowerPC] Don't commute trivial rlwimi instructions

To commute a trivial rlwimi instructions (meaning one with a full mask and zero
shift), we'd need to ability to form an all-zero mask (instead of an all-one
mask) using rlwimi. We can't represent this, however, and we'll miscompile code
if we try.

The code quality problem that this highlights (that SDAG simplification can
lead to us generating an ISD::OR node with a constant zero LHS) will be fixed
as a follow-up.

Fixes PR24719.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246937 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Use make_unique. NFC.
Craig Topper [Sun, 6 Sep 2015 03:44:50 +0000 (03:44 +0000)]
[TableGen] Use make_unique. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246936 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[bindings] Update Go bindings to DIBuilder
Andrew Wilkins [Sun, 6 Sep 2015 02:22:15 +0000 (02:22 +0000)]
[bindings] Update Go bindings to DIBuilder

Summary:
Update the Go bindings to DIBuilder to match
the split of creating local variables into
auto and parameter variables.

Reviewers: pcc

Subscribers: llvm-commits, axw

Differential Revision: http://reviews.llvm.org/D11864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246935 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Don't assume m_Mul gives back an Instruction
David Majnemer [Sat, 5 Sep 2015 20:44:56 +0000 (20:44 +0000)]
[InstCombine] Don't assume m_Mul gives back an Instruction

This fixes PR24713.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246933 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdded arch extensions and default target features in TargetParser.
Alexandros Lamprineas [Sat, 5 Sep 2015 17:05:33 +0000 (17:05 +0000)]
Added arch extensions and default target features in TargetParser.

Differential: http://reviews.llvm.org/D11590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246930 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Updated vector lzcnt tests. Added missing vec512 tests.
Simon Pilgrim [Sat, 5 Sep 2015 11:56:30 +0000 (11:56 +0000)]
[X86] Updated vector lzcnt tests. Added missing vec512 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246927 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Updated vector tzcnt tests. Added vec512 tests.
Simon Pilgrim [Sat, 5 Sep 2015 10:19:07 +0000 (10:19 +0000)]
[X86] Updated vector tzcnt tests. Added vec512 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246922 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Updated vector popcnt tests. Added vec512 tests.
Simon Pilgrim [Sat, 5 Sep 2015 09:59:59 +0000 (09:59 +0000)]
[X86] Updated vector popcnt tests. Added vec512 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246921 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement ADD.fmt, SUB.fmt, MOV.fmt, MUL.fmt, DIV.fmt, MADDF.fmt...
Zoran Jovanovic [Sat, 5 Sep 2015 09:25:30 +0000 (09:25 +0000)]
[mips][microMIPS] Implement ADD.fmt, SUB.fmt, MOV.fmt, MUL.fmt, DIV.fmt, MADDF.fmt, MSUBF.fmt and NEG.fmt instructions
Differential Revision: http://reviews.llvm.org/D11978

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246919 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[cmake] rework LLVM_LINK_LLVM_DYLIB option handling
Andrew Wilkins [Sat, 5 Sep 2015 08:27:33 +0000 (08:27 +0000)]
[cmake] rework LLVM_LINK_LLVM_DYLIB option handling

Summary:
This diff attempts to address the concerns raised in
http://reviews.llvm.org/D12488.

We introduce a new USE_SHARED option to llvm_config,
which, if set, causes the target to be linked against
libLLVM.

add_llvm_utility now uniformly disables linking against
libLLVM. These utilities are not intended for distribution,
and this keeps the option handling more centralised.

llvm-shlib is now processes before any other "tools"
subdirectories, ensuring the libLLVM target is defined
before its dependents.

One main difference from what was requested: llvm_config
does not prune LLVM_DYLIB_COMPONENTS from the components
passed into explicit_llvm_config. This is because the "all"
component does something special, adding additional
libraries (namely libLTO). Adding the component libraries
after libLLVM should not be a problem, as symbols will be
resolved in libLLVM first.

Finally, I'm not really happy with the
DISABLE_LLVM_LINK_LLVM option, but I'm not sure of a
better way to get the following:
 - link all tools and shared libraries to libLLVM if
   LLVM_LINK_LLVM_DYLIB is set
 - some way of explicitly *not* doing so for utilities
   and libLLVM itself
Suggestions for improvement here are particularly welcome.

Reviewers: beanz

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246918 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build warning.
Craig Topper [Sat, 5 Sep 2015 04:49:44 +0000 (04:49 +0000)]
Fix build warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246908 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWinCOFFObjectWriter.cpp: Roll back TimeDateStamp along ENABLE_TIMESTAMPS.
NAKAMURA Takumi [Sat, 5 Sep 2015 01:17:49 +0000 (01:17 +0000)]
WinCOFFObjectWriter.cpp: Roll back TimeDateStamp along ENABLE_TIMESTAMPS.

We want a deterministic output. GNU AS leaves it zero.

FIXME: It may be optional by its user, like llc and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246905 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Convert other MachO tests from macho-dump to llvm-readobj.
Davide Italiano [Sat, 5 Sep 2015 01:02:05 +0000 (01:02 +0000)]
[MC] Convert other MachO tests from macho-dump to llvm-readobj.

This commit accomplish two goals:
1) it's a step forward to deprecate macho-dump, now less than 40 tests
rely on it.

2) It tests all the MachO specific features introduced in llvm-readobj in
the following commits:  r246789, r246665, r246474.

While the conversion is mostly mechanical (I double-checked all the
tests output one by one, but still), a post-commit review is greatly
appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246904 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build warning
Andrew Kaylor [Sat, 5 Sep 2015 01:00:51 +0000 (01:00 +0000)]
Fix build warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246903 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation
Hal Finkel [Sat, 5 Sep 2015 00:02:59 +0000 (00:02 +0000)]
[PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation

PPCISelDAGToDAG has a transformation that generates a rlwimi instruction from
an input pattern that looks like this:

  and(or(x, c1), c2)

but the associated logic does not work if there are bits that are 1 in c1 but 0
in c2 (these are normally canonicalized away, but that can't happen if the 'or'
has other users. Make sure we abort the transformation if such bits are
discovered.

Fixes PR24704.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246900 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build warning
Andrew Kaylor [Fri, 4 Sep 2015 23:58:32 +0000 (23:58 +0000)]
Fix build warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246899 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix passed env var name in lit for Android tests.
Evgeniy Stepanov [Fri, 4 Sep 2015 23:52:04 +0000 (23:52 +0000)]
Fix passed env var name in lit for Android tests.

The variable is actually called ANDROID_SERIAL.
This was not exercised on the bots until today.
Should fix the sanitizer-x86_64-linux failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246898 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixing bad test syntax.
Andrew Kaylor [Fri, 4 Sep 2015 23:47:34 +0000 (23:47 +0000)]
Fixing bad test syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246897 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Teach SimplfyCFG to eliminate empty cleanup pads.
Andrew Kaylor [Fri, 4 Sep 2015 23:39:40 +0000 (23:39 +0000)]
[WinEH] Teach SimplfyCFG to eliminate empty cleanup pads.

Differential Revision: http://reviews.llvm.org/D12434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246896 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] more accurate logic for traces, 80-char fix
Kostya Serebryany [Fri, 4 Sep 2015 22:32:25 +0000 (22:32 +0000)]
[libFuzzer] more accurate logic for traces, 80-char fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246888 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] MachO: dump the correct field.
Davide Italiano [Fri, 4 Sep 2015 20:43:00 +0000 (20:43 +0000)]
[llvm-readobj] MachO: dump the correct field.

This was found while converting a test from macho-dump to llvm-readobj
and will once I commit the converted test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246868 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove two unused includes and C++11 rangify for loops.
Yaron Keren [Fri, 4 Sep 2015 20:24:24 +0000 (20:24 +0000)]
Remove two unused includes and C++11 rangify for loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246865 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Test tidyup + regeneration. NFCI.
Simon Pilgrim [Fri, 4 Sep 2015 19:47:56 +0000 (19:47 +0000)]
[X86][AVX] Test tidyup + regeneration. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246863 91177308-0d34-0410-b5e6-96231b3b80d8