7 years agoFix UB in MCJIT test cases that relied on union type punning
David Blaikie [Tue, 11 Aug 2015 18:17:45 +0000 (18:17 +0000)]
Fix UB in MCJIT test cases that relied on union type punning

Reviewers: lhames, aaron.ballman

Differential Revision: http://reviews.llvm.org/D11779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244644 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-apply "cmake: Make CMAKE_BUILD_TYPE check case-insensitive"
Justin Bogner [Tue, 11 Aug 2015 18:17:41 +0000 (18:17 +0000)]
Re-apply "cmake: Make CMAKE_BUILD_TYPE check case-insensitive"

This re-applies r244516 (effectively reverting r244516) without losing
the check that caused failures for VS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244643 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LowerSwitch] Fix a bug when LowerSwitch deletes the default block
Chen Li [Tue, 11 Aug 2015 18:12:26 +0000 (18:12 +0000)]
[LowerSwitch] Fix a bug when LowerSwitch deletes the default block

Summary: LowerSwitch crashed with the attached test case after deleting the default block. This happened because the current implementation of deleting dead blocks is wrong. After the default block being deleted, it contains no instruction or terminator, and it should no be traversed anymore. However, since the iterator is advanced before processSwitchInst() function is executed, the block advanced to could be deleted inside processSwitchInst(). The deleted block would then be visited next and crash dyn_cast<SwitchInst>(Cur->getTerminator()) because Cur->getTerminator() returns a nullptr. This patch fixes this problem by recording dead default blocks into a list, and delete them after all processSwitchInst() has been done. It still possible to visit dead default blocks and waste time process them. But it is a compile time issue, and I plan to have another patch to add support to skip dead blocks.

Reviewers: kariddi, resistor, hans, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11852

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244642 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse llvm::make_unique to fix the MSVC build.
Rafael Espindola [Tue, 11 Aug 2015 18:11:17 +0000 (18:11 +0000)]
Use llvm::make_unique to fix the MSVC build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244641 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd SmallString test trying to exercise the realloc() code path
Yaron Keren [Tue, 11 Aug 2015 17:35:49 +0000 (17:35 +0000)]
Add SmallString test trying to exercise the realloc() code path
by allocating a small size (will go through malloc) and then large size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244637 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[cmake] Add helper for finding potentially external projects
Reid Kleckner [Tue, 11 Aug 2015 17:16:35 +0000 (17:16 +0000)]
[cmake] Add helper for finding potentially external projects

I plan to use this from compiler-rt, but it's useful for any LLVM
project that depends on more than just LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244633 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix minsize detection: minsize attribute implies optimizing for size
Sanjay Patel [Tue, 11 Aug 2015 17:04:31 +0000 (17:04 +0000)]
fix minsize detection: minsize attribute implies optimizing for size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244631 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd missing tests for powi expansion with size optimizations
Sanjay Patel [Tue, 11 Aug 2015 16:58:49 +0000 (16:58 +0000)]
add missing tests for powi expansion with size optimizations

The minsize test will be fixed in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244630 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofixed to use FileCheck
Sanjay Patel [Tue, 11 Aug 2015 16:51:31 +0000 (16:51 +0000)]
fixed to use FileCheck

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244627 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofixed to test attribute, rather than CPU
Sanjay Patel [Tue, 11 Aug 2015 16:43:18 +0000 (16:43 +0000)]
fixed to test attribute, rather than CPU

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244625 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEnable EliminateAvailableExternally pass in the LTO pipeline.
Teresa Johnson [Tue, 11 Aug 2015 16:26:41 +0000 (16:26 +0000)]
Enable EliminateAvailableExternally pass in the LTO pipeline.

For LTO we need to enable this pass in the LTO pipeline,
as it is skipped during the "-flto -c" compile step (when PrepareForLTO is

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244622 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Add non-member begin and end so that drop_begin works on iterator_range."
Rafael Espindola [Tue, 11 Aug 2015 16:26:06 +0000 (16:26 +0000)]
Revert "Add non-member begin and end so that drop_begin works on iterator_range."

This reverts commit r244620.

MSVC doesn't like it :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244621 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd non-member begin and end so that drop_begin works on iterator_range.
Rafael Espindola [Tue, 11 Aug 2015 16:12:56 +0000 (16:12 +0000)]
Add non-member begin and end so that drop_begin works on iterator_range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244620 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typos; NFC
Sanjay Patel [Tue, 11 Aug 2015 16:10:41 +0000 (16:10 +0000)]
fix typos; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244619 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoVariable names should start with an upper case letter; NFC
Sanjay Patel [Tue, 11 Aug 2015 16:05:43 +0000 (16:05 +0000)]
Variable names should start with an upper case letter; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244618 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix minsize detection: minsize attribute implies optimizing for size
Sanjay Patel [Tue, 11 Aug 2015 15:56:31 +0000 (15:56 +0000)]
fix minsize detection: minsize attribute implies optimizing for size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244617 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalMerge] Use private linkage for MergedGlobals variables
John Brawn [Tue, 11 Aug 2015 15:48:04 +0000 (15:48 +0000)]
[GlobalMerge] Use private linkage for MergedGlobals variables

Other objects can never reference the MergedGlobals symbol so external linkage
is never needed. Using private instead of internal linkage means the object is
more similar to what it looks like when global merging is not enabled, with
the only difference being that the merged variables are addressed indirectly
relative to the start of the section they are in.

Also add aliases for merged variables with internal linkage, as this also makes
the object be more like what it is when they are not merged.

Differential Revision: http://reviews.llvm.org/D11942

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244615 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix InstCombine test: invalid CHECK line slipped in r231270
Mehdi Amini [Tue, 11 Aug 2015 15:31:17 +0000 (15:31 +0000)]
Fix InstCombine test: invalid CHECK line slipped in r231270

I incorrectly wrote CHECK-NEXT with followin with ':', the check was
ignored by FileCheck.
The non-inbound GEP is folded here because the DataLayout is no longer
optional, the fold was originally guarded with a comment that said:
    We need TD information to know the pointer size unless this is inbounds.
Now we always have "TD information" and perform the fold.

Thanks Jonathan Roelofs for noticing.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244613 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove unnecessary settings/attributes from test case
Sanjay Patel [Tue, 11 Aug 2015 15:30:53 +0000 (15:30 +0000)]
remove unnecessary settings/attributes from test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244612 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RegionInfo] Verify getRegionFor
Michael Kruse [Tue, 11 Aug 2015 15:16:43 +0000 (15:16 +0000)]
[RegionInfo] Verify getRegionFor

Check the contents of BBtoRegion during analysis verification. It only takes place if -verify-region-info is passed or LLVM is compiled with XDEBUG.

RegionBase<Tr>::verifyRegion() also checks the RegionInfoBase<Tr>::VerifyRegionInfo flag, which is redundant, but verifyRegion() is public API and might be invoked from other sites. In order to avoid behavioral change, this check is not removed. In any case, no region will be verified unless VerifyRegionInfo is set.

Reviewers: grosser

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11872

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244611 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix code that was accidentally commented out in previous commit
Sanjay Patel [Tue, 11 Aug 2015 15:08:29 +0000 (15:08 +0000)]
fix code that was accidentally commented out in previous commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244610 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typos in comments; NFC
Sanjay Patel [Tue, 11 Aug 2015 15:04:51 +0000 (15:04 +0000)]
fix typos in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244609 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo in comment; NFC
Sanjay Patel [Tue, 11 Aug 2015 14:45:08 +0000 (14:45 +0000)]
fix typo in comment; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244607 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodelete FIXME comment; it's fixed
Sanjay Patel [Tue, 11 Aug 2015 14:35:29 +0000 (14:35 +0000)]
delete FIXME comment; it's fixed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244605 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix minsize detection: minsize attribute implies optimizing for size
Sanjay Patel [Tue, 11 Aug 2015 14:31:14 +0000 (14:31 +0000)]
fix minsize detection: minsize attribute implies optimizing for size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244604 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd missing test for machine combiner when optimizing for size
Sanjay Patel [Tue, 11 Aug 2015 14:29:45 +0000 (14:29 +0000)]
add missing test for machine combiner when optimizing for size

The minsize test will be fixed in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244603 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Allow merging of immediates within a basic block for code size savings
Michael Kuperstein [Tue, 11 Aug 2015 14:10:58 +0000 (14:10 +0000)]
[X86] Allow merging of immediates within a basic block for code size savings

First step in preventing immediates that occur more than once within a single
basic block from being pulled into their users, in order to prevent unnecessary
large instruction encoding .Currently enabled only when optimizing for size.

Patch by: zia.ansari@intel.com
Differential Revision: http://reviews.llvm.org/D11363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244601 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Match fminnum/fmaxnum for vector fminnm/fmaxnm instead of an intrinsic.
James Molloy [Tue, 11 Aug 2015 12:06:37 +0000 (12:06 +0000)]
[AArch64] Match fminnum/fmaxnum for vector fminnm/fmaxnm instead of an intrinsic.

Lower Intrinsic::aarch64_neon_fmin/fmax to fminnum/fmannum and match that instead. Minimal functional change:

  - Extra tests added because coverage of scalar fminnm/fmaxnm instructions was nonexistant.
  - f16 test updated because now we actually generate scalar fminnm/fmaxnm we no longer need to bail out to a libcall!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244595 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Replace the custom AArch64ISD::FMIN/MAX nodes with ISD::FMINNAN/MAXNAN
James Molloy [Tue, 11 Aug 2015 12:06:33 +0000 (12:06 +0000)]
[AArch64] Replace the custom AArch64ISD::FMIN/MAX nodes with ISD::FMINNAN/MAXNAN

NFCI. This just removes custom ISDNodes that are no longer needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244594 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Match fminnan/fmaxnan for vector vmin/vmax instead of an intrinsic
James Molloy [Tue, 11 Aug 2015 12:06:28 +0000 (12:06 +0000)]
[ARM] Match fminnan/fmaxnan for vector vmin/vmax instead of an intrinsic

Lower Intrinsic::arm_neon_vmins/vmaxs to fminnan/fmaxnan and match that instead. This is important because SDAG will soon be able to select FMINNAN itself, so we need a unified lowering path for intrinsics and SDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244593 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Match fminnum/fmaxnum for vector vminnm/vmaxnm instead of an intrinsic
James Molloy [Tue, 11 Aug 2015 12:06:25 +0000 (12:06 +0000)]
[ARM] Match fminnum/fmaxnum for vector vminnm/vmaxnm instead of an intrinsic

Lower the intrinsic to a FMINNUM/FMAXNUM node and select that instead. This is important because soon SDAG will be able to select FMINNUM/FMAXNUM itself, so we need an integrated lowering path between SDAG and intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244592 91177308-0d34-0410-b5e6-96231b3b80d8

James Molloy [Tue, 11 Aug 2015 12:06:22 +0000 (12:06 +0000)]

NFCI. This replaces another custom ISDNode with a generic equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244591 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Replace ARMISD::FMIN/FMAX with the shiny new ISD::FMINNAN/FMAXNAN.
James Molloy [Tue, 11 Aug 2015 12:06:15 +0000 (12:06 +0000)]
[ARM] Replace ARMISD::FMIN/FMAX with the shiny new ISD::FMINNAN/FMAXNAN.

NFCI. This removes a custom ISDNode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244590 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r244516; it was causing cmake configuration failures on Windows with Visual...
Aaron Ballman [Tue, 11 Aug 2015 12:06:04 +0000 (12:06 +0000)]
Revert r244516; it was causing cmake configuration failures on Windows with Visual Studio.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244589 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add SAL mnemonics for Intel syntax
Marina Yatsina [Tue, 11 Aug 2015 12:05:06 +0000 (12:05 +0000)]
[X86] Add SAL mnemonics for Intel syntax

SAL and SHL instructions perform the same operation

Differential Revision: http://reviews.llvm.org/D11882

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244588 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix REPE, REPZ, REPNZ for intel syntax
Marina Yatsina [Tue, 11 Aug 2015 11:28:10 +0000 (11:28 +0000)]
[X86] Fix REPE, REPZ, REPNZ for intel syntax

REPE, REPZ, REPNZ, REPNE should have mnemonics for Intel syntax as well.
Currently using these instructions causes compilation errors for Intel syntax.

Differential Revision: http://reviews.llvm.org/D11794

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244584 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix imul alias for intel syntax
Marina Yatsina [Tue, 11 Aug 2015 10:43:04 +0000 (10:43 +0000)]
[X86] Fix imul alias for intel syntax

The "imul reg, imm" alias is not defined for intel syntax.
In intel syntax there is no w/l/q suffix for the imul instruction.

Differential Revision: http://reviews.llvm.org/D11887

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244582 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd new ISD nodes: ISD::FMINNAN and ISD::FMAXNAN
James Molloy [Tue, 11 Aug 2015 09:13:05 +0000 (09:13 +0000)]
Add new ISD nodes: ISD::FMINNAN and ISD::FMAXNAN

The intention of these is to be a corollary to ISD::FMINNUM/FMAXNUM,
differing only on how NaNs are treated. FMINNUM returns the non-NaN
input (when given one NaN and one non-NaN), FMINNAN returns the NaN
input instead.

This patch includes support for scalarizing, widening and splitting
vectors, but not expansion or softening. The reason is that these
should never be needed - FMINNAN nodes are only going to be created
in one place (SDAGBuilder::visitSelect) and there we'll check if the
node is legal or custom. I could preemptively add expand and soften
code, but I'm fairly opposed to adding code I can't test. It's bad
enough I can't create tests with this patch, but at least this code
will be exercised by the ARM and AArch64 backends fairly shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244581 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd support for floating-point minnum and maxnum
James Molloy [Tue, 11 Aug 2015 09:12:57 +0000 (09:12 +0000)]
Add support for floating-point minnum and maxnum

The select pattern recognition in ValueTracking (as used by InstCombine
and SelectionDAGBuilder) only knew about integer patterns. This teaches
it about minimum and maximum operations.

matchSelectPattern() has been extended to return a struct containing the
existing Flavor and a new enum defining the pattern's behavior when
given one NaN operand.

C minnum() is defined to return the non-NaN operand in this case, but
the idiomatic C "a < b ? a : b" would return the NaN operand.

ARM and AArch64 at least have different instructions for these different cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244580 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Remap move as or.
Vasileios Kalintiris [Tue, 11 Aug 2015 08:56:25 +0000 (08:56 +0000)]
[mips] Remap move as or.

This patch remaps the assembly idiom 'move' to 'or' instead of 'daddu' or
'addu'. The use of addu/daddu instead of or as move was highlighted as a
performance issue during the analysis of a recent 64bit design. Originally
move was encoded as 'or' by binutils but was changed for the r10k cpu family
due to their pipeline which had 2 arithmetic units and a single logical unit,
and so could issue multiple (d)addu based moves at the same time but only 1
logical move.

This patch preserves the disassembly behaviour so that disassembling a old style
(d)addu move still appears as move, but assembling move always gives an or

Patch by Simon Dardis.

Reviewers: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11796

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244579 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] When optimizing for minsize, use POP for small post-call stack clean-up
Michael Kuperstein [Tue, 11 Aug 2015 08:48:48 +0000 (08:48 +0000)]
[X86] When optimizing for minsize, use POP for small post-call stack clean-up

When optimizing for size, replace "addl $4, %esp" and "addl $8, %esp"
following a call by one or two pops, respectively. We don't try to do it in
general, but only when the stack adjustment immediately follows a call - which
is the most common case.

That allows taking a short-cut when trying to find a free register to pop into,
instead of a full-blown liveness check. If the adjustment immediately follows a
call, then every register the call clobbers but doesn't define should be dead at
that point, and can be used.

Differential Revision: http://reviews.llvm.org/D11749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244578 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow PeepholeOptimizer to fold a few more cases
Michael Kuperstein [Tue, 11 Aug 2015 08:19:43 +0000 (08:19 +0000)]
Allow PeepholeOptimizer to fold a few more cases

The condition for clearing the folding candidate list was clamped together
with the "uninteresting instruction" condition. This is too conservative,
e.g. we don't need to clear the list when encountering an IMPLICIT_DEF.

Differential Revision: http://reviews.llvm.org/D11591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244577 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GMR] Be a bit smarter about which globals don't alias when doing recursive lookups
Michael Kuperstein [Tue, 11 Aug 2015 08:06:44 +0000 (08:06 +0000)]
[GMR] Be a bit smarter about which globals don't alias when doing recursive lookups

Should hopefully fix the remainder of PR24288.

Differential Revision: http://reviews.llvm.org/D11900

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244575 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RuntimeDyld][AArch64] Add explicit addends before calling relocationValueRef.
Lang Hames [Tue, 11 Aug 2015 06:27:53 +0000 (06:27 +0000)]
[RuntimeDyld][AArch64] Add explicit addends before calling relocationValueRef.

relocationValueRef uses the addend, so it has to be set before the call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244574 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEnable five passing dsymutil tests on Windows.
Yaron Keren [Tue, 11 Aug 2015 06:05:27 +0000 (06:05 +0000)]
Enable five passing dsymutil tests on Windows.
These tests pass with Windows 7 x64 + MSYS2. I'll see if the bots like
them as well and disable the failing ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244572 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix unused variable 'X' in release builds.
Nick Lewycky [Tue, 11 Aug 2015 05:57:10 +0000 (05:57 +0000)]
Fix unused variable 'X' in release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244571 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: NFC fix release build break, unused variable.
JF Bastien [Tue, 11 Aug 2015 04:52:24 +0000 (04:52 +0000)]
WebAssembly: NFC fix release build break, unused variable.

Summary: Caused by D11914, pointed out by blaikie.

Subscribers: llvm-commits, jfb, dblaikie

Differential Revision: http://reviews.llvm.org/D11929

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244570 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] fix docs build
Kostya Serebryany [Tue, 11 Aug 2015 04:16:37 +0000 (04:16 +0000)]
[libFuzzer] fix docs build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244566 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IR] Verify EH pad predecessors
David Majnemer [Tue, 11 Aug 2015 02:48:30 +0000 (02:48 +0000)]
[IR] Verify EH pad predecessors

Make sure that an EH pad's predecessors are using their unwind edge to
transfer control to the EH pad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244563 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: add basic floating-point tests
JF Bastien [Tue, 11 Aug 2015 02:45:15 +0000 (02:45 +0000)]
WebAssembly: add basic floating-point tests

Summary: I somehow forgot to add these when I added the basic floating-point opcodes. Also remove ceil/floor/trunc/nearestint for now, and add them only when properly tested.

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11927

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244562 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add the list of trophies to the docs. It is incomplete, additions are...
Kostya Serebryany [Tue, 11 Aug 2015 01:53:45 +0000 (01:53 +0000)]
[libFuzzer] add the list of trophies to the docs. It is incomplete, additions are welcome :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244560 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add -only_ascii flag
Kostya Serebryany [Tue, 11 Aug 2015 01:44:42 +0000 (01:44 +0000)]
[libFuzzer] add -only_ascii flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244559 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEHPrepare] Add rudimentary support for the new EH instructions
David Majnemer [Tue, 11 Aug 2015 01:15:26 +0000 (01:15 +0000)]
[WinEHPrepare] Add rudimentary support for the new EH instructions

This adds somewhat basic preparation functionality including:
- Formation of funclets via coloring basic blocks.
- Cloning of polychromatic blocks to ensure that funclets have unique
  program counters.
- Demotion of values used between different funclets.
- Some amount of cleanup once we have removed predecessors from basic
- Verification that we are left with a CFG that makes some amount of

N.B. Arguments and numbering still need to be done.

Differential Revision: http://reviews.llvm.org/D11750

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244558 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExplicitly clear the MI operand list when getInstruction() is called. Call MI.clear...
Cameron Esfahani [Tue, 11 Aug 2015 01:15:07 +0000 (01:15 +0000)]
Explicitly clear the MI operand list when getInstruction() is called.  Call MI.clear() within MCD::OPC_Decode case and inside of translateInstruction() for the X86 target.  Remove now unnecessary MI.clear() from ARMDisassembler.

Summary: Explicitly clear the MI operand list when getInstruction() is called.

Reviewers: hfinkel, t.p.northover, hvarga, kparzysz, jyknight, qcolombet, uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244557 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPrint vectorization analysis when loop hint is specified.
Tyler Nowicki [Tue, 11 Aug 2015 01:09:15 +0000 (01:09 +0000)]
Print vectorization analysis when loop hint is specified.

This patch and a relatec clang patch solve the problem of having to explicitly enable analysis when specifying a loop hint pragma to get the diagnostics. Passing AlwasyPrint as the pass name (see below) causes the front-end to print the diagnostic if the user has specified '-Rpass-analysis' without an '=<target-pass>’. Users of loop hints can pass that compiler option without having to specify the pass and they will get diagnostics for only those loops with loop hints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244555 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate the syntax for load instruction in this example.
Nick Lewycky [Tue, 11 Aug 2015 01:05:16 +0000 (01:05 +0000)]
Update the syntax for load instruction in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244554 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMoved LoopVectorizeHints and related functions before LoopVectorizationLegality and...
Tyler Nowicki [Tue, 11 Aug 2015 00:52:54 +0000 (00:52 +0000)]
Moved LoopVectorizeHints and related functions before LoopVectorizationLegality and LoopVectorizationCostModel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244552 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: simply assert on SNaN and NaNs with payloads
JF Bastien [Tue, 11 Aug 2015 00:49:20 +0000 (00:49 +0000)]
WebAssembly: simply assert on SNaN and NaNs with payloads

Summary: convertToHexString doesn't represent them correctly at this point in time. This is a follow-up to sunfish's suggestion in D11914.

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11925

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244551 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify processLoop() by moving loop hint verification into Hints::allowVectorization().
Tyler Nowicki [Tue, 11 Aug 2015 00:35:44 +0000 (00:35 +0000)]
Simplify processLoop() by moving loop hint verification into Hints::allowVectorization().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244550 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize UsedPhysRegMask from the machine register info.
Alex Lorenz [Tue, 11 Aug 2015 00:32:49 +0000 (00:32 +0000)]
MIR Serialization: Serialize UsedPhysRegMask from the machine register info.

This commit serializes the UsedPhysRegMask register mask from the machine
register information class. The mask is serialized as an inverted
'calleeSavedRegisters' mask to keep the output minimal.

This commit also allows the MIR parser to infer this mask from the register
mask operands if the machine function doesn't specify it.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244548 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse range-based for loops; NFCI
Sanjay Patel [Tue, 11 Aug 2015 00:26:05 +0000 (00:26 +0000)]
use range-based for loops; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244545 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] don't crash if the condition in a switch has unusual type (e.g. i72)
Kostya Serebryany [Tue, 11 Aug 2015 00:24:39 +0000 (00:24 +0000)]
[libFuzzer] don't crash if the condition in a switch has unusual type (e.g. i72)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244544 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAddress post-commit review from r243378.
Sanjoy Das [Tue, 11 Aug 2015 00:20:24 +0000 (00:20 +0000)]
Address post-commit review from r243378.

This checks that bork_directive occurs exactly twice in the test output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244543 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Change name from addRuntimeCheck to addRuntimeChecks, NFC
Adam Nemet [Tue, 11 Aug 2015 00:09:37 +0000 (00:09 +0000)]
[LAA] Change name from addRuntimeCheck to addRuntimeChecks, NFC

This was requested by Hal in D11205.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244540 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Report an error when a stack object is redefined.
Alex Lorenz [Mon, 10 Aug 2015 23:50:41 +0000 (23:50 +0000)]
MIR Parser: Report an error when a stack object is redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244536 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd lduw and lwua aliases for SPARCv9.
Joerg Sonnenberger [Mon, 10 Aug 2015 23:47:22 +0000 (23:47 +0000)]
Add lduw and lwua aliases for SPARCv9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244535 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Report an error when a fixed stack object is redefined.
Alex Lorenz [Mon, 10 Aug 2015 23:45:02 +0000 (23:45 +0000)]
MIR Parser: Report an error when a fixed stack object is redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244534 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLoad/store for float registers from/to alternate space.
Joerg Sonnenberger [Mon, 10 Aug 2015 23:33:17 +0000 (23:33 +0000)]
Load/store for float registers from/to alternate space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244532 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse range-based for loop; NFCI
Sanjay Patel [Mon, 10 Aug 2015 23:29:41 +0000 (23:29 +0000)]
use range-based for loop; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244531 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the liveout register mask machine operands.
Alex Lorenz [Mon, 10 Aug 2015 23:24:42 +0000 (23:24 +0000)]
MIR Serialization: Serialize the liveout register mask machine operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244529 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix minsize detection: minsize attribute implies optimizing for size
Sanjay Patel [Mon, 10 Aug 2015 23:07:26 +0000 (23:07 +0000)]
fix minsize detection: minsize attribute implies optimizing for size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244528 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVer] Remove unused pointer partition argument, NFC.
Adam Nemet [Mon, 10 Aug 2015 23:05:31 +0000 (23:05 +0000)]
[LoopVer] Remove unused pointer partition argument, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244527 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExtend late diagnostics to include late test for runtime pointer checks.
Tyler Nowicki [Mon, 10 Aug 2015 23:01:55 +0000 (23:01 +0000)]
Extend late diagnostics to include late test for runtime pointer checks.

This patch moves checking the threshold of runtime pointer checks to the vectorization requirements (late diagnostics) and emits a diagnostic that infroms the user the loop would be vectorized if not for exceeding the pointer-check threshold. Clang will also append the options that can be used to allow vectorization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244523 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: print immediates
JF Bastien [Mon, 10 Aug 2015 22:36:48 +0000 (22:36 +0000)]
WebAssembly: print immediates

For now output using C99's hexadecimal floating-point representation.

This patch also cleans up how machine operands are printed: instead of special-casing per type of machine instruction, the code now handles operands generically.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11914

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244520 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd support for the signx instrution alias of SPARCv9.
Joerg Sonnenberger [Mon, 10 Aug 2015 22:32:25 +0000 (22:32 +0000)]
Add support for the signx instrution alias of SPARCv9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244519 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNFC. Fix some format issues in lib/CodeGen/MachineBasicBlock.cpp.
Cong Hou [Mon, 10 Aug 2015 22:27:10 +0000 (22:27 +0000)]
NFC. Fix some format issues in lib/CodeGen/MachineBasicBlock.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244518 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agocmake: Make CMAKE_BUILD_TYPE check case-insensitive
Justin Bogner [Mon, 10 Aug 2015 21:58:27 +0000 (21:58 +0000)]
cmake: Make CMAKE_BUILD_TYPE check case-insensitive

Juergen pointed out that this variable is treated in a case
insensitive way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244516 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMachineVerifier: Handle the optional def operand in a PATCHPOINT instruction.
Alex Lorenz [Mon, 10 Aug 2015 21:47:36 +0000 (21:47 +0000)]
MachineVerifier: Handle the optional def operand in a PATCHPOINT instruction.

The PATCHPOINT instructions have a single optional defined register operand,
but the machine verifier can't verify the optional defined register operands.
This commit makes sure that the machine verifier won't report an error when a
PATCHPOINT instruction doesn't have its optional defined register operand.
This change will allow us to enable the machine verifier for the code
generation tests for the patchpoint intrinsics.

Reviewers: Juergen Ributzka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244513 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-symbolizer] Remove underscores and other C mangling on Windows
Reid Kleckner [Mon, 10 Aug 2015 21:47:11 +0000 (21:47 +0000)]
[llvm-symbolizer] Remove underscores and other C mangling on Windows

This makes it so that reports symbolized after the fact with
llvm-symbolizer are more similar to the ones we generate at runtime with
in-process dbghelp.

Reviewers: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11785

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244512 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't iterate over all sections in the ELFFile constructor.
Rafael Espindola [Mon, 10 Aug 2015 21:29:35 +0000 (21:29 +0000)]
Don't iterate over all sections in the ELFFile constructor.

With this we finally have an ELFFile that is O(1) to construct. This is helpful
for programs like lld which have to do their own section walk.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244510 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove function names from comments; NFC
Sanjay Patel [Mon, 10 Aug 2015 21:28:16 +0000 (21:28 +0000)]
remove function names from comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244509 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStackMap: FastISel: Add an appropriate number of immediate operands to the
Alex Lorenz [Mon, 10 Aug 2015 21:27:03 +0000 (21:27 +0000)]
StackMap: FastISel: Add an appropriate number of immediate operands to the
frame setup instruction.

This commit ensures that the stack map lowering code in FastISel adds an
appropriate number of immediate operands to the frame setup instruction.

The previous code added just one immediate operand, which was fine for a target
like AArch64, but on X86 the ADJCALLSTACKDOWN64 instruction needs two explicit
operands. This caused the machine verifier to report an error when the old code
added just one.

Reviewers: Juergen Ributzka

Differential Revision: http://reviews.llvm.org/D11853

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244508 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRename improperly named variable. NFC.
Rafael Espindola [Mon, 10 Aug 2015 21:25:44 +0000 (21:25 +0000)]
Rename improperly named variable. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244507 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake fp vectorization test X86 specified to avoid cost-model related problems on...
Tyler Nowicki [Mon, 10 Aug 2015 21:14:38 +0000 (21:14 +0000)]
Make fp vectorization test X86 specified to avoid cost-model related problems on arm-thumb and hexagon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244505 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a test showing that objdump (and so ObjectFIle) can handle shndx.
Rafael Espindola [Mon, 10 Aug 2015 21:00:15 +0000 (21:00 +0000)]
Add a test showing that objdump (and so ObjectFIle) can handle shndx.

It was already passing, we were just not testing the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244504 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agox86: Emit LAHF/SAHF instead of PUSHF/POPF
JF Bastien [Mon, 10 Aug 2015 20:59:36 +0000 (20:59 +0000)]
x86: Emit LAHF/SAHF instead of PUSHF/POPF

NaCl's sandbox doesn't allow PUSHF/POPF out of security concerns (priviledged emulators have forgotten to mask system bits in the past, and EFLAGS's DF bit is a constant source of hilarity). Commit r220529 fixed PR20376 by saving cmpxchg's flags result using EFLAGS, this commit now generated LAHF/SAHF instead, for all of x86 (not just NaCl) because it leads to an overall performance gain over PUSHF/POPF.

As with the previous patch this code generation is pretty bad because it occurs very later, after register allocation, and in many cases it rematerializes flags which were already available (e.g. already in a register through SETE). Fortunately it's somewhat rare that this code needs to fire.

I did [[ https://github.com/jfbastien/benchmark-x86-flags | a bit of benchmarking ]], the results on an Intel Haswell E5-2690 CPU at 2.9GHz are:

| Time per call (ms)  | Runtime (ms) | Benchmark                      |
| 0.000012514         |      6257    | sete.i386                      |
| 0.000012810         |      6405    | sete.i386-fast                 |
| 0.000010456         |      5228    | sete.x86-64                    |
| 0.000010496         |      5248    | sete.x86-64-fast               |
| 0.000012906         |      6453    | lahf-sahf.i386                 |
| 0.000013236         |      6618    | lahf-sahf.i386-fast            |
| 0.000010580         |      5290    | lahf-sahf.x86-64               |
| 0.000010304         |      5152    | lahf-sahf.x86-64-fast          |
| 0.000028056         |     14028    | pushf-popf.i386                |
| 0.000027160         |     13580    | pushf-popf.i386-fast           |
| 0.000023810         |     11905    | pushf-popf.x86-64              |
| 0.000026468         |     13234    | pushf-popf.x86-64-fast         |

Clearly `PUSHF`/`POPF` are suboptimal. It doesn't really seems to be worth teaching LLVM about individual flags, at least not for this purpose.

Reviewers: rnk, jvoung, t.p.northover

Subscribers: llvm-commits

Differential revision: http://reviews.llvm.org/D6629

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244503 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse higher level functions in llvm-objdump.
Rafael Espindola [Mon, 10 Aug 2015 20:50:40 +0000 (20:50 +0000)]
Use higher level functions in llvm-objdump.

This matches the rest of llvm-objdump better and isolates it from upcoming
changes to ELFFile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244500 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix minsize detection: minsize attribute implies optimizing for size
Sanjay Patel [Mon, 10 Aug 2015 20:45:44 +0000 (20:45 +0000)]
fix minsize detection: minsize attribute implies optimizing for size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244499 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86, SSE]]add missing tests for load folding with partial register update
Sanjay Patel [Mon, 10 Aug 2015 20:34:34 +0000 (20:34 +0000)]
[x86, SSE]]add missing tests for load folding with partial register update

The minsize case is wrong; that will be fixed in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244498 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDelete getDotSymtabSec.
Rafael Espindola [Mon, 10 Aug 2015 20:25:04 +0000 (20:25 +0000)]
Delete getDotSymtabSec.

Another step in avoiding iterating over all sections in the ELFFile constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244496 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Move SSE2/AVX2 arithmetic vector shift folding to instcombiner
Simon Pilgrim [Mon, 10 Aug 2015 20:21:15 +0000 (20:21 +0000)]
[InstCombine] Move SSE2/AVX2 arithmetic vector shift folding to instcombiner

As discussed in D11760, this patch moves the (V)PSRA(WD) arithmetic shift-by-constant folding to InstCombine to match the logical shift implementations.

Differential Revision: http://reviews.llvm.org/D11886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244495 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemoved unused and incorrectly implemented classof() on Optimization Remark base...
Tyler Nowicki [Mon, 10 Aug 2015 20:13:32 +0000 (20:13 +0000)]
Removed unused and incorrectly implemented classof() on Optimization Remark base class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244494 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] NFC improving comments about what the tokenized identifiers will contain.
Colin LeMahieu [Mon, 10 Aug 2015 19:58:06 +0000 (19:58 +0000)]
[TableGen] NFC improving comments about what the tokenized identifiers will contain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244493 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a few more cases of 'CHECK[^:]*$'. NFCI
Jonathan Roelofs [Mon, 10 Aug 2015 19:56:39 +0000 (19:56 +0000)]
Fix a few more cases of 'CHECK[^:]*$'. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244491 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLate evaluation of the fast-math vectorization requirement.
Tyler Nowicki [Mon, 10 Aug 2015 19:51:46 +0000 (19:51 +0000)]
Late evaluation of the fast-math vectorization requirement.

This patch moves the verification of fast-math to just before vectorization is done. This way we can tell clang to append the command line options would that allow floating-point commutativity. Specifically those are enableing fast-math or specifying a loop hint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244489 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix another case of 'CHECK[^:]*$'. NFCI
Jonathan Roelofs [Mon, 10 Aug 2015 19:22:55 +0000 (19:22 +0000)]
Fix another case of 'CHECK[^:]*$'. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244486 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoModify diagnostic messages to clearly indicate the why interleaving wasn't done.
Tyler Nowicki [Mon, 10 Aug 2015 19:14:16 +0000 (19:14 +0000)]
Modify diagnostic messages to clearly indicate the why interleaving wasn't done.

Sometimes interleaving is not beneficial, as determined by the cost-model and sometimes it is disabled by a loop hint (by the user). This patch modifies the diagnostic messages to make it clear why interleaving wasn't done.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244485 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Sparc] Implement i64 load/store support for 32-bit sparc.
James Y Knight [Mon, 10 Aug 2015 19:11:39 +0000 (19:11 +0000)]
[Sparc] Implement i64 load/store support for 32-bit sparc.

The LDD/STD instructions can load/store a 64bit quantity from/to
memory to/from a consecutive even/odd pair of (32-bit) registers. They
are part of SparcV8, and also present in SparcV9. (Although deprecated
there, as you can store 64bits in one register).

As recommended on llvmdev in the thread "How to enable use of 64bit
load/store for 32bit architecture" from Apr 2015, I've modeled the
64-bit load/store operations as working on a v2i32 type, rather than
making i64 a legal type, but with few legal operations. The latter
does not (currently) work, as there is much code in llvm which assumes
that if i64 is legal, operations like "add" will actually work on it.

The same assumption does not hold for v2i32 -- for vector types, it is
workable to support only load/store, and expand everything else.

This patch:
- Adds a new register class, IntPair, for even/odd pairs of registers.

- Modifies the list of reserved registers, the stack spilling code,
  and register copying code to support the IntPair register class.

- Adds support in AsmParser. (note that in asm text, you write the
  name of the first register of the pair only. So the parser has to
  morph the single register into the equivalent paired register).

- Adds the new instructions themselves (LDD/STD/LDDA/STDA).

- Hooks up the instructions and registers as a vector type v2i32. Adds
  custom legalizer to transform i64 load/stores into v2i32 load/stores
  and bitcasts, so that the new instructions can actually be
  generated, and marks all operations other than load/store on v2i32
  as needing to be expanded.

- Copies the unfortunate SelectInlineAsm hack from ARMISelDAGToDAG.
  This hack undoes the transformation of i64 operands into two
  arbitrarily-allocated separate i32 registers in
  SelectionDAGBuilder. and instead passes them in a single
  IntPair. (Arbitrarily allocated registers are not useful, asm code
  expects to be receiving a pair, which can be passed to ldd/std.)

Also adds a bunch of test cases covering all the bugs I've added along
the way.

Differential Revision: http://reviews.llvm.org/D8713

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244484 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agorename toELFShdrIter to getSection and move it closer to getSymbol. NFC.
Rafael Espindola [Mon, 10 Aug 2015 19:10:37 +0000 (19:10 +0000)]
rename toELFShdrIter to getSection and move it closer to getSymbol. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244483 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agotoELFSymIter and getSymbol are now the same thing. Merge them.
Rafael Espindola [Mon, 10 Aug 2015 19:07:56 +0000 (19:07 +0000)]
toELFSymIter and getSymbol are now the same thing. Merge them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244482 91177308-0d34-0410-b5e6-96231b3b80d8