Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96223 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: Fixed syntax in conditional.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96221 91177308-0d34-0410-b5e6-96231b3b80d8

Fix changes from r75027

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96220 91177308-0d34-0410-b5e6-96231b3b80d8

When testing whether a given SCEV depends on a temporary symbolic
name, test whether the SCEV itself is that temporary symbolic name,
in addition to checking whether the symbolic name appears as a
possibly-indirect operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96216 91177308-0d34-0410-b5e6-96231b3b80d8

Check in the first big step of rewriting DAGISelEmitter to
produce a table based matcher instead of gobs of C++ Code.

Though it's not done yet, the shrinkage seems promising,
the table for the X86 ISel is 75K and still has a lot of
optimization to come (compare to the ~1.5M of .o generated
the old way, much of which will go away).

The code is currently disabled by default (the #if 0 in
DAGISelEmitter.cpp).  When enabled it generates a dead
SelectCode2 function in the DAGISel Header which will
eventually replace SelectCode.

There is still a lot of stuff left to do, which are
documented with a trail of FIXMEs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96215 91177308-0d34-0410-b5e6-96231b3b80d8

give SDValue an operator->, allowing V->isTargetOpcode() and
many other natural things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96214 91177308-0d34-0410-b5e6-96231b3b80d8

don't make insanely large node numbers for no reason,
packing somewhat densely is better than not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96213 91177308-0d34-0410-b5e6-96231b3b80d8

no need to add the instruction count anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96212 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r96130 ("Forward parameter options as '-option=param'").

This behaviour must be configurable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96210 91177308-0d34-0410-b5e6-96231b3b80d8

enhance raw_svector_ostream::write_impl to work with unbuffered streams,
which may call write_impl on things that are not the usual buffer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96209 91177308-0d34-0410-b5e6-96231b3b80d8

make PadToColumn return the stream so you can use:
 OS.PadToColumn(42) << "foo";

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96208 91177308-0d34-0410-b5e6-96231b3b80d8

Ignore DBG_VALUE in a couple more places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96207 91177308-0d34-0410-b5e6-96231b3b80d8

When restoring a saved insert location, check to see if the saved
insert location has become an "inserted" instruction since the time
it was saved. If so, advance to the first non-"inserted" instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96203 91177308-0d34-0410-b5e6-96231b3b80d8

constize

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96199 91177308-0d34-0410-b5e6-96231b3b80d8

clean up a bunch of code, move some random predicates
on TreePatternNode to be methods on TreePatternNode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96197 91177308-0d34-0410-b5e6-96231b3b80d8

mark "addr" as having type "iPTR", eliminating some type comparisons
in hte generated dag isel fil.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96193 91177308-0d34-0410-b5e6-96231b3b80d8

remove the DisablePatternForFastISel predicate, which is a check
that predated -fast-isel which attempted to speed up the dag pattern
matchers at -O0.  Since fast-isel is around, this is basically
obsolete and removing it shrinks the generated dag isels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96188 91177308-0d34-0410-b5e6-96231b3b80d8

add an insertion operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96187 91177308-0d34-0410-b5e6-96231b3b80d8

tidy up

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96186 91177308-0d34-0410-b5e6-96231b3b80d8

Fix whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96179 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96178 91177308-0d34-0410-b5e6-96231b3b80d8

When complicated expressions are broken down into subexpressions
with multiplication by constants distributed through, occasionally
those subexpressions can include both x and -x. For now, if this
condition is discovered within LSR, just prune such cases away,
as they won't be profitable. This fixes a "zero allocated in a
base register" assertion failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96177 91177308-0d34-0410-b5e6-96231b3b80d8

fixes to pagesel/banksel inserter.
1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96175 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot to commit the header

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96174 91177308-0d34-0410-b5e6-96231b3b80d8

follow-on to PR6280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96172 91177308-0d34-0410-b5e6-96231b3b80d8

Drop winmcasminfo and use normal AT&T COFF for all windows targets.
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96165 91177308-0d34-0410-b5e6-96231b3b80d8

Try to factorize the specification of saturating add/subtract operations a bit,
as suggested by Bob Wilson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96153 91177308-0d34-0410-b5e6-96231b3b80d8

Actually, this code doesn't have to be quite so conservative in
the no-TLI case. But it should still default to declining the
transformation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96152 91177308-0d34-0410-b5e6-96231b3b80d8

In rememberInstruction, if the value being remembered is the
current insertion point, advance the current insertion point.
This avoids a use-before-def situation in a testcase extracted
from clang which is difficult to reduce to a reasonable-sized
regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96151 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify this code; no need for a custom subclass if it doesn't need
to override anything from the parent class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96150 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a 'protected' keyword, now that SCEVExpander is no longer
intended to be subclassed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96149 91177308-0d34-0410-b5e6-96231b3b80d8

Don't attempt aggressive post-inc uses if TargetLowering is not available,
because profitability can't be sufficiently approximated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96148 91177308-0d34-0410-b5e6-96231b3b80d8

2.7: Note that DataTypes.h moved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96143 91177308-0d34-0410-b5e6-96231b3b80d8

Make LSR not crash if invoked without target lowering info, e.g. if invoked
from opt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96135 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a problem where we had bitcasted operands that gave us
odd offsets since the bitcasted pointer size and the offset pointer
size are going to be different types for the GEP vs base object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96134 91177308-0d34-0410-b5e6-96231b3b80d8

Forward parameter options as '-option=parameter'.

Some tools do not like the '-option parameter' form. Should this be
configurable?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96130 91177308-0d34-0410-b5e6-96231b3b80d8

Support some more Darwin-only options.

We really need a conditional compilation mechanism...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96129 91177308-0d34-0410-b5e6-96231b3b80d8

Support -mfix-and-continue properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96128 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r94752, turns out we don't need to touch these options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96127 91177308-0d34-0410-b5e6-96231b3b80d8

Trim trailing spaces (aka, trigger rebuild).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96126 91177308-0d34-0410-b5e6-96231b3b80d8

pull a bunch of huge inline methods in the PatternCodeEmitter
class out of line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96113 91177308-0d34-0410-b5e6-96231b3b80d8

teach the encoder to handle pseudo instructions like FP_REG_KILL,
encoding them into nothing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96110 91177308-0d34-0410-b5e6-96231b3b80d8

remove dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96109 91177308-0d34-0410-b5e6-96231b3b80d8

MCAssembler: Fix pcrel relocations. Oh and,
--
ddunbar@ozzy:tmp$ clang -m32 -integrated-as hello.c && ./a.out
hello world!
--

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96096 91177308-0d34-0410-b5e6-96231b3b80d8

MC/Mach-O: Start emitting fixups/relocations for instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96095 91177308-0d34-0410-b5e6-96231b3b80d8

MCAssembler: Switch MCAsmFixup to storing MCFixupKind instead of just a size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96094 91177308-0d34-0410-b5e6-96231b3b80d8

MCAssembler: Sink fixup list into MCDataFragment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96093 91177308-0d34-0410-b5e6-96231b3b80d8

MCAssembler: Switch MCFillFragment to only taking constant values. Symbolic expressions can always be emitted as data + fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96092 91177308-0d34-0410-b5e6-96231b3b80d8

MC/Mach-O: Implement EmitValue using data fragments + fixups instead of fill fragment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96091 91177308-0d34-0410-b5e6-96231b3b80d8

MCAssembler: Start applying fixups in the data section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96090 91177308-0d34-0410-b5e6-96231b3b80d8

MCAssembler: Add assorted dump() methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96089 91177308-0d34-0410-b5e6-96231b3b80d8

X86: Move extended MCFixupKinds into X86FixupKinds.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96088 91177308-0d34-0410-b5e6-96231b3b80d8

Split some code out to a helper function (FindReusablePredBB)
and add a doxygen comment.

Cache the phi entry to avoid doing tons of
PHINode::getBasicBlockIndex calls in the common case.

On my insane testcase from re2c, this speeds up CGP from
617.4s to 7.9s (78x).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96083 91177308-0d34-0410-b5e6-96231b3b80d8

Speed up codegen prepare from 3.58s to 0.488s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96081 91177308-0d34-0410-b5e6-96231b3b80d8

PHINode::getBasicBlockIndex is O(n) in the number of inputs
to a PHI, avoid it in the common case where the BB occurs
in the same index for multiple phis.  This speeds up CGP on
an insane testcase from 8.35 to 3.58s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96080 91177308-0d34-0410-b5e6-96231b3b80d8

iterate over preds using PHI information when available instead of
using pred_begin/end.  It is much faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96079 91177308-0d34-0410-b5e6-96231b3b80d8

speed up CGP a bit by scanning predecessors through phi operands
instead of with pred_begin/end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96078 91177308-0d34-0410-b5e6-96231b3b80d8

add encoder support and tests for rdtscp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8

Add SETEND and BXJ instructions for disassembly only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96075 91177308-0d34-0410-b5e6-96231b3b80d8

Added the rdtscp instruction to the x86 instruction
tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96073 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR6283.

When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.

Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96072 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a pruning heuristic which implicitly assumed that SmallPtrSet is
deterministically sorted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96071 91177308-0d34-0410-b5e6-96231b3b80d8

Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96069 91177308-0d34-0410-b5e6-96231b3b80d8

Enable the inlinehint attribute in the Inliner.

Functions explicitly marked inline will get an inlining threshold slightly
more aggressive than the default for -O3. This means than -O3 builds are
mostly unaffected while -Os builds will be a bit bigger and faster.

The difference depends entirely on how many 'inline's are sprinkled on the
source.

In the CINT2006 suite, only these tests are significantly affected under -Os:

               Size   Time
471.omnetpp   +1.63% -1.85%
473.astar     +4.01% -6.02%
483.xalancbmk +4.60%  0.00%

Note that 483.xalancbmk runs too quickly to give useful timing results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96066 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed encodings for invlpg, invept, and invvpid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96065 91177308-0d34-0410-b5e6-96231b3b80d8

MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96064 91177308-0d34-0410-b5e6-96231b3b80d8

Added a bunch of saturating add/subtract instructions for disassembly only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96063 91177308-0d34-0410-b5e6-96231b3b80d8

rip out the 'heinous' x86 MCCodeEmitter implementation.
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8

remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
fix swapgs to be spelled right.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8

Besides removing phi cycles that reduce to a single value, also remove dead
phi cycles.  Adjust a few tests to keep dead instructions from being optimized
away.  This (together with my previous change for phi cycles) fixes Apple
radar 7627077.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96057 91177308-0d34-0410-b5e6-96231b3b80d8

Override dominates and properlyDominates for SCEVAddRecExpr, as a
SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96056 91177308-0d34-0410-b5e6-96231b3b80d8

MC/X86: Push immediate operands as immediates not expressions when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8

Make PassRegistrar thread-safe since it can be modified by code running in
separate LLVMContexts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96051 91177308-0d34-0410-b5e6-96231b3b80d8

Remove special cases for [LM]FENCE, MONITOR and MWAIT from
encoder and decoder by using new MRM_ forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96048 91177308-0d34-0410-b5e6-96231b3b80d8

add some disassemble testcases for weird instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96045 91177308-0d34-0410-b5e6-96231b3b80d8

Reworked the Intel disassembler to support instructions
whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction.  Commented out the special
casing of VMCALL, which is the first instruction to use
this special form.  While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96043 91177308-0d34-0410-b5e6-96231b3b80d8

implement the rest of correct x86-64 encoder support for
rip-relative addresses, and add a testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8

Add the problem I just hacked around in 96015/96020.
The solution there produces correct code, but is seriously
deficient in several ways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96039 91177308-0d34-0410-b5e6-96231b3b80d8

give MCCodeEmitters access to the current MCContext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96038 91177308-0d34-0410-b5e6-96231b3b80d8

Make JIT::runFunction clean up the generated stub function.

Patch by Shivram K!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96037 91177308-0d34-0410-b5e6-96231b3b80d8

implement infrastructure to support fixups for rip-rel
addressing.  This isn't complete because I need an MCContext
to generate new MCExprs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96036 91177308-0d34-0410-b5e6-96231b3b80d8

Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
Plus add two formats: MiscFrm and ThumbMiscFrm.  Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96032 91177308-0d34-0410-b5e6-96231b3b80d8

pull the rip-relative addressing mode case up early.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96031 91177308-0d34-0410-b5e6-96231b3b80d8

fixme resolved!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96029 91177308-0d34-0410-b5e6-96231b3b80d8

start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96028 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a comment typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96027 91177308-0d34-0410-b5e6-96231b3b80d8

enhance the immediate field encoding to know whether the immediate
is pc relative or not, mark call and branches as pcrel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96026 91177308-0d34-0410-b5e6-96231b3b80d8

Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96023 91177308-0d34-0410-b5e6-96231b3b80d8

This should have gone in with 26015, see comments there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96020 91177308-0d34-0410-b5e6-96231b3b80d8

Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96019 91177308-0d34-0410-b5e6-96231b3b80d8

doxygenize some comments, patch by Peter Collingbourne!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96018 91177308-0d34-0410-b5e6-96231b3b80d8

When save/restoring CR at prolog/epilog, in a large
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for a union type in LLVM IR.  Patch by Talin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96011 91177308-0d34-0410-b5e6-96231b3b80d8

Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96010 91177308-0d34-0410-b5e6-96231b3b80d8

Also recognize armv6t2-* and armv5te-* triplets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96008 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a case of mismatched types in an Add that turned up in 447.dealII.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96007 91177308-0d34-0410-b5e6-96231b3b80d8

Add ARM bitcode file magic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96006 91177308-0d34-0410-b5e6-96231b3b80d8

Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96005 91177308-0d34-0410-b5e6-96231b3b80d8

Fix this code to avoid dereferencing an end() iterator in
offset distributions it doesn't expect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96002 91177308-0d34-0410-b5e6-96231b3b80d8

Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95999 91177308-0d34-0410-b5e6-96231b3b80d8