Add targets to skip running the GC passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170836 91177308-0d34-0410-b5e6-96231b3b80d8

Every pass deserves a name, even codegenprep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170831 91177308-0d34-0410-b5e6-96231b3b80d8

Improve the X86 cost model for loads and stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170830 91177308-0d34-0410-b5e6-96231b3b80d8

BB-Vectorizer: Check the cost of the store pointer type
and not the return type, which is void. A number of test
cases fail after adding the assertion in TTImpl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170828 91177308-0d34-0410-b5e6-96231b3b80d8

Add test case for r170674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170823 91177308-0d34-0410-b5e6-96231b3b80d8

Call llvm_unreachable instead of assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170822 91177308-0d34-0410-b5e6-96231b3b80d8

docs: More robust image scaling fix.

Hopefully these benchmarks will be updated in the future, so avoid
hardcoding image dimensions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170819 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Prevent image scaling.

Tell the image to be its natural size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170816 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in the code that checks if we can vectorize loops while using dynamic
memory bound checks.  Before the fix we were able to vectorize this loop from
the Livermore Loops benchmark:

for ( k=1 ; k<n ; k++ )
  x[k] = x[k-1] + y[k];

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170811 91177308-0d34-0410-b5e6-96231b3b80d8

Move these files over to the debug info directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170810 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Try out nosidebar.

Please squawk if you find this appalling or otherwise don't like it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170803 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Cleanup trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170799 91177308-0d34-0410-b5e6-96231b3b80d8

Require the two-argument MI::addOperand(MF, MO) for dangling instructions.

Instructions that are inserted in a basic block can still be decorated
with addOperand(MO).

Make the two-argument addOperand() function contain the actual
implementation. This function will now always have a valid MF reference
that it can use for memory allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170798 91177308-0d34-0410-b5e6-96231b3b80d8

Add an MF argument to MI::copyImplicitOps().

This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.

Also add a corresponding MachineInstrBuilder method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170797 91177308-0d34-0410-b5e6-96231b3b80d8

Use two-arg addOperand(MF, MO) internally in MachineInstr when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170796 91177308-0d34-0410-b5e6-96231b3b80d8

MachineInstrBuilderize ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170795 91177308-0d34-0410-b5e6-96231b3b80d8

MachineInstrBuilderize NVPTX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170794 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an unitialized member variable that may have caused sporadic failures
for code that wasn't even in bundling mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170793 91177308-0d34-0410-b5e6-96231b3b80d8

docs: actually indent these consistently

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170792 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Indent consistently in code examples.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170791 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Improve navigation for Vectorizers.rst

Add links in the intro paragraph.
Add table of contents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170790 91177308-0d34-0410-b5e6-96231b3b80d8

docs: bring back link for reddit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170776 91177308-0d34-0410-b5e6-96231b3b80d8

Whitespace and 80-column cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170771 91177308-0d34-0410-b5e6-96231b3b80d8

Start splitting out the debug string section handling by moving it
into the DwarfUnits class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170770 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Make document name congruent with title.

Hopefully nobody has linked to it yet...

OK'd by Nadav.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170768 91177308-0d34-0410-b5e6-96231b3b80d8

Some random comment, naming, and format changes.

Rename the AttributeImpl* from Attrs to pImpl to be consistent with other code.
Add comments where none were before. Or doxygen-ify other comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170767 91177308-0d34-0410-b5e6-96231b3b80d8

Remove two dead functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170766 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "Adding support for llvm.arm.neon.vaddl[su].* and"

This reverts r170694.  The operations can be represented in IR without
adding any new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170765 91177308-0d34-0410-b5e6-96231b3b80d8

LoopVectorize: Fix a bug in the scalarization of instructions.
Before if-conversion we could check if a value is loop invariant
if it was declared inside the basic block. Now that loops have
multiple blocks this check is incorrect.

This fixes External/SPEC/CINT95/099_go/099_go

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170756 91177308-0d34-0410-b5e6-96231b3b80d8

On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,
are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.

rdar://12892707

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728 91177308-0d34-0410-b5e6-96231b3b80d8

Change Lit error redirection to FileCheck to a more common syntax since it
can potentially cause some bots to fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170726 91177308-0d34-0410-b5e6-96231b3b80d8

Add a largish auto-generated test for the aligned bundling feature, along with
the script generating it. The test should never be modified manually. If anyone
needs to change it, please change the script and re-run it.

The script is placed into utils/testgen - I couldn't think of a better place,
and after some discussion on IRC this looked like a logical location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170720 91177308-0d34-0410-b5e6-96231b3b80d8

Tests for the aligned bundling support added in r170718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170719 91177308-0d34-0410-b5e6-96231b3b80d8

Aligned bundling support. Following the discussion here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-December/056754.html

The proposal and implementation are fully documented here:
https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm

Tests will follow shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170718 91177308-0d34-0410-b5e6-96231b3b80d8

Use MachineInstrBuilder for PHI nodes in SelectionDAGISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170716 91177308-0d34-0410-b5e6-96231b3b80d8

Fix inadvertant delete of 'has'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170713 91177308-0d34-0410-b5e6-96231b3b80d8

Use MachineInstrBuilder in InstrEmitter.

This is supposed to be a mechanical change with no functional effects.

InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.

Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170712 91177308-0d34-0410-b5e6-96231b3b80d8

Use MachineInstrBuilder in a few CodeGen passes.

This automatically passes a context pointer to MI->addOperand().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170711 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify the testcase a bit.

I checked that it would still crash llc before the corresponding fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170709 91177308-0d34-0410-b5e6-96231b3b80d8

Loop Vectorizer: turn-off if-conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170708 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new attribute, 'noduplicate'. If a function contains a noduplicate call, the call cannot be duplicated - Jump threading, loop unrolling, loop unswitching, and loop rotation are inhibited if they would duplicate the call.

Similarly inlining of the function is inhibited, if that would duplicate the call (in particular inlining is still allowed when there is only one callsite and the function has internal linkage).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170704 91177308-0d34-0410-b5e6-96231b3b80d8

Remove MCTargetAsmLexer and its derived classes now that edis,
its only user, is gone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170699 91177308-0d34-0410-b5e6-96231b3b80d8

Adding support for llvm.arm.neon.vaddl[su].* and
llvm.arm.neon.vsub[su].* intrinsics.

Patch by Pete Couperus <pjcoup@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170694 91177308-0d34-0410-b5e6-96231b3b80d8

llvmbuild/main.py: Let LibraryDependencies.inc deterministic.

FYI, llvm and clang can be built deterministically between stage 2 and stage3, among iterative clean rebuilds, with GNU ar;

configure --disable-timestamps
make AR.Flags=crsD RANLIB=echo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170682 91177308-0d34-0410-b5e6-96231b3b80d8

Formatting fixes. Remove some unnecessary 'else' after 'return'. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170676 91177308-0d34-0410-b5e6-96231b3b80d8

Removing trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170675 91177308-0d34-0410-b5e6-96231b3b80d8

Implement cfi_def_cfa_offset. "Make check" test case for this comming in the
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170674 91177308-0d34-0410-b5e6-96231b3b80d8

There is one more patch to finish large frames. Make sure we assert
on code that has large frames which will not yet compile correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673 91177308-0d34-0410-b5e6-96231b3b80d8

Add constant extender support to GP-relative load/store instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672 91177308-0d34-0410-b5e6-96231b3b80d8

Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170671 91177308-0d34-0410-b5e6-96231b3b80d8

set register class properly for mips16 here

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170669 91177308-0d34-0410-b5e6-96231b3b80d8

Undefine PPC harder.

This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170668 91177308-0d34-0410-b5e6-96231b3b80d8

This assert is overly restrictive and does not work for mips16.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667 91177308-0d34-0410-b5e6-96231b3b80d8

Turn on register scavenger for Mips 16
We use an unused Mips 32 register for the emergency slot
instead of using the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor SLT (set on less than) instructions. Separate encoding
information from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor unconditional branch instruction. Separate encoding information
from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass
parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Delete definition of CPRESTORE instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170660 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor conditional branch instructions with one register operand.
Separate encoding information from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659 91177308-0d34-0410-b5e6-96231b3b80d8

Don't use isa<CallInst>(this) in the constructor for CallInst's base class.
This has undefined behavior, because the classof implementation attempts to
access parts of the not-yet-constructed derived class. Found by clang
-fsanitize=vptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170658 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor conditional branch instructions with two register operands.
Separate encoding information from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8

fix most of remaining issues with large frames.
these patches are tested a lot by test-suite but
make check tests are forthcoming once the next
few patches that complete this are committed.
with the next few patches the pass rate for mips16 is
near 100%

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170656 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
physical register $r1 to $r0.

GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.

Original patch by Reed Kotler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8

Fix use-before-construction of X86TargetLowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654 91177308-0d34-0410-b5e6-96231b3b80d8

Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefined
behavior and violates the !range constraints we put on loads of this enum.
Found by clang -fsanitize=enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170653 91177308-0d34-0410-b5e6-96231b3b80d8

Don't leave IsUnsigned uninitialized in a default-constructed APSInt. Copying
such a structure has undefined behavior. Caught by -fsanitize=bool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170652 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Change the order of template parameters. Move the default parameters to
the end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor shift instructions with register operands. Separate encoding
information from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor shift immediate instructions. Separate encoding information
from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor arithmetic and logic instructions with immediate operands.
Separate encoding information from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Refactor arithmetic and logic instructions. Separate encoding
information from the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Show TOC for GettingStarted.rst.

This is a pretty lengthy document, so put the table of contents in your
face so that it's easier to scope out the content.

This document is a mess currently and needs to be
refactored/revised/split-up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170646 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and
ArithLogicI as the instruction base classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170642 91177308-0d34-0410-b5e6-96231b3b80d8

docs: Clean up adornments.

For whatever reason the usage of '^^^' and '---' adornments were
reversed compared to the "canonical" style of the LLVM docs (which is
currently "the style used in SphinxQuickstartTemplate.rst"). This change
doesn't affect the document structure at all, I'm just doing it for
trivial stylistic consistency (the document content is *much* more
important---thanks Nadav for writing this up!).

Also, trim the adornments to be the same length as the section names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170638 91177308-0d34-0410-b5e6-96231b3b80d8

docs: ASCII-fy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170637 91177308-0d34-0410-b5e6-96231b3b80d8

Loop Vectorizer: Enable if-conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170632 91177308-0d34-0410-b5e6-96231b3b80d8

s/AttributesImpl/AttributeImpl/g This is going to apply to Attribute, not Attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170631 91177308-0d34-0410-b5e6-96231b3b80d8

Do not introduce vector operations in functions marked with noimplicitfloat.

<rdar://problem/12879313>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up some DOxygen comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up some DOxygen comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an uninitialized member variable, found by -fsanitize=bool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170627 91177308-0d34-0410-b5e6-96231b3b80d8

whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170626 91177308-0d34-0410-b5e6-96231b3b80d8

doc: resize the image.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170622 91177308-0d34-0410-b5e6-96231b3b80d8

Target/R600: Update MIB according to r170588.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170620 91177308-0d34-0410-b5e6-96231b3b80d8

Doc: update the chart.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170618 91177308-0d34-0410-b5e6-96231b3b80d8

Add a context so that once we uniquify strings we can access them easily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170615 91177308-0d34-0410-b5e6-96231b3b80d8

MC: Add MCInstrDesc::mayAffectControlFlow() method.

MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8

Add isSubRegisterEq() and isSuperRegisterEq().

isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609 91177308-0d34-0410-b5e6-96231b3b80d8

Move isSubRegister() and isSuperRegister to MCRegisterInfo.

These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608 91177308-0d34-0410-b5e6-96231b3b80d8

Fix doc comment. '///' not '//'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor isIntrinsic() to be quicker, and change classof() (and thus, isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170602 91177308-0d34-0410-b5e6-96231b3b80d8

s/AttributeListImpl/AttributeSetImpl/g to match the namechange of AttributeList.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170600 91177308-0d34-0410-b5e6-96231b3b80d8

Always use addOperand(MF, MO) from MachineInstrBuilder.

The single-argument MachineInstr::addOperand(MO) will be removed soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170599 91177308-0d34-0410-b5e6-96231b3b80d8

Add a missing 'else'.  Found by grep '} if'

No testcase because it is apparently not so trivial to construct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170595 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Add entry in CODE_OWNERS.TXT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170594 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Remove unecessary VREG alignment.

Unlike SGPRs VGPRs doesn't need to be aligned.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170593 91177308-0d34-0410-b5e6-96231b3b80d8

R600: control flow optimization

Branch if we have enough instructions so that it makes sense.
Also remove branches if they don't make sense.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170592 91177308-0d34-0410-b5e6-96231b3b80d8

R600: New control flow for SI v2

This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.

It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.

v2: further cleanup, fixes and documentation

Patch by: Christian König

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8

Split out abbreviations for the skeleton info from the rest of
the abbreviations. Part of implementing split dwarf.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170589 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the explicit MachineInstrBuilder(MI) constructor.

Use the version that also takes an MF reference instead.

It would technically be possible to extract an MF reference from the MI
as MI->getParent()->getParent(), but that would not work for MIs that
are not inserted into any basic block.

Given the reasonably small number of places this constructor was used at
all, I preferred the compile time check to a run time assertion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170588 91177308-0d34-0410-b5e6-96231b3b80d8