oota-llvm.git
7 years ago[OCaml] [cmake] Use LLVM_LIBRARY_DIR instead of LLVM_LIBRARY_OUTPUT_INTDIR.
Peter Zotov [Tue, 30 Dec 2014 03:24:07 +0000 (03:24 +0000)]
[OCaml] [cmake] Use LLVM_LIBRARY_DIR instead of LLVM_LIBRARY_OUTPUT_INTDIR.

The latter variable is internal.

Original patch by Ramkumar Ramachandra <artagnon@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224977 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTestcases for r224939.
Craig Topper [Tue, 30 Dec 2014 02:35:56 +0000 (02:35 +0000)]
Testcases for r224939.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224976 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConvert test to llvm-readobj. NFC.
Rafael Espindola [Tue, 30 Dec 2014 01:34:06 +0000 (01:34 +0000)]
Convert test to llvm-readobj. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224973 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSemantic tests for memory invalidation at statepoints
Philip Reames [Mon, 29 Dec 2014 23:55:33 +0000 (23:55 +0000)]
Semantic tests for memory invalidation at statepoints

These are simply a collection of tests intended to show that information about the contents of gc references in the heap is lost at a statepoint. I've tried to write them so that they don't disallow correct transformations, while still being fairly easy to understand.

p.s. Ideas for additional tests are welcome.

Differential Revision: http://reviews.llvm.org/D6491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224971 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCarry facts about nullness and undef across GC relocation
Philip Reames [Mon, 29 Dec 2014 23:27:30 +0000 (23:27 +0000)]
Carry facts about nullness and undef across GC relocation

This change implements four basic optimizations:

    If a relocated value isn't used, it doesn't need to be relocated.
    If the value being relocated is null, relocation doesn't change that. (Technically, this might be collector specific. I don't know of one which it doesn't work for though.)
    If the value being relocated is undef, the relocation is meaningless.
    If the value being relocated was known nonnull, the relocated pointer also isn't null. (Since it points to the same source language object.)

I outlined other planned work in comments.

Differential Revision: http://reviews.llvm.org/D6600

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224968 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRefine the notion of MayThrow in LICM to include a header specific version
Philip Reames [Mon, 29 Dec 2014 23:00:57 +0000 (23:00 +0000)]
Refine the notion of MayThrow in LICM to include a header specific version

In LICM, we have a check for an instruction which is guaranteed to execute and thus can't introduce any new faults if moved to the preheader. To handle a function which might unconditionally throw when first called, we check for any potentially throwing call in the loop and give up.

This is unfortunate when the potentially throwing condition is down a rare path. It prevents essentially all LICM of potentially faulting instructions where the faulting condition is checked outside the loop. It also greatly diminishes the utility of loop unswitching since control dependent instructions - which are now likely in the loops header block - will not be lifted by subsequent LICM runs.

define void @nothrow_header(i64 %x, i64 %y, i1 %cond) {
; CHECK-LABEL: nothrow_header
; CHECK-LABEL: entry
; CHECK: %div = udiv i64 %x, %y
; CHECK-LABEL: loop
; CHECK: call void @use(i64 %div)
entry:
  br label %loop
loop: ; preds = %entry, %for.inc
  %div = udiv i64 %x, %y
  br i1 %cond, label %loop-if, label %exit
loop-if:
  call void @use(i64 %div)
  br label %loop
exit:
  ret void
}

The current patch really only helps with non-memory instructions (i.e. divs, etc..) since the maythrow call down the rare path will be considered to alias an otherwise hoistable load.  The one exception is that it does kick in for loads which are known to be invariant without regard to other possible stores, i.e. those marked with either !invarant.load metadata of tbaa 'is constant memory' metadata.

Differential Revision: http://reviews.llvm.org/D6725

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224965 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[go] Teach the go cmake build functions to funnel the include directories down into...
Chandler Carruth [Mon, 29 Dec 2014 22:50:30 +0000 (22:50 +0000)]
[go] Teach the go cmake build functions to funnel the include directories down into the cgo-setup variables of llvm-go.

Summary:
This in turn allows us to use #includes with cgo that rely on CMake
provided include directories which is particularly useful for handling
generated headers that aren't reasonable to put in an "installable"
location.

Differential Revision: http://reviews.llvm.org/D6798

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224962 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLoading from null is valid outside of addrspace 0
Philip Reames [Mon, 29 Dec 2014 22:46:21 +0000 (22:46 +0000)]
Loading from null is valid outside of addrspace 0

This patches fixes a miscompile where we were assuming that loading from null is undefined and thus we could assume it doesn't happen.  This transform is perfectly legal in address space 0, but is not neccessarily legal in other address spaces.

We really should introduce a hook to control this property on a per target per address space basis.  We may be loosing valuable optimizations in some address spaces by being too conservative.

Original patch by Thomas P Raoux (submitted to llvm-commits), tests and formatting fixes by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224961 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConvert test to llvm-readobj. NFC.
Rafael Espindola [Mon, 29 Dec 2014 22:14:35 +0000 (22:14 +0000)]
Convert test to llvm-readobj. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224959 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment...
Colin LeMahieu [Mon, 29 Dec 2014 21:33:45 +0000 (21:33 +0000)]
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224957 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Fixing 224952 where an addressing mode update was missed.
Colin LeMahieu [Mon, 29 Dec 2014 21:18:02 +0000 (21:18 +0000)]
[Hexagon] Fixing 224952 where an addressing mode update was missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224955 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unnecessary StringRef->std::string conversion.
Alexey Samsonov [Mon, 29 Dec 2014 20:59:02 +0000 (20:59 +0000)]
Remove unnecessary StringRef->std::string conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224953 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding post-increment register form stores and register-immediate form...
Colin LeMahieu [Mon, 29 Dec 2014 20:44:51 +0000 (20:44 +0000)]
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224952 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Replacing the remaining postincrement stores with versions that have encodi...
Colin LeMahieu [Mon, 29 Dec 2014 20:00:43 +0000 (20:00 +0000)]
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224951 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConvert test to FileCheck. NFC.
Rafael Espindola [Mon, 29 Dec 2014 19:50:32 +0000 (19:50 +0000)]
Convert test to FileCheck. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224950 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes...
Colin LeMahieu [Mon, 29 Dec 2014 19:42:14 +0000 (19:42 +0000)]
[Hexagon] Renaming old multiclass for removal.  Adding post-increment store classes and instruction defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224949 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[py3] Teach the CMake build to reject Python versions older than 2.7.
Chandler Carruth [Mon, 29 Dec 2014 19:36:05 +0000 (19:36 +0000)]
[py3] Teach the CMake build to reject Python versions older than 2.7.
Continue to require Python 2 however as recent experiments suggest
LLDB's build requires it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224948 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix some cases where some 8-bit instructions were marked as being convertible...
Craig Topper [Mon, 29 Dec 2014 16:25:26 +0000 (16:25 +0000)]
[X86] Fix some cases where some 8-bit instructions were marked as being convertible to three address instructions, but aren't really.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224940 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add the 0x82 instructions to the disassebmler. They are identical in functional...
Craig Topper [Mon, 29 Dec 2014 16:25:23 +0000 (16:25 +0000)]
[X86] Add the 0x82 instructions to the disassebmler. They are identical in functionality to the 0x80 opcode instructions, but are not valid in 64-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224939 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Refactor some tablegen instruction info classes slightly to prepare for another...
Craig Topper [Mon, 29 Dec 2014 16:25:22 +0000 (16:25 +0000)]
[x86] Refactor some tablegen instruction info classes slightly to prepare for another change. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224938 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Remove unused classes from tablegen instruction info.
Craig Topper [Mon, 29 Dec 2014 16:25:19 +0000 (16:25 +0000)]
[x86] Remove unused classes from tablegen instruction info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224937 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd segmented stack support for DragonFlyBSD.
Rafael Espindola [Mon, 29 Dec 2014 15:47:28 +0000 (15:47 +0000)]
Add segmented stack support for DragonFlyBSD.

Patch by Michael Neumann.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224936 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRefactor duplicated code.
Rafael Espindola [Mon, 29 Dec 2014 15:18:31 +0000 (15:18 +0000)]
Refactor duplicated code.

No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224935 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[multilib] Add support to the autoconf build to substitute
Chandler Carruth [Mon, 29 Dec 2014 11:58:17 +0000 (11:58 +0000)]
[multilib] Add support to the autoconf build to substitute
a CLANG_LIBDIR_SUFFIX variable. This is necessary before I can add
support for using that variable to CMake and the C++ code in Clang, and
the autoconf build system does all substitutions in the LLVM tree.

As mentioned before, I'm not planning to add actual multilib support to
the autoconf build, just enough stubs for it to keep playing nicely with
the CMake build once that one has support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224922 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[cmake] Teach the llvm-config program to respect LLVM_LIBDIR_SUFFIX.
Chandler Carruth [Mon, 29 Dec 2014 11:16:25 +0000 (11:16 +0000)]
[cmake] Teach the llvm-config program to respect LLVM_LIBDIR_SUFFIX.

For this to work, we have to encode it in the build variables and use it
from llvm-config.cpp. I've tried to do this reasonably cleanly, but the
code for llvm-config.cpp is pretty strange. However, with this,
llvm-config stops giving the wrong answer when using LLVM_LIBDIR_SUFFIX.

Note that the configure+make build just sets this to an empty string as
that build system has zero support for multilib of any form. I'm not
planning to add support there either, but this should leave a path for
anyone that wanted to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224921 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[cmake] Push LLVM_LIBDIR_SUFFIX through to the LLVMConfig.cmake file
Chandler Carruth [Mon, 29 Dec 2014 11:16:23 +0000 (11:16 +0000)]
[cmake] Push LLVM_LIBDIR_SUFFIX through to the LLVMConfig.cmake file
that is used by other projects to build against LLVM. This will allow
subsequent patches to them to use LLVM_LIBDIR_SUFFIX, both when built as
part of the larger LLVM build an as part of a standalone build against
an installed set of LLVM libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224920 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[cmake] Start making LLVM_LIBDIR_SUFFIX effective by adding it to
Chandler Carruth [Mon, 29 Dec 2014 11:16:19 +0000 (11:16 +0000)]
[cmake] Start making LLVM_LIBDIR_SUFFIX effective by adding it to
*numerous* places where it was missing in the CMake build. The primary
change here is that the suffix is now actually used for all of the lib
directories in the LLVM project's CMake. The various subprojects still
need similar treatment.

This is the first of a series of commits to try to make LLVM's cmake
effective in a multilib Linux installation. I don't think many people
are seriously using this variable so I'm hoping the fallout will be
minimal. A somewhat unfortunate consequence of the nature of these
commits is that until I land all of them, they will in part make the
brokenness of our multilib support more apparant. At the end, things
should actually work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224919 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixed 2 minor typos in the documentation.
Elena Demikhovsky [Mon, 29 Dec 2014 09:47:51 +0000 (09:47 +0000)]
Fixed 2 minor typos in the documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224917 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm/test/CodeGen/X86/fast-isel-call-bool.ll: Add explicit -mtriple=x86_64-unknown...
NAKAMURA Takumi [Sun, 28 Dec 2014 23:37:11 +0000 (23:37 +0000)]
llvm/test/CodeGen/X86/fast-isel-call-bool.ll: Add explicit -mtriple=x86_64-unknown to satisfy x64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224907 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][ISel] Fix a regression I introduced in r224884
Keno Fischer [Sun, 28 Dec 2014 15:20:57 +0000 (15:20 +0000)]
[X86][ISel] Fix a regression I introduced in r224884

The else case ResultReg was not checked for validity.
To my surprise, this case was not hit in any of the
existing test cases. This includes a new test cases
that tests this path.

Also drop the `target triple` declaration from the
original test as suggested by H.J. Lu, because
apparently with it the test won't be run on Linux

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224901 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add missing memory variants to AVX false dependency breaking
Michael Kuperstein [Sun, 28 Dec 2014 13:15:05 +0000 (13:15 +0000)]
[X86] Add missing memory variants to AVX false dependency breaking

Adds missing memory instruction variants to AVX false dependency breaking handling. (SSE was handled in r224246)

Differential Revision: http://reviews.llvm.org/D6780

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224900 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrepare] Teach when it is profitable to speculate calls to @llvm.cttz/ctlz.
Andrea Di Biagio [Sun, 28 Dec 2014 11:07:35 +0000 (11:07 +0000)]
[CodeGenPrepare] Teach when it is profitable to speculate calls to @llvm.cttz/ctlz.

If the control flow is modelling an if-statement where the only instruction in
the 'then' basic block (excluding the terminator) is a call to cttz/ctlz,
CodeGenPrepare can try to speculate the cttz/ctlz call and simplify the control
flow graph.

Example:
\code
entry:
  %cmp = icmp eq i64 %val, 0
  br i1 %cmp, label %end.bb, label %then.bb

then.bb:
  %c = tail call i64 @llvm.cttz.i64(i64 %val, i1 true)
  br label %end.bb

end.bb:
  %cond = phi i64 [ %c, %then.bb ], [ 64, %entry]
\code

In this example, basic block %then.bb is taken if value %val is not zero.
Also, the phi node in %end.bb would propagate the size-of in bits of %val
only if %val is equal to zero.

With this patch, CodeGenPrepare will try to hoist the call to cttz from %then.bb
into basic block %entry only if cttz is cheap to speculate for the target.

Added two new hooks in TargetLowering.h to let targets customize the behavior
(i.e. decide whether it is cheap or not to speculate calls to cttz/ctlz). The
two new methods are 'isCheapToSpeculateCtlz' and 'isCheapToSpeculateCttz'.
By default, both methods return 'false'.
On X86, method 'isCheapToSpeculateCtlz' returns true only if the target has
LZCNT. Method 'isCheapToSpeculateCttz' only returns true if the target has BMI.

Differential Revision: http://reviews.llvm.org/D6728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224899 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoScalarizer for masked load and store intrinsics.
Elena Demikhovsky [Sun, 28 Dec 2014 08:54:45 +0000 (08:54 +0000)]
Scalarizer for masked load and store intrinsics.

Masked vector intrinsics are a part of common LLVM IR, but they are really supported on AVX2 and AVX-512 targets. I added a code that translates masked intrinsic for all other targets. The masked vector intrinsic is converted to a chain of scalar operations inside conditional basic blocks.

http://reviews.llvm.org/D6436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224897 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal...
Craig Topper [Sat, 27 Dec 2014 20:08:45 +0000 (20:08 +0000)]
[x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Correctly this time. I did the wrong patterns the first time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224891 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPowerPC: CTR shouldn't fire if a TLS call is in the loop
David Majnemer [Sat, 27 Dec 2014 19:45:38 +0000 (19:45 +0000)]
PowerPC: CTR shouldn't fire if a TLS call is in the loop

Determining the address of a TLS variable results in a function call in
certain TLS models.  This means that a simple ICmpInst might actually
result in invalidating the CTR register.

In such cases, do not attempt to rely on the CTR register for loop
optimization purposes.

This fixes PR22034.

Differential Revision: http://reviews.llvm.org/D6786

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224890 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixing another -Wunused-variable warning, this time in release builds without asserts...
Aaron Ballman [Sat, 27 Dec 2014 19:17:53 +0000 (19:17 +0000)]
Fixing another -Wunused-variable warning, this time in release builds without asserts. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224889 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemoving a variable that is set but never used, to silence a -Wunused-but-set-variabl...
Aaron Ballman [Sat, 27 Dec 2014 19:01:19 +0000 (19:01 +0000)]
Removing a variable that is set but never used, to silence a -Wunused-but-set-variable warning; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224888 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal...
Craig Topper [Sat, 27 Dec 2014 18:51:06 +0000 (18:51 +0000)]
[x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Forgot to do this when I did SSE/SSE2/AVX/AVX2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224887 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Assert on invalid immediates in the instruction printer for cmp.ps/pd/ss/sd...
Craig Topper [Sat, 27 Dec 2014 18:11:00 +0000 (18:11 +0000)]
[x86] Assert on invalid immediates in the instruction printer for cmp.ps/pd/ss/sd instead of truncating the immediate. The assembly parser and instruction selection shouldn't generate invalid immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224886 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selected with bad immediates. The...
Craig Topper [Sat, 27 Dec 2014 18:10:56 +0000 (18:10 +0000)]
[x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selected with bad immediates. The frontend now checks this when the builtin is used. This will allow the instruction printer to not have to deal with invalid immediates on these instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224885 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastIsel][X86] Fix invalid register replacement for bool args
Keno Fischer [Sat, 27 Dec 2014 13:10:15 +0000 (13:10 +0000)]
[FastIsel][X86] Fix invalid register replacement for bool args

Summary:
Consider the following IR:

  %3 = load i8* undef
  %4 = trunc i8 %3 to i1
  %5 = call %jl_value_t.0* @foo(..., i1 %4, ...)
  ret %jl_value_t.0* %5

Bools (that are the result of direct truncs) are lowered as whatever
the argument to the trunc was and a "and 1", causing the part of the
MBB responsible for this argument to look something like this:

  %vreg8<def,tied1> = AND8ri %vreg7<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg8,%vreg7

Later, when the load is lowered, it will insert

  %vreg15<def> = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14

but remember to (at the end of isel) replace vreg7 by vreg15. Now for
the bug. In fast isel lowering, we mistakenly mark vreg8 as the result
of the load instead of the trunc. This adds a fixup to have
vreg8 replaced by whatever the result of the load is as well, so
we end up with

  %vreg15<def,tied1> = AND8ri %vreg15<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg15

which is an SSA violation and causes problems later down the road.

This fixes PR21557.

Test Plan: Test test case from PR21557 is added to the test suite.

Reviewers: ributzka

Reviewed By: ributzka

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224884 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConvert test to llvm-readobj. NFC.
Rafael Espindola [Fri, 26 Dec 2014 22:47:39 +0000 (22:47 +0000)]
Convert test to llvm-readobj. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224872 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding auto-incrementing loads with and without byte reversal.
Colin LeMahieu [Fri, 26 Dec 2014 21:09:25 +0000 (21:09 +0000)]
[Hexagon] Adding auto-incrementing loads with and without byte reversal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224871 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding locked loads.
Colin LeMahieu [Fri, 26 Dec 2014 20:42:27 +0000 (20:42 +0000)]
[Hexagon] Adding locked loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224870 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding deallocframe and circular addressing loads.
Colin LeMahieu [Fri, 26 Dec 2014 20:30:58 +0000 (20:30 +0000)]
[Hexagon] Adding deallocframe and circular addressing loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224869 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding remaining post-increment instruction variants. Removing unused...
Colin LeMahieu [Fri, 26 Dec 2014 19:31:46 +0000 (19:31 +0000)]
[Hexagon] Adding remaining post-increment instruction variants.  Removing unused classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224868 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding post-increment unsigned byte loads.
Colin LeMahieu [Fri, 26 Dec 2014 19:12:11 +0000 (19:12 +0000)]
[Hexagon] Adding post-increment unsigned byte loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224867 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding post-increment signed byte loads with tests.
Colin LeMahieu [Fri, 26 Dec 2014 18:57:13 +0000 (18:57 +0000)]
[Hexagon] Adding post-increment signed byte loads with tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224866 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse llvm-readobj. NFC.
Rafael Espindola [Fri, 26 Dec 2014 18:22:05 +0000 (18:22 +0000)]
Use llvm-readobj. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224864 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references...
Craig Topper [Fri, 26 Dec 2014 18:20:05 +0000 (18:20 +0000)]
[X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224862 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Don't fail disassembly if REX.R/REX.B is used on an MMX register. Similar fix...
Craig Topper [Fri, 26 Dec 2014 18:19:44 +0000 (18:19 +0000)]
[X86] Don't fail disassembly if REX.R/REX.B is used on an MMX register. Similar fix to not fail to disassembler CR9-CR15 references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224861 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBand-aid fix for PR22032: don't emit DWARF debug info if AddressSanitizer is enabled...
Timur Iskhodzhanov [Fri, 26 Dec 2014 17:00:51 +0000 (17:00 +0000)]
Band-aid fix for PR22032: don't emit DWARF debug info if AddressSanitizer is enabled on Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224860 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNo need to run llvm-as. NFC.
Rafael Espindola [Fri, 26 Dec 2014 16:42:47 +0000 (16:42 +0000)]
No need to run llvm-as. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224859 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Infer nuw for multiplies
David Majnemer [Fri, 26 Dec 2014 09:50:35 +0000 (09:50 +0000)]
InstCombine: Infer nuw for multiplies

A multiply cannot unsigned wrap if there are bitwidth, or more, leading
zero bits between the two operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224849 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoValueTracking: Small cleanup in ComputeNumSignBits
David Majnemer [Fri, 26 Dec 2014 09:20:17 +0000 (09:20 +0000)]
ValueTracking: Small cleanup in ComputeNumSignBits

Constant contains the isAllOnesValue and isNullValue predicates, not
ConstantInt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224848 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombe: Infer nsw for multiplies
David Majnemer [Fri, 26 Dec 2014 09:10:14 +0000 (09:10 +0000)]
InstCombe: Infer nsw for multiplies

We already utilize this logic for reducing overflow intrinsics, it makes
sense to reuse it for normal multiplies as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224847 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTeach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd instructions...
Craig Topper [Fri, 26 Dec 2014 06:36:28 +0000 (06:36 +0000)]
Teach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd instructions. Instead of rejecting we'll just generate the _alt forms that don't try to alter the mnemonic. While I'm here, merge some common code in the Instruction printers for the condition code replacement and fix the mask on SSE to be 3-bits instead of 4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224846 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse MCPhysReg for table of register encodings.
Craig Topper [Fri, 26 Dec 2014 06:36:23 +0000 (06:36 +0000)]
Use MCPhysReg for table of register encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224845 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] [FastISel] i1 constants must be zero extended
Hal Finkel [Thu, 25 Dec 2014 23:08:25 +0000 (23:08 +0000)]
[PowerPC] [FastISel] i1 constants must be zero extended

When materializing constant i1 values, they must be zero extended. We represent
i1 values as [0, 1], not [0, -1], in i32 registers. As it turns out, this code
path was dead for i1 values prior to r216006 (which is why this did not manifest in
miscompiles until recently).

Fixes -O0 self-hosting on PPC64/Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224842 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSilence GCC's -Wparentheses warning
David Majnemer [Thu, 25 Dec 2014 10:03:23 +0000 (10:03 +0000)]
Silence GCC's -Wparentheses warning

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224833 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDocumentation for Masked Load and Store intrinsics.
Elena Demikhovsky [Thu, 25 Dec 2014 09:29:13 +0000 (09:29 +0000)]
Documentation for Masked Load and Store intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224832 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMasked Load/Store - Changed the order of parameters in intrinsics.
Elena Demikhovsky [Thu, 25 Dec 2014 07:49:20 +0000 (07:49 +0000)]
Masked Load/Store - Changed the order of parameters in intrinsics.
No functional changes.
The documentation is coming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224829 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: Error on redefinitions instead of asserting
David Majnemer [Wed, 24 Dec 2014 23:06:55 +0000 (23:06 +0000)]
CodeGen: Error on redefinitions instead of asserting

It's possible to have a prior definition of a symbol in module asm.
Raise an error instead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224828 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: Allow aliases to be overridden by variables
David Majnemer [Wed, 24 Dec 2014 22:44:29 +0000 (22:44 +0000)]
CodeGen: Allow aliases to be overridden by variables

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224827 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC: address some comments in deprecation checks
Saleem Abdulrasool [Wed, 24 Dec 2014 18:40:42 +0000 (18:40 +0000)]
MC: address some comments in deprecation checks

Bob Wilson pointed out the unnecessary checks that had been committed to the
instruction check predicates.  The check was meant to ensure that the check was
not accidentally applied to non-ARM instructions.  This is better served as an
assertion rather than a condition check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224825 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC: Label definitions are permitted after .set directives
David Majnemer [Wed, 24 Dec 2014 10:27:50 +0000 (10:27 +0000)]
MC: Label definitions are permitted after .set directives

.set directives may be overridden by other .set directives as well as
label definitions.

This fixes PR22019.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224811 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIAS: correct debug line info for asm macros
Saleem Abdulrasool [Wed, 24 Dec 2014 06:32:43 +0000 (06:32 +0000)]
IAS: correct debug line info for asm macros

Correct the line information generation for preprocessed assembly.  Although we
tracked the source information for the macro instantiation, we failed to account
for the fact that we were instantiating a macro, which is populated into a new
buffer and that the line information would be relative to the definition rather
than the actual instantiation location.  This could cause the line number
associated with the statement to be very high due to wrapping of the difference
calculated for the preprocessor line information emitted into the stream.
Properly calculate the line for the macro instantiation, referencing the line
where the macro is actually used as GCC/gas do.

The test case uses x86, though the same problem exists on any other target using
the LLVM IAS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224810 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove the single AdSize indicator and replace it with separate AdSize16/32...
Craig Topper [Wed, 24 Dec 2014 06:05:22 +0000 (06:05 +0000)]
[X86] Remove the single AdSize indicator and replace it with separate AdSize16/32/64 flags.

This removes a hardcoded list of instructions in the CodeEmitter. Eventually I intend to remove the predicates on the affected instructions since in any given mode two of them are valid if we supported addr32/addr16 prefixes in the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224809 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC: Don't emit .no_dead_strip on targets which don't support it
David Majnemer [Wed, 24 Dec 2014 04:11:42 +0000 (04:11 +0000)]
MC: Don't emit .no_dead_strip on targets which don't support it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224808 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveInterval: Remove accidentally committed debug code.
Matthias Braun [Wed, 24 Dec 2014 02:35:07 +0000 (02:35 +0000)]
LiveInterval: Remove accidentally committed debug code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224807 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveInterval: Introduce createMainRangeFromSubranges().
Matthias Braun [Wed, 24 Dec 2014 02:11:51 +0000 (02:11 +0000)]
LiveInterval: Introduce createMainRangeFromSubranges().

This function constructs the main liverange by merging all subranges if
subregister liveness tracking is available. This should be slightly
faster to compute instead of performing the liveness calculation again
for the main range. More importantly it avoids cases where the main
liverange would cover positions where no subrange was live. These cases
happened for partial definitions where the actual defined part was dead
and only the undefined parts used later.

The register coalescing requires that every part covered by the main
live range has at least one subrange live.

I also expect this function to become usefull later for places where the
subranges are modified in a way that it is hard to correctly fix the
main liverange in the machine scheduler, we can simply reconstruct it
from subranges then.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224806 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRegisterCoalescer: With subrange liveness there may be no RedefVNI for unused lanes.
Matthias Braun [Wed, 24 Dec 2014 02:11:48 +0000 (02:11 +0000)]
RegisterCoalescer: With subrange liveness there may be no RedefVNI for unused lanes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224805 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveRangeEdit: Check for completely empy subranges after removing ValNos.
Matthias Braun [Wed, 24 Dec 2014 02:11:46 +0000 (02:11 +0000)]
LiveRangeEdit: Check for completely empy subranges after removing ValNos.

Completely empty subranges are not allowed and must be removed when
subreg liveness is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224804 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveIntervalAnalysis: Fix performance bug that I introduced in r224663.
Matthias Braun [Wed, 24 Dec 2014 02:11:43 +0000 (02:11 +0000)]
LiveIntervalAnalysis: Fix performance bug that I introduced in r224663.

Without a reference the code did not remember when moving the iterators
of the subranges/registerunit ranges forward and instead would scan from
the beginning again at the next position.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224803 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[OCaml] PR21901: Update tests.
Peter Zotov [Wed, 24 Dec 2014 01:58:45 +0000 (01:58 +0000)]
[OCaml] PR21901: Update tests.

This finishes the fix partially applied by r224782.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224802 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[OCaml] Expose Llvm_executionengine.get_{global_value,function}_address.
Peter Zotov [Wed, 24 Dec 2014 01:52:51 +0000 (01:52 +0000)]
[OCaml] Expose Llvm_executionengine.get_{global_value,function}_address.

Patch by Ramkumar Ramachandra <artagnon@gmail.com>.

Also remove Llvm_executionengine.get_pointer_to_global, as it
is actually deprecated and didn't appear in a stable release.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224801 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SROA] Update the documentation and names for accessing the slices
Chandler Carruth [Wed, 24 Dec 2014 01:48:09 +0000 (01:48 +0000)]
[SROA] Update the documentation and names for accessing the slices
within a partition of an alloca in SROA.

This reflects the fact that the organization of the slices isn't really
ideal for analysis, but is the naive way in which the slices are
available while we're processing them in the core partitioning
algorithm.

It is possible we could improve matters, and I've left a FIXME with
one of my ideas for how to do this, but it is a lot of work, the benefit
is somewhat minor, and it isn't clear that it would be strictly better.
=/ Not really satisfying, but I'm out of really good ideas.

This also improves one place where the debug logging failed to mark some
split partitions. Now we log in one place, slightly later, and with
accurate information about whether the slice is split by the partition
being rewritten.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224800 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebug Info: In symmetry to DW_TAG_pointer_type, do not emit the byte size
Adrian Prantl [Wed, 24 Dec 2014 01:17:51 +0000 (01:17 +0000)]
Debug Info: In symmetry to DW_TAG_pointer_type, do not emit the byte size
of a DW_TAG_ptr_to_member_type.
This restores the behavior from before r224780-r224781.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224799 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SROA] Refactor the integer and vector promotion testing logic to
Chandler Carruth [Wed, 24 Dec 2014 01:05:14 +0000 (01:05 +0000)]
[SROA] Refactor the integer and vector promotion testing logic to
operate in terms of the new Partition class, and generally have a more
clear set of arguments. No functionality changed.

The most notable improvements here are consistently using the
terminology of 'partition' for a collection of slices that will be
rewritten together and 'slice' for a region of an alloca that is used by
a particular instruction.

This also makes it more clear that the split things are actually slices
as well, just ones that will be split by the proposed partition.

This doesn't yet address the confusing aspects of the partition's
interface where slices that will be split by the partition and start
prior to the partition are accesssed via Partition::splitSlices() while
the core range of slices exposed by a Partition includes both unsplit
slices and slices which will be split by the end, but started within the
offset range of the partition. This is particularly hard to address
because the algorithm which computes partitions quite literally doesn't
know which slices these will end up being until too late. I'm looking at
whether I can fix that or not, but I'm not optimistic. I'll update the
comments and/or names to further explain this either way. I've also
added one FIXME in this patch relating to this confusion so that I don't
forget about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224798 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Removing old classes.
Colin LeMahieu [Wed, 24 Dec 2014 00:43:00 +0000 (00:43 +0000)]
[Hexagon] Removing old classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224795 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAnother attempt to fix the LLVM Windows build bot lld-x86_64-win7, one last place...
Kevin Enderby [Wed, 24 Dec 2014 00:16:51 +0000 (00:16 +0000)]
Another attempt to fix the LLVM Windows build bot lld-x86_64-win7, one last place to fix I think.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224794 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAttempt to fix the LLVM Windows build bot lld-x86_64-win7.
Kevin Enderby [Tue, 23 Dec 2014 23:43:59 +0000 (23:43 +0000)]
Attempt to fix the LLVM Windows build bot lld-x86_64-win7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224793 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd printing the LC_THREAD load commands with llvm-objdump’s -private-headers.
Kevin Enderby [Tue, 23 Dec 2014 22:56:39 +0000 (22:56 +0000)]
Add printing the LC_THREAD load commands with llvm-objdump’s -private-headers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224792 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[asan] change the coverage collection scheme so that we can easily emit coverage...
Kostya Serebryany [Tue, 23 Dec 2014 22:32:17 +0000 (22:32 +0000)]
[asan] change the coverage collection scheme so that we can easily emit coverage for the entire process as a single bit set, and if coverage_bitset=1 actually emit that bitset

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224789 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64
Hal Finkel [Tue, 23 Dec 2014 22:29:40 +0000 (22:29 +0000)]
[PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64

On non-Darwin PPC64, the TOC reload needs to come directly after the bctrl
instruction (for indirect calls) because the 'bctrl/ld 2, 40(1)' instruction
sequence is interpreted by the unwinding code in libgcc. To make sure these
occur as a pair, as with other pairings interpreted by the linker, fuse the two
instructions into one instruction (for code generation only).

In the future, we might wish to do this by emitting CFI directives instead,
but this solution is simpler, and mirrors what GCC does. Additional discussion
on this point is contained in the PR.

Fixes PR22015.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224788 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding doubleword load.
Colin LeMahieu [Tue, 23 Dec 2014 20:44:59 +0000 (20:44 +0000)]
[Hexagon] Adding doubleword load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224787 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Reapplying 224775 load words.
Colin LeMahieu [Tue, 23 Dec 2014 20:02:16 +0000 (20:02 +0000)]
[Hexagon] Reapplying 224775 load words.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224786 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions
Jozef Kolek [Tue, 23 Dec 2014 19:55:34 +0000 (19:55 +0000)]
[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions

Differential Revision: http://reviews.llvm.org/D5204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224785 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReverting 224775 until mayLoad flag is addressed.
Colin LeMahieu [Tue, 23 Dec 2014 19:22:59 +0000 (19:22 +0000)]
Reverting 224775 until mayLoad flag is addressed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224783 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFinish removing DestroySource.
Rafael Espindola [Tue, 23 Dec 2014 19:16:45 +0000 (19:16 +0000)]
Finish removing DestroySource.

Fixes pr21901.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224782 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDIBuilder: Similar to createPointerType, make createMemberPointerType take
Adrian Prantl [Tue, 23 Dec 2014 19:11:47 +0000 (19:11 +0000)]
DIBuilder: Similar to createPointerType, make createMemberPointerType take
a size and alignment. Several assertions in DwarfDebug rely on all variable
types to report back a size, or to be derived from a type with a size.

Tested in CFE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224780 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAlways assert in DAGCombine and not only when -debug is enabled
Mehdi Amini [Tue, 23 Dec 2014 18:59:02 +0000 (18:59 +0000)]
Always assert in DAGCombine and not only when -debug is enabled

Right now in DAG Combine check the validity of the returned type
only when -debug is given on the command line. However usually
the test cases in the validation does not use -debug.
An Assert build should always check this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224779 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPass LSAN_OPTIONS down so that it is possible to add suppressions.
Rafael Espindola [Tue, 23 Dec 2014 18:39:02 +0000 (18:39 +0000)]
Pass LSAN_OPTIONS down so that it is possible to add suppressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224777 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a leak found by asan.
Rafael Espindola [Tue, 23 Dec 2014 18:18:37 +0000 (18:18 +0000)]
Fix a leak found by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224776 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding word loads.
Colin LeMahieu [Tue, 23 Dec 2014 18:06:56 +0000 (18:06 +0000)]
[Hexagon] Adding word loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224775 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding signed halfword loads.
Colin LeMahieu [Tue, 23 Dec 2014 17:25:57 +0000 (17:25 +0000)]
[Hexagon] Adding signed halfword loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224774 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a leak found by asan.
Rafael Espindola [Tue, 23 Dec 2014 17:20:23 +0000 (17:20 +0000)]
Fix a leak found by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224773 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding unsigned halfword load.
Colin LeMahieu [Tue, 23 Dec 2014 16:42:57 +0000 (16:42 +0000)]
[Hexagon] Adding unsigned halfword load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224772 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement LWSP and SWSP instructions
Jozef Kolek [Tue, 23 Dec 2014 16:16:33 +0000 (16:16 +0000)]
[mips][microMIPS] Implement LWSP and SWSP instructions

Differential Revision: http://reviews.llvm.org/D6416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224771 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[OCaml] PR22014: OCaml bindings didn't link to libLLVM-*.so with -Wl,--as-needed
Peter Zotov [Tue, 23 Dec 2014 13:09:59 +0000 (13:09 +0000)]
[OCaml] PR22014: OCaml bindings didn't link to libLLVM-*.so with -Wl,--as-needed

Patch by Evangelos Foutras <evangelos@foutrelis.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224766 91177308-0d34-0410-b5e6-96231b3b80d8