7 years agoDoing some cleanup to the iOS toolchain.
Chris Bieneman [Thu, 12 Mar 2015 16:19:16 +0000 (16:19 +0000)]
Doing some cleanup to the iOS toolchain.

* There is no reason to require SDKROOT as an environment variable because we can derive it from xcrun
* Setting CMAKE_RANLIB makes our static archives usable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232053 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIRBuilder: add a CreateShuffleVector function that takes an ArrayRef of int
Sanjay Patel [Thu, 12 Mar 2015 15:27:07 +0000 (15:27 +0000)]
IRBuilder: add a CreateShuffleVector function that takes an ArrayRef of int

This is a convenience function to ease mask creation of ShuffleVectors
in AutoUpgrade and other places.

Differential Revision: http://reviews.llvm.org/D8184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232047 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix wrong target specific combine on SETCC nodes.
Andrea Di Biagio [Thu, 12 Mar 2015 15:16:58 +0000 (15:16 +0000)]
[X86] Fix wrong target specific combine on SETCC nodes.

Part of the folding logic implemented by function 'PerformISDSETCCCombine'
only worked under the assumption that the condition code in input could have
been either SETNE or SETEQ.
Unfortunately that assumption was incorrect, and in some cases the algorithm
ended up incorrectly folding SETCC nodes.

The incorrect folding only affected SETCC dag nodes where:
 - one of the operands was a build_vector of all zeroes;
 - the other operand was a SIGN_EXTEND from a vector of MVT:i1 elements;
 - the condition code was neither SETNE nor SETEQ.

  (setcc (v4i32 (sign_extend v4i1:%A)), (v4i32 VectorOfAllZeroes), setge)

Before this patch, the entire dag node sequence from the example was
incorrectly folded to node %A.

With this patch, the dag node sequence is folded to a
  (xor %A, (v4i1 VectorOfAllOnes)).

Added test setcc-combine.ll.

Thanks to Greg Bedwell for spotting this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232046 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86, AVX] replace vextractf128 intrinsics with generic shuffles
Sanjay Patel [Thu, 12 Mar 2015 15:15:19 +0000 (15:15 +0000)]
[X86, AVX] replace vextractf128 intrinsics with generic shuffles

Now that we've replaced the vinsertf128 intrinsics,
do the same for their extract twins.

This is very much like D8086 (checked in at r231794):
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

This is also the LLVM sibling to the cfe D8275 patch.

Differential Revision: http://reviews.llvm.org/D8276

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232045 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSilencing an "enumeral and non-enumeral type in conditional expression" warning;...
Aaron Ballman [Thu, 12 Mar 2015 13:24:06 +0000 (13:24 +0000)]
Silencing an "enumeral and non-enumeral type in conditional expression" warning; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232035 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX2] Added missing palignr stack folding test
Simon Pilgrim [Thu, 12 Mar 2015 13:12:33 +0000 (13:12 +0000)]
[X86][AVX2] Added missing palignr stack folding test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232033 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd infrastructure for support of multiple memory constraints.
Daniel Sanders [Thu, 12 Mar 2015 11:00:48 +0000 (11:00 +0000)]
Add infrastructure for support of multiple memory constraints.

The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232027 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Object/ELF] Add support for setVisibility()
Davide Italiano [Thu, 12 Mar 2015 07:48:25 +0000 (07:48 +0000)]
[Object/ELF] Add support for setVisibility()

This is a prerequisite to implement symbol visibility for ELF
in lld.

Differential Revision: http://reviews.llvm.org/D8279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232020 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Added encoding tests for VPROR, VPROL instructions,
Elena Demikhovsky [Thu, 12 Mar 2015 07:28:41 +0000 (07:28 +0000)]
AVX-512: Added encoding tests for VPROR, VPROL instructions,
fixed opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232018 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove some unnecessary forward declarations and put a couple more
Eric Christopher [Thu, 12 Mar 2015 06:07:16 +0000 (06:07 +0000)]
Remove some unnecessary forward declarations and put a couple more
where they're supposed to reside.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232014 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the need to cache the subtarget in the Sparc TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 05:55:26 +0000 (05:55 +0000)]
Remove the need to cache the subtarget in the Sparc TargetRegisterInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232013 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the need to cache the subtarget in the Mips TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 05:43:57 +0000 (05:43 +0000)]
Remove the need to cache the subtarget in the Mips TargetRegisterInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232012 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply 'Run LICM pass after loop unrolling pass.'
Kevin Qin [Thu, 12 Mar 2015 05:36:01 +0000 (05:36 +0000)]
Reapply 'Run LICM pass after loop unrolling pass.'

It's firstly committed at r231630, and reverted at r231635.

Function pass InstructionSimplifier is inserted as barrier to
make sure loop unroll pass won't affect on LICM pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232011 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the need to cache the subtarget in the ARM TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 05:12:31 +0000 (05:12 +0000)]
Remove the need to cache the subtarget in the ARM TargetRegisterInfo
classes. Replace the frame pointer initialization with a static function
that'll look it up via the subtarget on the MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232010 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodocs: Fix a typo in my previous commit
Justin Bogner [Thu, 12 Mar 2015 04:43:01 +0000 (04:43 +0000)]
docs: Fix a typo in my previous commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232009 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodocs: Document the llvm-cov show and report commands
Justin Bogner [Thu, 12 Mar 2015 04:18:21 +0000 (04:18 +0000)]
docs: Document the llvm-cov show and report commands

Add a basic synopsis of how to work with instrprof based coverage
using the llvm-cov tools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232007 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the need to cache the subtarget in the AArch64 TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 02:04:46 +0000 (02:04 +0000)]
Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo
classes. Replace it with a cache to the Triple and use that
where applicable at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232005 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[NVPTXAsmPrinter] do not print .align on function headers
Jingyue Wu [Thu, 12 Mar 2015 01:50:30 +0000 (01:50 +0000)]
[NVPTXAsmPrinter] do not print .align on function headers

PTX does not allow .align directives on function headers.

Fixes PR21551.

Test Plan: test/Codegen/NVPTX/function-align.ll

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: llvm-commits, eliben, jpienaar, jholewinski

Differential Revision: http://reviews.llvm.org/D8274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232004 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake llvm.eh.actions an intrinsic and add docs for it
Reid Kleckner [Thu, 12 Mar 2015 01:45:37 +0000 (01:45 +0000)]
Make llvm.eh.actions an intrinsic and add docs for it

These docs *don't* match the way WinEHPrepare uses them yet, and
verifier support isn't implemented either. The implementation will come
after the documentation text is reviewed and agreed upon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232003 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the need to cache the subtarget in the PowerPC TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 01:42:51 +0000 (01:42 +0000)]
Remove the need to cache the subtarget in the PowerPC TargetRegisterInfo
classes. Replace it with a cache to the TargetMachine and use that
where applicable at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232002 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodocs: Try to fix a couple of internal links in the llvm-profdata manual
Justin Bogner [Thu, 12 Mar 2015 01:38:50 +0000 (01:38 +0000)]
docs: Try to fix a couple of internal links in the llvm-profdata manual

These links seem broken on llvm.org/docs. Change them to use the
sphinx-recommended style to see if that helps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232001 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove some CHECK-NOT lines in favor of CHECK-NEXT
Reid Kleckner [Thu, 12 Mar 2015 01:38:48 +0000 (01:38 +0000)]
Remove some CHECK-NOT lines in favor of CHECK-NEXT

NFC, this is just shorter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232000 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate for a new year.
Eric Christopher [Thu, 12 Mar 2015 01:25:29 +0000 (01:25 +0000)]
Update for a new year.

Patch by Tanya Lattner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231998 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build break introduced in r231992
Krzysztof Parzyszek [Thu, 12 Mar 2015 00:49:13 +0000 (00:49 +0000)]
Fix build break introduced in r231992

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231996 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStop calling DwarfEHPrepare from WinEHPrepare
Reid Kleckner [Thu, 12 Mar 2015 00:36:20 +0000 (00:36 +0000)]
Stop calling DwarfEHPrepare from WinEHPrepare

Instead, run both EH preparation passes, and have them both ignore
functions with unrecognized EH personalities. Pass delegation involved
some hacky code for creating an AnalysisResolver that we don't need now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231995 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEliminate constant-extender profitability checks from Hexagon isel
Krzysztof Parzyszek [Thu, 12 Mar 2015 00:19:59 +0000 (00:19 +0000)]
Eliminate constant-extender profitability checks from Hexagon isel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231992 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix FileCheck: substr() expect the length of the string as 2nd arg
Mehdi Amini [Thu, 12 Mar 2015 00:07:29 +0000 (00:07 +0000)]
Fix FileCheck: substr() expect the length of the string as 2nd arg

The code assumed that substr() was taking start,end while it takes

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231988 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove the DataLayout to the generic TargetMachine, making it mandatory.
Mehdi Amini [Thu, 12 Mar 2015 00:07:24 +0000 (00:07 +0000)]
Move the DataLayout to the generic TargetMachine, making it mandatory.

I don't know why every singled backend had to redeclare its own DataLayout.
There was a virtual getDataLayout() on the common base TargetMachine, the
default implementation returned nullptr. It was not clear from this that
we could assume at call site that a DataLayout will be available with
each Target.

Now getDataLayout() is no longer virtual and return a pointer to the
DataLayout member of the common base TargetMachine. I plan to turn it into
a reference in a future patch.

The only backend that didn't have a DataLayout previsouly was the CPPBackend.
It now initializes the default DataLayout. This commit is NFC for all the
other backends.

Test Plan: clang+llvm ninja check-all

Reviewers: echristo

Subscribers: jfb, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8243

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231987 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix some clang warnings in WinEHPrepare
Reid Kleckner [Wed, 11 Mar 2015 23:39:36 +0000 (23:39 +0000)]
Fix some clang warnings in WinEHPrepare

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231985 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHandle big index in getelementptr instruction
Reid Kleckner [Wed, 11 Mar 2015 23:36:10 +0000 (23:36 +0000)]
Handle big index in getelementptr instruction

CodeGen incorrectly ignores (assert from APInt) constant index bigger
than 2^64 in getelementptr instruction. This is a test and fix for that.

Patch by PaweĊ‚ Bylica!

Reviewed By: rnk

Subscribers: majnemer, rnk, mcrosier, resistor, llvm-commits

Differential Revision: http://reviews.llvm.org/D8219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231984 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Remove canFoldAsLoad from instruction definitions
Hal Finkel [Wed, 11 Mar 2015 23:28:38 +0000 (23:28 +0000)]
[PowerPC] Remove canFoldAsLoad from instruction definitions

The PowerPC backend had a number of loads that were marked as canFoldAsLoad
(and I'm partially at fault here for copying around the relevant line of
TableGen definitions without really looking at what it meant). This is not
right; PPC (non-memory) instructions don't support direct memory operands, and
so there is nothing a 'foldable' instruction could be folded into.

Noticed by inspection, no test case.

The one thing we might lose by doing this is ability to fold some loads into
stackmap/patchpoint pseudo-instructions. However, this was untested, and would
not obviously have worked for extending loads, and I'd rather re-add support
for that once it can be tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231982 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExtended support for native Windows C++ EH outlining
Andrew Kaylor [Wed, 11 Mar 2015 23:22:06 +0000 (23:22 +0000)]
Extended support for native Windows C++ EH outlining

Differential Review: http://reviews.llvm.org/D7886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231981 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove useMachineScheduler and replace it with subtarget options
Eric Christopher [Wed, 11 Mar 2015 22:56:10 +0000 (22:56 +0000)]
Remove useMachineScheduler and replace it with subtarget options
that control, individually, all of the disparate things it was

At the same time move a FIXME in the Hexagon port to a new
subtarget function that will enable a user of the machine
scheduler to avoid using the source scheduler for pre-RA-scheduling.
The FIXME would have this removed, but involves either testcase
changes or adding -pre-RA-sched=source to a few testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231980 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHave getCallPreservedMask and getThisCallPreservedMask take a
Eric Christopher [Wed, 11 Mar 2015 22:42:13 +0000 (22:42 +0000)]
Have getCallPreservedMask and getThisCallPreservedMask take a
MachineFunction argument so that we can grab subtarget specific
features off of it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231979 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoOne more getCalleeSavedRegs prototype with nullptr.
Eric Christopher [Wed, 11 Mar 2015 22:24:37 +0000 (22:24 +0000)]
One more getCalleeSavedRegs prototype with nullptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231977 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd the option, -info-plist to llvm-objdump used with -macho to print the
Kevin Enderby [Wed, 11 Mar 2015 22:06:32 +0000 (22:06 +0000)]
Add the option, -info-plist to llvm-objdump used with -macho to print the
Mach-O info plist section as strings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231974 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHave getCalleeSavedRegs take a non-null MachineFunction all the
Eric Christopher [Wed, 11 Mar 2015 21:41:28 +0000 (21:41 +0000)]
Have getCalleeSavedRegs take a non-null MachineFunction all the
time. The target independent code was passing in one all the
time and targets weren't checking validity before using. Update
a few calls to pass in a MachineFunction where necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231970 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConstify AArch64CollectLOH.cpp. NFC
Pete Cooper [Wed, 11 Mar 2015 21:40:25 +0000 (21:40 +0000)]
Constify AArch64CollectLOH.cpp.  NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231969 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[dsymutil] Gather function ranges during DIE selection."
Frederic Riss [Wed, 11 Mar 2015 21:17:41 +0000 (21:17 +0000)]
Revert "[dsymutil] Gather function ranges during DIE selection."

This reverts commit r231957.

IntervalMap currently doesn't support keys more aligned than host pointers
and I've been using it with uint64_t keys. This asserts on some 32bits

Revert while I work on an IntervalMap generalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231967 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Make usage of NOT16 by code generator
Jozef Kolek [Wed, 11 Mar 2015 20:28:31 +0000 (20:28 +0000)]
[mips][microMIPS] Make usage of NOT16 by code generator

Differential Revision: http://reviews.llvm.org/D7748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231963 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd CHECK-LABELs for better reliability
Sanjay Patel [Wed, 11 Mar 2015 20:12:07 +0000 (20:12 +0000)]
add CHECK-LABELs for better reliability

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231962 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPut jump tables in unique sections on COFF.
Rafael Espindola [Wed, 11 Mar 2015 19:58:37 +0000 (19:58 +0000)]
Put jump tables in unique sections on COFF.

If a function is going in an unique section (because of -ffunction-sections
for example), putting a jump table in .rodata will keep .rodata alive and
that will keep alive any other function that also has a jump table.

Instead, put the jump table in a unique section that is associated with the

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231961 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: simplify and extend byval handling
Tim Northover [Wed, 11 Mar 2015 18:54:22 +0000 (18:54 +0000)]
ARM: simplify and extend byval handling

The main issue being fixed here is that APCS targets handling a "byval align N"
parameter with N > 4 were miscounting what objects were where on the stack,
leading to FrameLowering setting the frame pointer incorrectly and clobbering
the stack.

But byval handling had grown over many years, and had multiple layers of cruft
trying to compensate for each other and calculate padding correctly. This only
really needs to be done once, in the HandleByVal function. Elsewhere should
just do what it's told by that call.

I also stripped out unnecessary APCS/AAPCS distinctions (now that Clang emits
byvals with the correct C ABI alignment), which simplified HandleByVal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231959 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Add missing headers.
Frederic Riss [Wed, 11 Mar 2015 18:46:01 +0000 (18:46 +0000)]
[dsymutil] Add missing headers.

No build failure, found by code inspection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231958 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Gather function ranges during DIE selection.
Frederic Riss [Wed, 11 Mar 2015 18:45:59 +0000 (18:45 +0000)]
[dsymutil] Gather function ranges during DIE selection.

Gather the function ranges [low_pc, high_pc) during DIE selection and
store them along with the offset to apply to them to get the linked

This is just the data collection part, it comes with no tests. That
information will be used in multiple followup commits to perform the
relocation of line tables and range sections among other things, and
these commits will add tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231957 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Small clang-format patch.
Frederic Riss [Wed, 11 Mar 2015 18:45:57 +0000 (18:45 +0000)]
[dsymutil] Small clang-format patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231956 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Correctly clone address attributes.
Frederic Riss [Wed, 11 Mar 2015 18:45:52 +0000 (18:45 +0000)]
[dsymutil] Correctly clone address attributes.

DW_AT_low_pc on functions is taken care of by the relocation processing, but
DW_AT_high_pc and DW_AT_low_pc on other lexical scopes need special handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231955 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the need to cache the subtarget in the R600 TargetRegisterInfo
Eric Christopher [Wed, 11 Mar 2015 18:43:21 +0000 (18:43 +0000)]
Remove the need to cache the subtarget in the R600 TargetRegisterInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231954 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHave getRegPressureSetLimit take a MachineFunction so that a
Eric Christopher [Wed, 11 Mar 2015 18:34:58 +0000 (18:34 +0000)]
Have getRegPressureSetLimit take a MachineFunction so that a
we can inspect the subtarget and function when computing values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231951 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Don't fold call bitcast into args if callee is byval
David Majnemer [Wed, 11 Mar 2015 18:03:05 +0000 (18:03 +0000)]
InstCombine: Don't fold call bitcast into args if callee is byval

This fixes a bug reported here:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231948 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdated with list of possible improvements we are tracking internally
Kit Barton [Wed, 11 Mar 2015 17:43:43 +0000 (17:43 +0000)]
Updated with list of possible improvements we are tracking internally

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231946 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd the "vbroadcasti128" instruction back.
Juergen Ributzka [Wed, 11 Mar 2015 17:29:03 +0000 (17:29 +0000)]
Add the "vbroadcasti128" instruction back.

This is a follow-up to r231182. This adds the "vbroadcasti128" instruction
back, but without the intrinsic mapping. Also add a test to check the
instriction encoding.

This is related to rdar://problem/18742778.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231945 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake NaCl's use of .init_array for static constructors match Linux
Derek Schuff [Wed, 11 Mar 2015 16:16:09 +0000 (16:16 +0000)]
Make NaCl's use of .init_array for static constructors match Linux

The generic ELF TargetObjectFile defaults to .ctors, but Linux's
defaults to .init_array by calling InitializeELF with the value of
UseInitArray from TargetMachine. Make NaCl's behavior match.

Reviewers: jvoung
Differential Revision: http://reviews.llvm.org/D8240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231934 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWrap in __MINGW32__ to avoid warnings from msvc.
Benjamin Kramer [Wed, 11 Mar 2015 16:09:02 +0000 (16:09 +0000)]
Wrap in __MINGW32__ to avoid warnings from msvc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231933 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd missing namespace specifier for MSVC.
Benjamin Kramer [Wed, 11 Mar 2015 15:53:24 +0000 (15:53 +0000)]
Add missing namespace specifier for MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231930 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRtlCaptureContext is absent from the mingw32 headers, provide a prototype.
Benjamin Kramer [Wed, 11 Mar 2015 15:41:15 +0000 (15:41 +0000)]
RtlCaptureContext is absent from the mingw32 headers, provide a prototype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231929 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInliner should not add callgraph edges for intrinsic calls (PR22857)
Sanjay Patel [Wed, 11 Mar 2015 15:12:32 +0000 (15:12 +0000)]
Inliner should not add callgraph edges for intrinsic calls (PR22857)

The CallGraphNode function "addCalledFunction()" asserts that edges are not to intrinsics.

This patch makes sure that the Inliner does not add such an edge to the callgraph.

Fix for clang crash by assertion: https://llvm.org/bugs/show_bug.cgi?id=22857

Differential Revision: http://reviews.llvm.org/D8231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231927 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[CMake] Don't pass in MSVC warning flags as definitions"
Greg Bedwell [Wed, 11 Mar 2015 14:57:48 +0000 (14:57 +0000)]
Revert "[CMake] Don't pass in MSVC warning flags as definitions"

reverting while I investigate why it broke the sanitizer-windows build.
This reverts commit r231924.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231925 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Don't pass in MSVC warning flags as definitions
Greg Bedwell [Wed, 11 Mar 2015 14:26:29 +0000 (14:26 +0000)]
[CMake] Don't pass in MSVC warning flags as definitions

NFC currently but required as a prerequisite for using
the Microsoft resource compiler in conjunction with
CMake's ninja generator, which knows how to filter flags
appropriately, but not definitions.

Differential Revision: http://reviews.llvm.org/D8188

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231924 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPrefer pipes over temporary files in a feeble attempt to stabilize this test on windows.
Benjamin Kramer [Wed, 11 Mar 2015 13:55:41 +0000 (13:55 +0000)]
Prefer pipes over temporary files in a feeble attempt to stabilize this test on windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231923 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix too short title underline reported by build-bot.
Dan Liew [Wed, 11 Mar 2015 13:34:49 +0000 (13:34 +0000)]
Fix too short title underline reported by build-bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231921 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRelax CHECK to match mips syntax.
Rafael Espindola [Wed, 11 Mar 2015 12:48:24 +0000 (12:48 +0000)]
Relax CHECK to match mips syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231919 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Added SKX forms of shift instructions.
Elena Demikhovsky [Wed, 11 Mar 2015 10:25:42 +0000 (10:25 +0000)]
AVX-512: Added SKX forms of shift instructions.
Added rotation instructions, encoding only.
Added encoding tests for all these forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231916 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNow that r231902's test is executed, make it actually pass
Justin Bogner [Wed, 11 Mar 2015 08:17:25 +0000 (08:17 +0000)]
Now that r231902's test is executed, make it actually pass

As of r231908, the test I added in r231902 actually gets run - but I'd
checked in a stale version of the input so it didn't pass. Fix the
input and un-xfail the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231911 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix another verifier crash where a GC intrinsic would look at the internals of anothe...
Owen Anderson [Wed, 11 Mar 2015 06:57:30 +0000 (06:57 +0000)]
Fix another verifier crash where a GC intrinsic would look at the internals of another intrinsic in order to verify itself.

This causes a crash if the referenced intrinsic was malformed.  In this case, we
would already have reported an error on the referenced intrinsic, but then
crashed on the second one when it tried to introspect the first without
error checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231910 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake test added in r231902 actually be executed.
Daniel Jasper [Wed, 11 Mar 2015 06:44:51 +0000 (06:44 +0000)]
Make test added in r231902 actually be executed.

There were also errors in the CHECK line which I fixed and the test
doesn't actually pass as the "100" is in the wrong line. Not sure
whether this is a test failure or a coverage failure so making the test
XFAIL for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231908 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't print labels that on ELF are never used.
Rafael Espindola [Wed, 11 Mar 2015 04:20:31 +0000 (04:20 +0000)]
Don't print labels that on ELF are never used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231904 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstrProf: Teach llvm-cov to handle universal binaries when given -arch
Justin Bogner [Wed, 11 Mar 2015 02:30:51 +0000 (02:30 +0000)]
InstrProf: Teach llvm-cov to handle universal binaries when given -arch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231902 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRelax label CHECK to mach COFF syntax.
Rafael Espindola [Wed, 11 Mar 2015 01:08:32 +0000 (01:08 +0000)]
Relax label CHECK to mach COFF syntax.

Should fix the cygwin bots.

I added a cygwin specific test that would have caught this on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231899 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPrint section start labels when first switching to the section.
Rafael Espindola [Wed, 11 Mar 2015 00:51:37 +0000 (00:51 +0000)]
Print section start labels when first switching to the section.

This is less brittle and avoids polluting the start of the file with every
debug section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231898 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][MCJIT][RuntimeDyld] Re-apply r231726 and r231724 with fix suggested by
Lang Hames [Wed, 11 Mar 2015 00:43:26 +0000 (00:43 +0000)]
[Orc][MCJIT][RuntimeDyld] Re-apply r231726 and r231724 with fix suggested by
Dave Blaikie. Thanks Dave!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231896 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a grammar issue I introduced.
Chandler Carruth [Wed, 11 Mar 2015 00:19:01 +0000 (00:19 +0000)]
Fix a grammar issue I introduced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231894 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInspired by r231891, use gender neutral pronouns in the places I've
Chandler Carruth [Wed, 11 Mar 2015 00:15:44 +0000 (00:15 +0000)]
Inspired by r231891, use gender neutral pronouns in the places I've
found in LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231893 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix Value dangling reference debug output
Andrew Kaylor [Tue, 10 Mar 2015 23:55:38 +0000 (23:55 +0000)]
Fix Value dangling reference debug output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231889 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHave TargetRegisterInfo::getLargestLegalSuperClass take a
Eric Christopher [Tue, 10 Mar 2015 23:46:01 +0000 (23:46 +0000)]
Have TargetRegisterInfo::getLargestLegalSuperClass take a
MachineFunction argument so that it can look up the subtarget
rather than using a cached one in some Targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231888 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove subtarget dependence from HexagonRegisterInfo.
Eric Christopher [Tue, 10 Mar 2015 23:45:55 +0000 (23:45 +0000)]
Remove subtarget dependence from HexagonRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231887 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSplit test in two to handle building without x86.
Rafael Espindola [Tue, 10 Mar 2015 23:44:12 +0000 (23:44 +0000)]
Split test in two to handle building without x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231886 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove dead code.
Eric Christopher [Tue, 10 Mar 2015 23:22:04 +0000 (23:22 +0000)]
Remove dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231883 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd missing section symbol to COFF's .debug_types.dwo.
Rafael Espindola [Tue, 10 Mar 2015 23:06:32 +0000 (23:06 +0000)]
Add missing section symbol to COFF's .debug_types.dwo.

Should bring the cygwin bots back.

I added a triple to the test that was failing so that it would have failed
on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231882 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIf a conditional branch jumps to the same target, remove the condition
Philip Reames [Tue, 10 Mar 2015 22:52:37 +0000 (22:52 +0000)]
If a conditional branch jumps to the same target, remove the condition

Given that large parts of inst combine is restricted to instructions which have one use, getting rid of a use on the condition can help the effectiveness of the optimizer. Also, it allows the condition to potentially be deleted by instcombine rather than waiting for another pass.

I noticed this completely by accident in another test case. It's not anything that actually came from a real workload.

p.s. We should probably do the same thing for switch instructions.

Differential Revision: http://reviews.llvm.org/D8220

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231881 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEmit correct linkage-name attribute based on DWARF version.
Paul Robinson [Tue, 10 Mar 2015 22:44:45 +0000 (22:44 +0000)]
Emit correct linkage-name attribute based on DWARF version.

There are still 4 tests that check for DW_AT_MIPS_linkage_name,
because they specify DWARF 2 or 3 in the module metadata. So, I didn't
create an explicit version-based test for the attribute.

Differential Revision: http://reviews.llvm.org/D8227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231880 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInfer known bits from dominating conditions
Philip Reames [Tue, 10 Mar 2015 22:43:20 +0000 (22:43 +0000)]
Infer known bits from dominating conditions

This patch adds limited support in ValueTracking for inferring known bits of a value from conditional expressions which must be true to reach the instruction we're trying to optimize. At this time, the feature is off by default. Once landed, I'm hoping for feedback from others on both profitability and compile time impact.

Forms of conditional value propagation have been tried in LLVM before and have failed due to compile time problems.  In an attempt to side step that, this patch only considers conditions where the edge leaving the branch dominates the context instruction. It does not attempt full dataflow.  Even with that restriction, it handles many interesting cases:
 * Early exits from functions
 * Early exits from loops (for context instructions in the loop and after the check)
 * Conditions which control entry into loops, including multi-version loops (such as those produced during vectorization, IRCE, loop unswitch, etc..)

Possible applications include optimizing using information provided by constructs such as: preconditions, assumptions, null checks, & range checks.

This patch implements two approaches to the problem that need further benchmarking.  Approach 1 is to directly walk the dominator tree looking for interesting conditions.  Approach 2 is to inspect other uses of the value being queried for interesting comparisons.  From initial benchmarking, it appears that Approach 2 is faster than Approach 1, but this needs to be further validated.

Differential Revision: http://reviews.llvm.org/D7708

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231879 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the use of the subtarget in MCCodeEmitter creation and
Eric Christopher [Tue, 10 Mar 2015 22:03:14 +0000 (22:03 +0000)]
Remove the use of the subtarget in MCCodeEmitter creation and
update all ports accordingly. Required a couple of small rewrites
in handling subtarget features during creation in PPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231861 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCreate symbols marking the start of a section earlier.
Rafael Espindola [Tue, 10 Mar 2015 22:00:25 +0000 (22:00 +0000)]
Create symbols marking the start of a section earlier.

This lets us pass the symbol to the constructor and avoid the mutable field.

This also opens the way for outputting the symbol only when needed, instead
of outputting them at the start of the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231859 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove createAMDGPUMCCodeEmitter and instead just register the correct
Eric Christopher [Tue, 10 Mar 2015 21:57:34 +0000 (21:57 +0000)]
Remove createAMDGPUMCCodeEmitter and instead just register the correct
MCCodeEmitter creation routine based on TargetMachine since the only
64-bit R600 gpus are part of the GCN target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231856 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrepare] Refine the cost model provided by the promotion helper.
Quentin Colombet [Tue, 10 Mar 2015 21:48:15 +0000 (21:48 +0000)]
[CodeGenPrepare] Refine the cost model provided by the promotion helper.
- Use TargetLowering to check for the actual cost of each extension.
- Provide a factorized method to check for the cost of an extension:
- Provide a virtual method TargetLowering::isExtFreeImpl for targets to be able
  to tune the cost of non-free extensions.

This refactoring offers a better granularity to model what really happens on
different targets.

No performance changes and very few code differences.

Part of <rdar://problem/19267165>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231855 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopAccesses] Add debug message to indicate the result of the analysis
Adam Nemet [Tue, 10 Mar 2015 21:47:39 +0000 (21:47 +0000)]
[LoopAccesses] Add debug message to indicate the result of the analysis

The debug message was pretty confusing here.  It only reported the
situation with memchecks without the result of the dependence analysis.

Now it prints whether the loop is safe from the POV of the dependence
analysis and if yes, whether we need memchecks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231854 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove a non-trivial virtual function out of line.
Rafael Espindola [Tue, 10 Mar 2015 21:35:16 +0000 (21:35 +0000)]
Move a non-trivial virtual function out of line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231853 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding frame index + add load/store patterns.
Colin LeMahieu [Tue, 10 Mar 2015 21:24:13 +0000 (21:24 +0000)]
[Hexagon] Adding frame index + add load/store patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231850 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoclang-format code that is about to change.
Rafael Espindola [Tue, 10 Mar 2015 21:16:18 +0000 (21:16 +0000)]
clang-format code that is about to change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231848 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Simplifying deallocret definitions.
Colin LeMahieu [Tue, 10 Mar 2015 21:12:32 +0000 (21:12 +0000)]
[Hexagon] Simplifying deallocret definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231847 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoclang-format these declarations. NFC.
Rafael Espindola [Tue, 10 Mar 2015 21:05:09 +0000 (21:05 +0000)]
clang-format these declarations. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231846 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't repeat names in comments. NFC.
Rafael Espindola [Tue, 10 Mar 2015 21:01:50 +0000 (21:01 +0000)]
Don't repeat names in comments. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231845 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Separating InstHexagon from OpcodeHexagon.
Colin LeMahieu [Tue, 10 Mar 2015 20:56:22 +0000 (20:56 +0000)]
[Hexagon] Separating InstHexagon from OpcodeHexagon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231844 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd support for part-word atomics for PPC
Nemanja Ivanovic [Tue, 10 Mar 2015 20:51:07 +0000 (20:51 +0000)]
Add support for part-word atomics for PPC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231843 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd new LLVM_OPTIMIZED_TABLEGEN build setting which configures, builds and uses a...
Chris Bieneman [Tue, 10 Mar 2015 20:48:02 +0000 (20:48 +0000)]
Add new LLVM_OPTIMIZED_TABLEGEN build setting which configures, builds and uses a release tablegen build when LLVM is configured with assertions enabled.

Summary: This change leverages the cross-compiling functionality in the build system to build a release tablegen executable for use during the build.

Reviewers: resistor, rnk

Reviewed By: rnk

Subscribers: rnk, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D7349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231842 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Avoid going through GPRs for across-vector instructions.
Ahmed Bougacha [Tue, 10 Mar 2015 20:45:38 +0000 (20:45 +0000)]
[AArch64] Avoid going through GPRs for across-vector instructions.

This adds new node types for each intrinsic.
For instance, for addv, we have AArch64ISD::UADDV, such that:
  (v4i32 (uaddv ...))
is the same as
  (v4i32 (scalar_to_vector (i32 (int_aarch64_neon_uaddv ...))))
that is,
  (v4i32 (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)),
           (i32 (int_aarch64_neon_uaddv ...)), ssub)

In a combine, we transform all such across-vector-lanes intrinsics to:

  (i32 (extract_vector_elt (uaddv ...), 0))

This has one big advantage: by making the extract_element explicit, we
enable the existing patterns for lane-aware instructions to fire.
This lets us avoid needlessly going through the GPRs.  Consider:

    uint32x4_t test_mul(uint32x4_t a, uint32x4_t b) {
        return vmulq_n_u32(a, vaddvq_u32(b));

We now generate:
    addv.4s  s1, v1
    mul.4s   v0, v0, v1[0]
instead of the previous:
    addv.4s  s1, v1
    fmov     w8, s1
    dup.4s   v1, w8
    mul.4s   v0, v1, v0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231840 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Remove integer INSvi*lane patterns. NFCI.
Ahmed Bougacha [Tue, 10 Mar 2015 20:37:19 +0000 (20:37 +0000)]
[AArch64] Remove integer INSvi*lane patterns.  NFCI.

Most are redundant, and they never seem to fire.

The V128 integer patterns already exist in the INS multiclass.
The duplicates only fire when the vector index type isn't i64,
because they accept "imm" instead of an explicit "i64", as the
instruction definition patterns do.

TLI::getVectorIdxTy is i64 on AArch64, so this should never happen.
Also, one of them had a typo: for i64, INSvi32lane was used.
I noticed because I mistakenly used an explicit i32 as the idx type,
and got ins.s for an i64 vector_insert.

The V64 patterns also don't seem to ever fire, as V64 vector
extract/insert are legalized to V128.

The equivalent float patterns are unique and useful, so keep them.

No functional change intended;  none exhibited on the LIT and LNT tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231838 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't evaluate rend() on every iteration of the loop.
Chad Rosier [Tue, 10 Mar 2015 20:29:59 +0000 (20:29 +0000)]
Don't evaluate rend() on every iteration of the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231837 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLoopAccessAnalysis: Silence -Wreturn-type diagnostic from GCC
David Majnemer [Tue, 10 Mar 2015 20:23:29 +0000 (20:23 +0000)]
LoopAccessAnalysis: Silence -Wreturn-type diagnostic from GCC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231836 91177308-0d34-0410-b5e6-96231b3b80d8