oota-llvm.git
6 years ago[PGO] Implement ValueProfiling Closure interfaces for runtime value profile data
Xinliang David Li [Wed, 25 Nov 2015 23:31:18 +0000 (23:31 +0000)]
[PGO] Implement ValueProfiling Closure interfaces for runtime value profile data

This is one of the many steps to commonize value profiling support between profile
runtime and compiler/llvm tools.

After this change, profiler runtime now can share the same C APIs to do VP
serialization/deseriazation with LLVM host tools (and produces value data
in identical format between indexed and raw profile).

It is not yet enabled in profiler runtime yet.

Also added a unit test case to test runtime profile data serialization/deserialization
interfaces implemented using common closure code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254110 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[safestack] Fix alignment of dynamic allocas.
Evgeniy Stepanov [Wed, 25 Nov 2015 22:52:30 +0000 (22:52 +0000)]
[safestack] Fix alignment of dynamic allocas.

Fixes PR25588.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254109 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix a use-after-free in `llvm-config`.
Richard Diamond [Wed, 25 Nov 2015 22:49:48 +0000 (22:49 +0000)]
Fix a use-after-free in `llvm-config`.

Summary:
This could happen if `GetComponentNames` is true, because `Name` from
`VisitComponent` would reference a stack instance of `std::string` in
`ComputeLibsForComponents`.

Reviewers: beanz

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254108 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix inline asm support for i64 operands.
Dan Gohman [Wed, 25 Nov 2015 22:28:50 +0000 (22:28 +0000)]
[WebAssembly] Fix inline asm support for i64 operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254106 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fold setne and seteq comparisons into selects.
Dan Gohman [Wed, 25 Nov 2015 22:13:48 +0000 (22:13 +0000)]
[WebAssembly] Fold setne and seteq comparisons into selects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254104 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[libFuzzer] add a flag -exact_artifact_path
Kostya Serebryany [Wed, 25 Nov 2015 21:40:46 +0000 (21:40 +0000)]
[libFuzzer] add a flag -exact_artifact_path

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254100 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Treat transfers of FP immediates are pseudo instructions
Krzysztof Parzyszek [Wed, 25 Nov 2015 21:40:03 +0000 (21:40 +0000)]
[Hexagon] Treat transfers of FP immediates are pseudo instructions

This is a temporary fix to address ICE on 2005-10-21-longlonggtu.ll.
The proper fix will be to use A2_tfrsi, but it will need more work to
teach all users of A2_tfrsi to also expect a floating-point operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254099 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add some comments. NFC.
Dan Gohman [Wed, 25 Nov 2015 21:32:06 +0000 (21:32 +0000)]
[WebAssembly] Add some comments. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254096 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/SI: select S_ABS_I32 when possible (v2)
Marek Olsak [Wed, 25 Nov 2015 21:22:45 +0000 (21:22 +0000)]
AMDGPU/SI: select S_ABS_I32 when possible (v2)

v2: added more tests, moved the SALU->VALU conversion to a separate function

It looks like it's not possible to get subregisters in the S_ABS lowering
code, and I don't feel like guessing without testing what the correct code
would look like.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254095 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix WebAssembly register numbering for registers added late.
Dan Gohman [Wed, 25 Nov 2015 21:13:02 +0000 (21:13 +0000)]
[WebAssembly] Fix WebAssembly register numbering for registers added late.

If virtual registers are created late, mappings to WebAssembly
registers need to be added explicitly. This patch adds a function
to do so and teaches WebAssemblyPeephole to use it. This fixes
an out-of-bounds access on the WARegs vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254094 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SCCP] More informative message if we don't know how to handle a terminator.
Davide Italiano [Wed, 25 Nov 2015 21:03:36 +0000 (21:03 +0000)]
[SCCP] More informative message if we don't know how to handle a terminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254093 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Check feature attributes in SIMachineFunctionInfo
Matt Arsenault [Wed, 25 Nov 2015 20:55:12 +0000 (20:55 +0000)]
AMDGPU: Check feature attributes in SIMachineFunctionInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254091 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd hexagonv55 and hexagonv60 as recognized CPUs, make v60 the default
Krzysztof Parzyszek [Wed, 25 Nov 2015 20:30:59 +0000 (20:30 +0000)]
Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the default

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254089 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Add some tests for promotion of v2i64 scalar_to_vector
Matt Arsenault [Wed, 25 Nov 2015 20:01:03 +0000 (20:01 +0000)]
AMDGPU: Add some tests for promotion of v2i64 scalar_to_vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254087 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Make v2i64/v2f64 legal types.
Matt Arsenault [Wed, 25 Nov 2015 19:58:34 +0000 (19:58 +0000)]
AMDGPU: Make v2i64/v2f64 legal types.

They can be loaded and stored, so count them as legal. This is
mostly to fix a number of common cases for load/store merging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254086 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoExpose isXxxConstant() functions from SelectionDAGNodes.h (NFC)
Artyom Skrobov [Wed, 25 Nov 2015 19:41:11 +0000 (19:41 +0000)]
Expose isXxxConstant() functions from SelectionDAGNodes.h (NFC)

Summary:
Many target lowerings copy-paste the code to test SDValues for known constants.
This code can instead be shared in SelectionDAG.cpp, and reused in the targets.

Reviewers: MatzeB, andreadb, tstellarAMD

Subscribers: arsenm, jyknight, llvm-commits

Differential Revision: http://reviews.llvm.org/D14945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254085 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Use a physical register to describe ARGUMENT liveness.
Dan Gohman [Wed, 25 Nov 2015 19:36:19 +0000 (19:36 +0000)]
[WebAssembly] Use a physical register to describe ARGUMENT liveness.

Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254084 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Regroup functions in better order (NFC)
Xinliang David Li [Wed, 25 Nov 2015 19:13:00 +0000 (19:13 +0000)]
[PGO] Regroup functions in better order (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254080 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Clean up several FIXME comments.
Dan Gohman [Wed, 25 Nov 2015 18:13:18 +0000 (18:13 +0000)]
[WebAssembly] Clean up several FIXME comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254079 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Make several tests more strict.
Dan Gohman [Wed, 25 Nov 2015 17:33:15 +0000 (17:33 +0000)]
[WebAssembly] Make several tests more strict.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254077 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Support for register stackifying with load and store instructions.
Dan Gohman [Wed, 25 Nov 2015 16:55:01 +0000 (16:55 +0000)]
[WebAssembly] Support for register stackifying with load and store instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254076 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Codegen support for ISD::ExternalSymbol
Dan Gohman [Wed, 25 Nov 2015 16:44:29 +0000 (16:44 +0000)]
[WebAssembly] Codegen support for ISD::ExternalSymbol

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254075 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add 'final' to some classes. NFC.
Dan Gohman [Wed, 25 Nov 2015 16:29:24 +0000 (16:29 +0000)]
[WebAssembly] Add 'final' to some classes. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254073 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Whitespace consistency. NFC.
Dan Gohman [Wed, 25 Nov 2015 16:26:14 +0000 (16:26 +0000)]
[WebAssembly] Whitespace consistency. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254071 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agofix typo; NFC
Sanjay Patel [Wed, 25 Nov 2015 15:33:36 +0000 (15:33 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254069 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Don't generate mfocrf on the e500mc
Hal Finkel [Wed, 25 Nov 2015 10:14:31 +0000 (10:14 +0000)]
[PowerPC] Don't generate mfocrf on the e500mc

The e500mc does not actually support the mfocrf instruction; update the
processor definitions to reflect that fact.

Patch by Tom Rix (with some test-case cleanup by me).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254064 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAccept any stack offset, including none, here.
Eric Christopher [Wed, 25 Nov 2015 09:21:36 +0000 (09:21 +0000)]
Accept any stack offset, including none, here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254062 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix some places where we were assuming that memory type had been legalized
Eric Christopher [Wed, 25 Nov 2015 09:11:53 +0000 (09:11 +0000)]
Fix some places where we were assuming that memory type had been legalized
to a simple type when lowering a truncating store of a vector type. In this
case for an EVT we'll return Expand as we should in all of the cases anyhow.

The testcase triggered at the one in VectorLegalizer::LegalizeOp, inspection
found the rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254061 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] Regenerate Splat OptSize tests
Simon Pilgrim [Wed, 25 Nov 2015 09:06:17 +0000 (09:06 +0000)]
[X86][AVX] Regenerate Splat OptSize tests

Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254060 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX-512: Fixed a bug in VPERMT2* intrinsic.
Elena Demikhovsky [Wed, 25 Nov 2015 08:17:56 +0000 (08:17 +0000)]
AVX-512: Fixed a bug in VPERMT2* intrinsic.

It was wrong order of operands (from intrinsic to DAG node).
I added more strict type specification for instruction selection.

Differential Revision: http://reviews.llvm.org/D14942

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254059 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Convert InstrProfRecord based serialization methods to use common C methods
Xinliang David Li [Wed, 25 Nov 2015 06:23:38 +0000 (06:23 +0000)]
[PGO] Convert InstrProfRecord based serialization methods to use common C methods

1. Convert serialization methods using InstrProfRecord as source into C (impl)
   interfaces using Closure.
2. Reimplement InstrProfRecord serialization method to use new C interface
   as dummy wrapper.

Now it is ready to implement wrapper for runtime value profile data.

(The new code need better source location -- but not changed in this patch to
 minimize diffs. )

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254057 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] convert a subset of C++ interfaces into C (for sharing) (NFC)
Xinliang David Li [Wed, 25 Nov 2015 04:29:24 +0000 (04:29 +0000)]
[PGO] convert a subset of C++ interfaces into C (for sharing) (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254056 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMove member functions closer to others of the same class (NFC)
Xinliang David Li [Wed, 25 Nov 2015 03:24:37 +0000 (03:24 +0000)]
Move member functions closer to others of the same class (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254055 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAsmParser: Make the code for parsing unnamed aliases more closely resemble that for...
Peter Collingbourne [Wed, 25 Nov 2015 02:54:07 +0000 (02:54 +0000)]
AsmParser: Make the code for parsing unnamed aliases more closely resemble that for unnamed globals.

This fixes parsing of forward references to unnamed aliases.

While here, remove an unnecessary isa check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254054 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd missing documentation. (NFC)
Xinliang David Li [Wed, 25 Nov 2015 01:13:44 +0000 (01:13 +0000)]
Add missing documentation. (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254051 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDoxygen: Use mathjax to create formulas.
Matthias Braun [Wed, 25 Nov 2015 00:50:47 +0000 (00:50 +0000)]
Doxygen: Use mathjax to create formulas.

The main motivation is to not require a latex installation when building
the documentation. I would also expect a better image quality and the
ability to copy&paste from formulas with a javascript based solution for
displaying the math.

Differential Revision: http://reviews.llvm.org/D14960

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254048 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[OperandBundles] Extract duplicated code into a helper function, NFC
Sanjoy Das [Wed, 25 Nov 2015 00:42:24 +0000 (00:42 +0000)]
[OperandBundles] Extract duplicated code into a helper function, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254047 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Don't drop operand bundles
Sanjoy Das [Wed, 25 Nov 2015 00:42:19 +0000 (00:42 +0000)]
[InstCombine] Don't drop operand bundles

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254046 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix function naming (NFC)
Xinliang David Li [Wed, 25 Nov 2015 00:08:49 +0000 (00:08 +0000)]
Fix function naming (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254045 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r253528: "[X86] Enable shrink-wrapping by default."
Hans Wennborg [Wed, 25 Nov 2015 00:05:13 +0000 (00:05 +0000)]
Revert r253528: "[X86] Enable shrink-wrapping by default."

This caused PR25607 and also caused Chromium to crash on start-up.

(Also had to update test/CodeGen/X86/avx-splat.ll, which was committed
after shrink wrapping was enabled.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254044 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix an asan error where NumElements > 32 for at least one case in
Kaelyn Takata [Wed, 25 Nov 2015 00:03:29 +0000 (00:03 +0000)]
Fix an asan error where NumElements > 32 for at least one case in
test/CodeGen/X86/avg.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254043 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r254021
Rong Xu [Tue, 24 Nov 2015 23:57:51 +0000 (23:57 +0000)]
Revert r254021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254042 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Revert revision r254021,r254028,r254035
Rong Xu [Tue, 24 Nov 2015 23:49:08 +0000 (23:49 +0000)]
[PGO] Revert revision r254021,r254028,r254035

Revert the above revision due to multiple issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254040 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Add mapper callback to interfaces retrieving value data for site (NFC)
Xinliang David Li [Tue, 24 Nov 2015 23:36:52 +0000 (23:36 +0000)]
[PGO] Add mapper callback to interfaces retrieving value data for site (NFC)

This allows cleaner implementation and merging retrieving/mapping in
one pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254038 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Add option to limit importing based on instruction count
Teresa Johnson [Tue, 24 Nov 2015 22:55:46 +0000 (22:55 +0000)]
[ThinLTO] Add option to limit importing based on instruction count

Add a simple initial heuristic to control importing based on the number
of instructions recorded in the function's summary. Add option to
control the limit, and test using option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254036 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Relax test cases in PGO instrumentation
Rong Xu [Tue, 24 Nov 2015 22:50:34 +0000 (22:50 +0000)]
[PGO] Relax test cases in PGO instrumentation

Fix buildbot failure for clang-x86_64-linux-selfhost-modules.
http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/8866
The failing test cases are newly added from r254021. It seems the IR has a
different order in this platform. In this patch, I temporarily relax the test
case to make the build green. I'll have a complete fix (more robust way to test)
soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254035 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSamplePGO - Add test for hot/cold inlined functions.
Diego Novillo [Tue, 24 Nov 2015 22:38:37 +0000 (22:38 +0000)]
SamplePGO - Add test for hot/cold inlined functions.

When the original binary is executed and sampled, the resulting profile
contains information on the original inline stack. We currently follow
the original inline plan if we notice that the inlined callsite has more
than 0 samples to it.

A better way is to determine whether the callsite is actually worth
inlining. If the callsite accumulates a small fraction of the samples
spent in the parent function, then we don't want to bother inlining it
(as it means that the callsite is actually cold).

This patch introduces a threshold expressed in percentage of samples
in relation to the parent function.  If the callsite uses less than N%
of the total samples used by its parent, the original inline decision is
not re-applied.

I've set the threshold to the very arbitrary value of 5%. I'm yet to do
any actual experiments to see what's a good value. I wanted to separate
the basic mechanism from the tuning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254034 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Regenerate PMUL tests
Simon Pilgrim [Tue, 24 Nov 2015 22:09:31 +0000 (22:09 +0000)]
[X86][SSE] Regenerate PMUL tests

Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254029 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Fix build errors in x86_64-darwin
Rong Xu [Tue, 24 Nov 2015 21:55:50 +0000 (21:55 +0000)]
[PGO] Fix build errors in x86_64-darwin

Fix buildbot failure for x86_64-darwin due to r254021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254028 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[msan] Relax origin-alignment test.
Evgeniy Stepanov [Tue, 24 Nov 2015 21:44:16 +0000 (21:44 +0000)]
[msan] Relax origin-alignment test.

Change origin-alignment test to test only the alignment of the origin
store, and not the exact instruction sequence used to compute the
address. This makes the test less fragile and, in particular, lets it
pass both with the old and new MSan ABIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254027 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] MST based PGO instrumentation infrastructure
Rong Xu [Tue, 24 Nov 2015 21:31:25 +0000 (21:31 +0000)]
[PGO] MST based PGO instrumentation infrastructure

This patch implements a minimum spanning tree (MST) based instrumentation for
PGO. The use of MST guarantees minimum number of CFG edges getting
instrumented. An addition optimization is to instrument the less executed
edges to further reduce the instrumentation overhead. The patch contains both the
instrumentation and the use of the profile to set the branch weights.

Differential Revision: http://reviews.llvm.org/D12781

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254021 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Refactor function body scan during importing into helper (NFC)
Teresa Johnson [Tue, 24 Nov 2015 21:15:19 +0000 (21:15 +0000)]
[ThinLTO] Refactor function body scan during importing into helper (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254020 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix sphinx-build error when building documentation.
Xinliang David Li [Tue, 24 Nov 2015 20:48:25 +0000 (20:48 +0000)]
Fix sphinx-build error when building documentation.

Consolidate the description of -binary/-text option description
to avoid duplicate ID error by sphinux-build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254018 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RuntimeDyld] Fix a class of arithmetic errors introduced in r253918
Sanjoy Das [Tue, 24 Nov 2015 20:37:01 +0000 (20:37 +0000)]
[RuntimeDyld] Fix a class of arithmetic errors introduced in r253918

r253918 had refactored expressions like "A - B.Address + C" to "A -
B.getAddressWithOffset(C)".  This is incorrect, since the latter really
computes "A - B.Address - C".

None of the tests I can run locally on x86 broke due to this bug, but it
is the current suspect for breakage on the AArch64 buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254017 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][FMA] Optimize FNEG(FMA) Patterns
Simon Pilgrim [Tue, 24 Nov 2015 20:31:46 +0000 (20:31 +0000)]
[X86][FMA] Optimize FNEG(FMA) Patterns

X86 needs to use its own FMA opcodes, preventing the standard FNEG(FMA) pattern table recognition method used by other platforms. This patch adds support for lowering FNEG(FMA(X,Y,Z)) into a single suitably negated FMA instruction.

Fix for PR24364

Differential Revision: http://reviews.llvm.org/D14906

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254016 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLiveVariables should not clobber MachineOperand::IsDead, ::IsKill on reserved physica...
Matthias Braun [Tue, 24 Nov 2015 20:06:56 +0000 (20:06 +0000)]
LiveVariables should not clobber MachineOperand::IsDead, ::IsKill on reserved physical registers

Patch by Nick Johnson <Nicholas.Paul.Johnson@deshawresearch.com>

Differential Revision: http://reviews.llvm.org/D14875

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254012 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Enable iterative importing in FunctionImport pass
Teresa Johnson [Tue, 24 Nov 2015 19:55:04 +0000 (19:55 +0000)]
[ThinLTO] Enable iterative importing in FunctionImport pass

Analyze imported function bodies and add any new external calls to
the worklist for importing. Currently no controls on the importing
so this will end up importing everything possible in the call tree
below the importing module. Basic profitability checks coming next.

Update test to check for iteratively inlined functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254011 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Fix several issues related to X86's psadbw instruction.
Cong Hou [Tue, 24 Nov 2015 19:51:26 +0000 (19:51 +0000)]
[X86] Fix several issues related to X86's psadbw instruction.

This patch fixes the following issues:

1. Fix the return type of X86psadbw: it should not be the same type of inputs.
   For vNi8 inputs the output should be vMi64, where M = N/8.
2. Fix the return type of int_x86_avx512_psad_bw_512 accordingly.
3. Fix the definiton of PSADBW, VPSADBW, and VPSADBWY accordingly.
4. Adjust the return type when building a DAG node of X86ISD::PSADBW type.
5. Update related tests.

Differential revision: http://reviews.llvm.org/D14897

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254010 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Handle previously imported and promoted locals in module linker
Teresa Johnson [Tue, 24 Nov 2015 19:46:58 +0000 (19:46 +0000)]
[ThinLTO] Handle previously imported and promoted locals in module linker

The new function import pass exposed an issue when we import references
to local values on multiple importing passes. They are renamed on each
import pass, and we need to ensure that the already promoted and renamed
references existing in the dest module are correctly identified and
updated so that they aren't spuriously renamed again (due to a perceived
conflict with the newly linked reference).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254009 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Introduce value profile data closure type.
Xinliang David Li [Tue, 24 Nov 2015 19:21:15 +0000 (19:21 +0000)]
[PGO] Introduce value profile data closure type.

The closure is designed to abstact away two types of value profile
data:
  - InstrProfRecord which is the primary data structure used to
    represent profile data in host tools (reader, writer, and profile-use)
  - value profile runtime data structure suitable to be used by C
    runtime library.
Both sources of data need to serialize to disk/memory-buffer in common
format: ValueProfData.

The abstraction allows compiler-rt's raw profiler writer to share
the same code with indexed profile writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254008 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Utils] Put includes in correct order. NFC.
Weiming Zhao [Tue, 24 Nov 2015 18:57:06 +0000 (18:57 +0000)]
[Utils] Put includes in correct order. NFC.

Summary:
    Followed the guidelines in:
    http://llvm.org/docs/CodingStandards.html#include-style

    However, I noticed that uppercase named headers come before lowercase ones
    throughout the codebase. So kept them as is.

    Patch by Mandeep Singh Grang <mgrang@codeaurora.org>

Reviewers: majnemer, davide, jmolloy, atrick

Subscribers: sanjoy

Differential Revision: http://reviews.llvm.org/D14939

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254005 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Small interface change to be profile rt ready
Xinliang David Li [Tue, 24 Nov 2015 18:15:46 +0000 (18:15 +0000)]
[PGO] Small interface change to be profile rt ready

Convert two C++ static member functions to be C APIs. This
is one of the many steps to get ready to share VP writer code
with profiler runtime.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253999 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] fix propagation of fast-math-flags
Sanjay Patel [Tue, 24 Nov 2015 17:51:20 +0000 (17:51 +0000)]
[InstCombine] fix propagation of fast-math-flags

Noticed while working on D4583:
http://reviews.llvm.org/D4583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253997 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agouse convenience function for copying IR flags; NFCI
Sanjay Patel [Tue, 24 Nov 2015 17:16:33 +0000 (17:16 +0000)]
use convenience function for copying IR flags; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253996 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMinor refactor to make VP writing more efficient
Xinliang David Li [Tue, 24 Nov 2015 17:03:24 +0000 (17:03 +0000)]
Minor refactor to make VP writing more efficient

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253994 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMake this test a bit more strict.
Rafael Espindola [Tue, 24 Nov 2015 16:43:53 +0000 (16:43 +0000)]
Make this test a bit more strict.

It now tests with files in both orders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253993 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd vector types for intrinsics
Krzysztof Parzyszek [Tue, 24 Nov 2015 16:28:14 +0000 (16:28 +0000)]
Add vector types for intrinsics

Author: Ron Lieberman <ronl@codeaurora.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253992 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Fix FunctionImport alias checking and test
Teresa Johnson [Tue, 24 Nov 2015 16:10:43 +0000 (16:10 +0000)]
[ThinLTO] Fix FunctionImport alias checking and test

Skip imports for weak_any aliases as well. Fix the test to check
non-import of weak aliases and functions, and import of normal alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253991 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd names for the new vector types in CodeGenTarget.cpp
Krzysztof Parzyszek [Tue, 24 Nov 2015 15:50:22 +0000 (15:50 +0000)]
Add names for the new vector types in CodeGenTarget.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253989 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] remove duplicate movq instruction defs (PR25554)
Sanjay Patel [Tue, 24 Nov 2015 15:44:35 +0000 (15:44 +0000)]
[x86] remove duplicate movq instruction defs (PR25554)

We had duplicated definitions for the same hardware '[v]movq' instructions. For example with SSE:

  def MOVZQI2PQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
                     "mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only
                     [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 (scalar_to_vector GR64:$src)))))],
                     IIC_SSE_MOVDQ>;

  def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
                     "mov{d|q}\t{$src, $dst|$dst, $src}",
                     [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))],
                     IIC_SSE_MOVDQ>, Sched<[WriteMove]>;

As shown in the test case and PR25554:
https://llvm.org/bugs/show_bug.cgi?id=25554

This causes us to miss reusing an operand because later passes don't know these 'movq' are the same instruction.
This patch deletes one pair of these defs.
Sadly, this won't fix the original test case in the bug report. Something else is still broken.

Differential Revision: http://reviews.llvm.org/D14941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253988 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Add missing include of <cctype>
Krzysztof Parzyszek [Tue, 24 Nov 2015 15:11:13 +0000 (15:11 +0000)]
[Hexagon] Add missing include of <cctype>

Lack thereof breaks Windows builds due to the use of std::isspace
in HexagonInstrInfo.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253987 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Bring HexagonInstrInfo up to date
Krzysztof Parzyszek [Tue, 24 Nov 2015 14:55:26 +0000 (14:55 +0000)]
[Hexagon] Bring HexagonInstrInfo up to date

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253986 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd an already passing test.
Rafael Espindola [Tue, 24 Nov 2015 14:15:50 +0000 (14:15 +0000)]
Add an already passing test.

This tests that a declaration can resolve to an alias.

I broke this locally while prototyping a change and it looks like a nice
test to have.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253984 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd new vector types for 512-, 1024- and 2048-bit vectors
Krzysztof Parzyszek [Tue, 24 Nov 2015 13:07:35 +0000 (13:07 +0000)]
Add new vector types for 512-, 1024- and 2048-bit vectors

Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253978 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Split LDS vector loads
Matt Arsenault [Tue, 24 Nov 2015 12:18:54 +0000 (12:18 +0000)]
AMDGPU: Split LDS vector loads

If properly aligned this could allow using ds_read_b64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253975 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Split x8 and x16 vector loads instead of scalarize
Matt Arsenault [Tue, 24 Nov 2015 12:05:03 +0000 (12:05 +0000)]
AMDGPU: Split x8 and x16 vector loads instead of scalarize

The one regression in the builtin tests is in the read2 test which now
(again) has many extra copies, but this should be solved once the pass
is replaced with a DAG combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253974 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix build after r253954
Ismail Donmez [Tue, 24 Nov 2015 09:48:09 +0000 (09:48 +0000)]
Fix build after r253954

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253969 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix non-PIC build after 253959
Pavel Labath [Tue, 24 Nov 2015 09:46:01 +0000 (09:46 +0000)]
Fix non-PIC build after 253959

CMAKE_EXE_LINKER_FLAGS is a string. Appending a flag using list(APPEND) introduces an extra
semicolon which breaks stuff. Change this to append the value in the same way that everyone else
seems to be doing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253968 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLet SelectionDAG start to use probability-based interface to add successors.
Cong Hou [Tue, 24 Nov 2015 08:51:23 +0000 (08:51 +0000)]
Let SelectionDAG start to use probability-based interface to add successors.

The patch in http://reviews.llvm.org/D13745 is broken into four parts:

1. New interfaces without functional changes.
2. Use new interfaces in SelectionDAG, while in other passes treat probabilities
as weights.
3. Use new interfaces in all other passes.
4. Remove old interfaces.

This the second patch above. In this patch SelectionDAG starts to use
probability-based interfaces in MBB to add successors but other MC passes are
still using weight-based interfaces. Therefore, we need to maintain correct
weight list in MBB even when probability-based interfaces are used. This is
done by updating weight list in probability-based interfaces by treating the
numerator of probabilities as weights. This change affects many test cases
that check successor weight values. I will update those test cases once this
patch looks good to you.

Differential revision: http://reviews.llvm.org/D14361

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253965 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Use std::remove_if instead of manually coded loops that call erase multipl...
Craig Topper [Tue, 24 Nov 2015 08:20:47 +0000 (08:20 +0000)]
[TableGen] Use std::remove_if instead of manually coded loops that call erase multiple times. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253964 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Use the other version of EnforceVectorEltTypeIs inside the TypeSet version...
Craig Topper [Tue, 24 Nov 2015 08:20:45 +0000 (08:20 +0000)]
[TableGen] Use the other version of EnforceVectorEltTypeIs inside the TypeSet version of EnforceVectorEltTypeIs to reduce duplicated code. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253963 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Fix formatting and use logical OR. NFC
Craig Topper [Tue, 24 Nov 2015 08:20:44 +0000 (08:20 +0000)]
[TableGen] Fix formatting and use logical OR. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253962 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Use std::set_intersection to merge TypeSets. NFC
Craig Topper [Tue, 24 Nov 2015 08:20:42 +0000 (08:20 +0000)]
[TableGen] Use std::set_intersection to merge TypeSets. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253961 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Use SmallVector::assign instead of a resize and replace element.
Craig Topper [Tue, 24 Nov 2015 08:20:41 +0000 (08:20 +0000)]
[TableGen] Use SmallVector::assign instead of a resize and replace element.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253960 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CMake] When disabling PIC, also pass -fno-pie when linking if it is supported.
Chris Bieneman [Tue, 24 Nov 2015 08:04:59 +0000 (08:04 +0000)]
[CMake] When disabling PIC, also pass -fno-pie when linking if it is supported.

Building clang with -fno-pie generates slightly faster code. In my not-very-rigorous testing I saw about a 4% speed up using the clang test-suite sources.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253959 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert change that accidentally snuck into r253955.
Craig Topper [Tue, 24 Nov 2015 06:24:06 +0000 (06:24 +0000)]
Revert change that accidentally snuck into r253955.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253956 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Use array_pod_sort. NFC
Craig Topper [Tue, 24 Nov 2015 06:22:43 +0000 (06:22 +0000)]
[TableGen] Use array_pod_sort. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253955 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd a FunctionImporter helper to perform summary-based cross-module function importing
Mehdi Amini [Tue, 24 Nov 2015 06:07:49 +0000 (06:07 +0000)]
Add a FunctionImporter helper to perform summary-based cross-module function importing

Summary:
This is a helper to perform cross-module import for ThinLTO. Right now
it is importing naively every possible called functions.

Reviewers: tejohnson

Subscribers: dexonsmith, llvm-commits

Differential Revision: http://reviews.llvm.org/D14914

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253954 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd findFunctionInfoList() accessor to FunctionInfoIndex.
Mehdi Amini [Tue, 24 Nov 2015 06:07:42 +0000 (06:07 +0000)]
Add findFunctionInfoList() accessor to FunctionInfoIndex.

Summary:
This allows to query for a function in the map without creating an
entry, allowing to use a const FunctionInfoIndex.

Reviewers: tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14912

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253953 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.
Cong Hou [Tue, 24 Nov 2015 05:44:19 +0000 (05:44 +0000)]
[X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.

This patch detects the AVG pattern in vectorized code, which is simply
c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of
either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to
i32 before any arithmetic operations. The following IR shows such an example:

%1 = zext <N x i8> %a to <N x i32>
%2 = zext <N x i8> %b to <N x i32>
%3 = add nuw nsw <N x i32> %1, <i32 1 x N>
%4 = add nuw nsw <N x i32> %3, %2
%5 = lshr <N x i32> %N, <i32 1 x N>
%6 = trunc <N x i32> %5 to <N x i8>

and with this patch it will be converted to a X86ISD::AVG instruction.

The pattern recognition is done when combining instructions just before type
legalization during instruction selection. We do it here because after type
legalization, it is much more difficult to do pattern recognition based
on many instructions that are doing type conversions. Therefore, for
target-specific instructions (like X86ISD::AVG), we need to take care of type
legalization by ourselves. However, as X86ISD::AVG behaves similarly to
ISD::ADD, I am wondering if there is a way to legalize operands and result
types of X86ISD::AVG together with ISD::ADD. It seems that the current design
doesn't support this idea.

Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of
variant vector sizes.

Differential revision: http://reviews.llvm.org/D14761

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253952 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DIE] Make DIE.h NDEBUG conditional-free.
Davide Italiano [Tue, 24 Nov 2015 02:21:43 +0000 (02:21 +0000)]
[DIE] Make DIE.h NDEBUG conditional-free.

Switch dump()/print() method definitions to LLVM_DUMP_METHOD instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253945 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CMake] export_executable_symbols also needs to add -rdynamic to the linker flags...
Chris Bieneman [Tue, 24 Nov 2015 00:58:58 +0000 (00:58 +0000)]
[CMake] export_executable_symbols also needs to add -rdynamic to the linker flags on Darwin

Without -rdynamic LLVM built with LTO fails to pass "check" due to loadable modules failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253944 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse make_unique [NFC]
Xinliang David Li [Tue, 24 Nov 2015 00:32:00 +0000 (00:32 +0000)]
Use make_unique [NFC]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253942 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove trailing space in comments
Xinliang David Li [Tue, 24 Nov 2015 00:31:41 +0000 (00:31 +0000)]
Remove trailing space in comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253941 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agominimize test case but still show the bug
Sanjay Patel [Tue, 24 Nov 2015 00:11:48 +0000 (00:11 +0000)]
minimize test case but still show the bug

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253940 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoNFC. Fixing my consistently incorrect spelling.
Chris Bieneman [Mon, 23 Nov 2015 23:34:09 +0000 (23:34 +0000)]
NFC. Fixing my consistently incorrect spelling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253936 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoadded comment (using freshly updated update_llc_test_checks.py)
Sanjay Patel [Mon, 23 Nov 2015 23:22:05 +0000 (23:22 +0000)]
added comment (using freshly updated update_llc_test_checks.py)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253935 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] add test to show suboptimal codegen (PR25554)
Sanjay Patel [Mon, 23 Nov 2015 23:18:20 +0000 (23:18 +0000)]
[x86] add test to show suboptimal codegen (PR25554)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253934 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RuntimeDyld] Avoid unused-private-field warning; NFC
Sanjoy Das [Mon, 23 Nov 2015 22:59:36 +0000 (22:59 +0000)]
[RuntimeDyld] Avoid unused-private-field warning; NFC

Fixes the no asserts -Werror,-Wunused-private-field build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253933 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Don't print the types of memory_size and grow_memory
Dan Gohman [Mon, 23 Nov 2015 22:37:29 +0000 (22:37 +0000)]
[WebAssembly] Don't print the types of memory_size and grow_memory

This matches the current spec, for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253931 91177308-0d34-0410-b5e6-96231b3b80d8