7 years agoI Added a triple flag for x86-evenDirective test.
Michael Zuckerman [Sun, 13 Dec 2015 21:12:33 +0000 (21:12 +0000)]
I Added a triple flag for x86-evenDirective test.

Continue of rL255461

Differential Revision: http://reviews.llvm.org/D15413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255469 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r255460, which still causes test failures on some platforms.
Cong Hou [Sun, 13 Dec 2015 17:15:38 +0000 (17:15 +0000)]
Revert r255460, which still causes test failures on some platforms.

Further investigation on the failures is ongoing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255463 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][inline asm] support even directive
Michael Zuckerman [Sun, 13 Dec 2015 17:07:23 +0000 (17:07 +0000)]
[X86][inline asm] support even directive

The .even directive aligns content to an evan-numbered address.

In at&t syntax .even
In Microsoft syntax even (without the dot).

Differential Revision: http://reviews.llvm.org/D15413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255462 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a type issue in r255455. Should not use unsigned type as std::abs()'s template...
Cong Hou [Sun, 13 Dec 2015 17:00:25 +0000 (17:00 +0000)]
Fix a type issue in r255455. Should not use unsigned type as std::abs()'s template type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255461 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVectorizer] Refine loop vectorizer's register usage calculator by ignoring speci...
Cong Hou [Sun, 13 Dec 2015 16:55:46 +0000 (16:55 +0000)]
[LoopVectorizer] Refine loop vectorizer's register usage calculator by ignoring specific instructions.

(This is the second attempt to check in this patch: REQUIRES: asserts is added
to reg-usage.ll now.)

LoopVectorizationCostModel::calculateRegisterUsage() is used to estimate the
register usage for specific VFs. However, it takes into account many
instructions that won't be vectorized, such as induction variables,
GetElementPtr instruction, etc.. This makes the loop vectorizer too conservative
when choosing VF. In this patch, the induction variables that won't be
vectorized plus GetElementPtr instruction will be added to ValuesToIgnore set
so that their register usage won't be considered any more.

Differential revision: http://reviews.llvm.org/D15177

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255460 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix line endings
Simon Pilgrim [Sun, 13 Dec 2015 12:49:48 +0000 (12:49 +0000)]
Fix line endings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255459 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReplace <cstdint> by llvm/Support/DataTypes.h for the typedef of uint64_t. NFC.
Cong Hou [Sun, 13 Dec 2015 09:52:14 +0000 (09:52 +0000)]
Replace <cstdint> by llvm/Support/DataTypes.h for the typedef of uint64_t. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255458 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd the missing header file <cstdint> needed by uint64_t
Cong Hou [Sun, 13 Dec 2015 09:32:21 +0000 (09:32 +0000)]
Add the missing header file <cstdint> needed by uint64_t

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255457 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r255454 as it leads to several test failers on buildbots.
Cong Hou [Sun, 13 Dec 2015 09:28:57 +0000 (09:28 +0000)]
Revert r255454 as it leads to several test failers on buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255456 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNormalize MBB's successors' probabilities in several locations.
Cong Hou [Sun, 13 Dec 2015 09:26:17 +0000 (09:26 +0000)]
Normalize MBB's successors' probabilities in several locations.

This patch adds some missing calls to MBB::normalizeSuccProbs() in several
locations where it should be called. Those places are found by checking if the
sum of successors' probabilities is approximate one in MachineBlockPlacement
pass with some instrumented code (not in this patch).

Differential revision: http://reviews.llvm.org/D15259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255455 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVectorizer] Refine loop vectorizer's register usage calculator by ignoring speci...
Cong Hou [Sun, 13 Dec 2015 08:44:08 +0000 (08:44 +0000)]
[LoopVectorizer] Refine loop vectorizer's register usage calculator by ignoring specific instructions.

LoopVectorizationCostModel::calculateRegisterUsage() is used to estimate the
register usage for specific VFs. However, it takes into account many
instructions that won't be vectorized, such as induction variables,
GetElementPtr instruction, etc.. This makes the loop vectorizer too conservative
when choosing VF. In this patch, the induction variables that won't be
vectorized plus GetElementPtr instruction will be added to ValuesToIgnore set
so that their register usage won't be considered any more.

Differential revision: http://reviews.llvm.org/D15177

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255454 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: only emit EABI attributes on EABI targets
Saleem Abdulrasool [Sun, 13 Dec 2015 05:27:45 +0000 (05:27 +0000)]
ARM: only emit EABI attributes on EABI targets

EABI attributes should only be emitted on EABI targets.  This prevents the
emission of the optimization goals EABI attribute on Windows ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255448 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r255444.
Nico Weber [Sun, 13 Dec 2015 04:14:39 +0000 (04:14 +0000)]
Revert r255444.

It doesn't build on Windows and broke the Windows LLD and LLDB bots:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255446 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a C++11 ThreadPool implementation in LLVM
Mehdi Amini [Sat, 12 Dec 2015 22:55:25 +0000 (22:55 +0000)]
Add a C++11 ThreadPool implementation in LLVM

This is a very simple implementation of a thread pool using C++11
thread. It accepts any std::function<void()> for asynchronous
execution. Individual task can be synchronize using the returned
future, or the client can block on the full queue completion.

In case LLVM is configured with Threading disabled, it falls back
to sequential execution using std::async with launch:deferred.

This is intended to support parallelism for ThinLTO processing in
linker plugin, but is generic enough for any other uses.

Differential Revision: http://reviews.llvm.org/D15464

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255444 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-objdump/MachoDump] Simplify.
Davide Italiano [Sat, 12 Dec 2015 21:50:11 +0000 (21:50 +0000)]
[llvm-objdump/MachoDump] Simplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255443 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Added support for VMOVQ shuffle comments
Simon Pilgrim [Sat, 12 Dec 2015 21:46:23 +0000 (21:46 +0000)]
[X86][AVX512] Added support for VMOVQ shuffle comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255442 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPartially fix memcpy / memset / memmove lowering in SelectionDAG construction if...
Manuel Jacob [Sat, 12 Dec 2015 21:33:31 +0000 (21:33 +0000)]
Partially fix memcpy / memset / memmove lowering in SelectionDAG construction if address space != 0.

Previously SelectionDAGBuilder asserted that the pointer operands of
memcpy / memset / memmove intrinsics are in address space < 256.  This assert
implicitly assumed the X86 backend, where all address spaces < 256 are
equivalent to address space 0 from the code generator's point of view.  On some
targets (R600 and NVPTX) several address spaces < 256 have a target-defined
meaning, so this assert made little sense for these targets.

This patch removes this wrong assertion and adds extra checks before lowering
these intrinsics to library calls.  If a pointer operand can't be casted to
address space 0 without changing semantics, a fatal error is reported to the

The new behavior should be valid for all targets that give address spaces != 0
a target-specified meaning (NVPTX, R600, X86).  NVPTX lowers big or
variable-sized memory intrinsics before SelectionDAG construction.  All other
memory intrinsics are inlined (the threshold is set very high for this target).
R600 doesn't support memcpy / memset / memmove library calls (previously the
illegal emission of a call to such library function triggered an error
somewhere in the code generator).  X86 now emits inline loads and stores for
address spaces 256 and 257 up to the same threshold that is used for address
space 0 and reports a fatal error otherwise.

I call this a "partial fix" because there are still cases that can't be
lowered.  A fatal error is reported in these cases.

Reviewers: arsenm, theraven, compnerd, hfinkel

Subscribers: hfinkel, llvm-commits, alex

Differential Revision: http://reviews.llvm.org/D7241

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255441 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PGO] Stop using invalid char in instr variable names.
Xinliang David Li [Sat, 12 Dec 2015 17:28:03 +0000 (17:28 +0000)]
[PGO] Stop using invalid char in instr variable names.

Before the patch, -fprofile-instr-generate compile will fail
if no integrated-as is specified when the file contains
any static functions (the -S output is also invalid).

This is the second try. The fix in this patch is very localized.
Only profile symbol names of profile symbols with internal
linkage are fixed up while initializer of name syms are not
changes. This means there is no format change nor version bump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255434 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] canonicalize (bitcast (extractelement X)) --> (extractelement(bitcast X))
Sanjay Patel [Sat, 12 Dec 2015 16:44:48 +0000 (16:44 +0000)]
[InstCombine] canonicalize (bitcast (extractelement X)) --> (extractelement(bitcast X))

This change was discussed in D15392. It allows us to remove the fold that was added

...and it will allow us to generalize this fold:

while preserving the order of bitcast + extract that it produces and testing shows
is better handled by the backend.

Note that the existing check for "isVectorTy()" wasn't strong enough in general
and specifically because: x86_mmx. It's not a vector, but it's not vectorizable
either. So here we check VectorType::isValidElementType() directly before
proceeding with the transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255433 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Tests tidyup
Simon Pilgrim [Sat, 12 Dec 2015 12:52:52 +0000 (12:52 +0000)]
[X86][AVX] Tests tidyup

Cleanup/regenerate some tests for some upcoming patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255432 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to appease sphinx
David Majnemer [Sat, 12 Dec 2015 06:56:02 +0000 (06:56 +0000)]
Try to appease sphinx

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255429 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove catchpad-phi-cast.ll to the X86 specific subdirectory
David Majnemer [Sat, 12 Dec 2015 06:21:08 +0000 (06:21 +0000)]
Move catchpad-phi-cast.ll to the X86 specific subdirectory

It is X86 specific and will not be properly exercised unless LLVM is
built with the X86 target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255426 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to appease a buildbot
David Majnemer [Sat, 12 Dec 2015 05:53:20 +0000 (05:53 +0000)]
Try to appease a buildbot

The builder complains thusly:
error C2027: use of undefined type 'llvm::raw_ostream'

Try to make it happy by including raw_ostream.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255425 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IR] Reformulate LLVM's EH funclet IR
David Majnemer [Sat, 12 Dec 2015 05:38:55 +0000 (05:38 +0000)]
[IR] Reformulate LLVM's EH funclet IR

While we have successfully implemented a funclet-oriented EH scheme on
top of LLVM IR, our scheme has some notable deficiencies:
- catchendpad and cleanupendpad are necessary in the current design
  but they are difficult to explain to others, even to seasoned LLVM
- catchendpad and cleanupendpad are optimization barriers.  They cannot
  be split and force all potentially throwing call-sites to be invokes.
  This has a noticable effect on the quality of our code generation.
- catchpad, while similar in some aspects to invoke, is fairly awkward.
  It is unsplittable, starts a funclet, and has control flow to other
- The nesting relationship between funclets is currently a property of
  control flow edges.  Because of this, we are forced to carefully
  analyze the flow graph to see if there might potentially exist illegal
  nesting among funclets.  While we have logic to clone funclets when
  they are illegally nested, it would be nicer if we had a
  representation which forbade them upfront.

Let's clean this up a bit by doing the following:
- Instead, make catchpad more like cleanuppad and landingpad: no control
  flow, just a bunch of simple operands;  catchpad would be splittable.
- Introduce catchswitch, a control flow instruction designed to model
  the constraints of funclet oriented EH.
- Make funclet scoping explicit by having funclet instructions consume
  the token produced by the funclet which contains them.
- Remove catchendpad and cleanupendpad.  Their presence can be inferred
  implicitly using coloring information.

N.B.  The state numbering code for the CLR has been updated but the
veracity of it's output cannot be spoken for.  An expert should take a
look to make sure the results are reasonable.

Reviewers: rnk, JosephTremoulet, andrew.w.kaylor

Differential Revision: http://reviews.llvm.org/D15139

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255422 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] OutStreamer cleanup in PPCAsmPrinter
Hal Finkel [Sat, 12 Dec 2015 01:47:08 +0000 (01:47 +0000)]
[PowerPC] OutStreamer cleanup in PPCAsmPrinter

We don't need to pass OutStreamer as a parameter to LowerSTACKMAP and
LowerPATCHPOINT. It is a member variable of PPCAsmPrinter, and thus, is already
available. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255418 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86ISelLowering] Add additional support for multiplication-to-shift conversion.
Chen Li [Sat, 12 Dec 2015 01:04:15 +0000 (01:04 +0000)]
[X86ISelLowering] Add additional support for multiplication-to-shift conversion.

Summary: This patch adds support of conversion (mul x, 2^N + 1) => (add (shl x, N), x) and (mul x, 2^N - 1) => (sub (shl x, N), x) if the multiplication can not be converted to LEA + SHL or LEA + LEA. LLVM has already supported this on ARM, and it should also be useful on X86. Note the patch currently only applies to cases where the constant operand is positive, and I am planing to add another patch to support negative cases after this.

Reviewers: craig.topper, RKSimon

Subscribers: aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D14603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255415 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix test/CodeGen/PowerPC/ppc-shrink-wrapping.ll after r255398
Hal Finkel [Sat, 12 Dec 2015 00:42:05 +0000 (00:42 +0000)]
Fix test/CodeGen/PowerPC/ppc-shrink-wrapping.ll after r255398

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255414 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] allow any pair of bitcasts to be combined
Sanjay Patel [Sat, 12 Dec 2015 00:33:36 +0000 (00:33 +0000)]
[InstCombine] allow any pair of bitcasts to be combined

This change is discussed in D15392 and should allow us to effectively
if we canonicalize bitcasts ahead of extracts.

It should be safe to convert any pair of bitcasts into a single bitcast,
however, it was mentioned here:
that we're not allowed to bitcast from an x86_mmx to some other types, but I'm
not seeing any failures from that, and we have regression tests in CodeGen/X86
that appear to cover all of those cases.

Some day we'll get to remove that MMX wart from LLVM IR completely?

Differential Revision: http://reviews.llvm.org/D15468

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255399 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Add Branch Hints for Highly-Biased Branches
Hal Finkel [Sat, 12 Dec 2015 00:32:00 +0000 (00:32 +0000)]
[PowerPC] Add Branch Hints for Highly-Biased Branches

This branch adds hints for highly biased branches on the PPC architecture. Even
in absence of profiling information, LLVM will mark code reaching unreachable
terminators and other exceptional control flow constructs as highly unlikely to
be reached.

Patch by Tom Jablin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255398 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Update test expectations
Derek Schuff [Sat, 12 Dec 2015 00:18:40 +0000 (00:18 +0000)]
[WebAssembly] Update test expectations

Many tests are now passing due to eliminateFrameIndex implementation and
the list needs to be re-triaged because it unblocks other failures, and
some previous failures are different. However I'm about to churn it more
by implementing more lowering, so will wait on that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255396 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert rL255391: [X86ISelLowering] Add additional support for multiplication-to-shift...
Chen Li [Sat, 12 Dec 2015 00:08:37 +0000 (00:08 +0000)]
Revert rL255391: [X86ISelLowering] Add additional support for multiplication-to-shift conversion.
because it broke buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255395 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse FileCheck for better checking
Sanjay Patel [Sat, 12 Dec 2015 00:01:10 +0000 (00:01 +0000)]
use FileCheck for better checking

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255394 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Implement prolog/epilog insertion and FrameIndex elimination
Derek Schuff [Fri, 11 Dec 2015 23:49:46 +0000 (23:49 +0000)]
[WebAssembly]  Implement prolog/epilog insertion and FrameIndex elimination

Use the SP32 physical register as the base for FrameIndex
lowering. Update it and the __stack_pointer global var in the prolog and
epilog. Extend the mapping of virtual registers to wasm locals to
include the physical registers.

Rather than modify the target-independent PrologEpilogInserter (which
asserts that there are no virtual registers left) include a
slightly-modified copy for Wasm that does not have this assertion and
only clears the virtual registers if scavenging was needed (which of
course it isn't for wasm).

Differential Revision: http://reviews.llvm.org/D15344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255392 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86ISelLowering] Add additional support for multiplication-to-shift conversion.
Chen Li [Fri, 11 Dec 2015 23:39:32 +0000 (23:39 +0000)]
[X86ISelLowering] Add additional support for multiplication-to-shift conversion.

Summary: This patch adds support of conversion (mul x, 2^N + 1) => (add (shl x, N), x) and (mul x, 2^N - 1) => (sub (shl x, N), x) if the multiplication can not be converted to LEA + SHL or LEA + LEA. LLVM has already supported this on ARM, and it should also be useful on X86. Note the patch currently only applies to cases where the constant operand is positive, and I am planing to add another patch to support negative cases after this.

Reviewers: craig.topper, RKSimon

Subscribers: aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D14603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255391 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSamplePGO - Reduce memory utilization by 10x.
Diego Novillo [Fri, 11 Dec 2015 23:21:38 +0000 (23:21 +0000)]
SamplePGO - Reduce memory utilization by 10x.

DenseMap is the wrong data structure to use for sample records and call
sites.  The keys are too large, causing massive core memory growth when
reading profiles.

Before this patch, a 21Mb input profile was causing the compiler to grow
to 3Gb in memory.  By switching to std::map, the compiler now grows to
300Mb in memory.

There still are some opportunities for memory footprint reduction. I'll
be looking at those next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255389 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSelectionDAG: Match min/max if the scalar operation is legal
Matt Arsenault [Fri, 11 Dec 2015 23:16:47 +0000 (23:16 +0000)]
SelectionDAG: Match min/max if the scalar operation is legal

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255388 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r248483, r242546, r242545, and r242409 - absdiff intrinsics
Hal Finkel [Fri, 11 Dec 2015 23:11:52 +0000 (23:11 +0000)]
Revert r248483, r242546, r242545, and r242409 - absdiff intrinsics

After much discussion, ending here:


it has been decided that, instead of having the vectorizer directly generate
special absdiff and horizontal-add intrinsics, we'll recognize the relevant
reduction patterns during CodeGen. Accordingly, these intrinsics are not needed
(the operations they represent can be pattern matched, as is already done in
some backends). Thus, we're backing these out in favor of the current
development work.

r248483 - Codegen: Fix llvm.*absdiff semantic.
r242546 - [ARM] Use [SU]ABSDIFF nodes instead of intrinsics for VABD/VABA
r242545 - [AArch64] Use [SU]ABSDIFF nodes instead of intrinsics for ABD/ABA
r242409 - [Codegen] Add intrinsics 'absdiff' and corresponding SDNodes for absolute difference operation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255387 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAvoid buffered reads of /dev/urandom
Rafael Espindola [Fri, 11 Dec 2015 22:52:32 +0000 (22:52 +0000)]
Avoid buffered reads of /dev/urandom

I am seeing disappointing clang performance on a large PowerPC64
Linux box. GetRandomNumberSeed() does a buffered read from
/dev/urandom to seed its PRNG. As a result we read an entire page
even though we only need 4 bytes.

With every clang task reading a page worth of /dev/urandom we
end up spending a large amount of time stuck on kernel spinlock.

Patch by Anton Blanchard!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255386 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-objdump/MachODump] Reduce code duplication.
Davide Italiano [Fri, 11 Dec 2015 22:27:59 +0000 (22:27 +0000)]
[llvm-objdump/MachODump] Reduce code duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255380 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd tests for bitcast-bitcast sequences for all scalar/vector permutations
Sanjay Patel [Fri, 11 Dec 2015 20:26:30 +0000 (20:26 +0000)]
Add tests for bitcast-bitcast sequences for all scalar/vector permutations

As noted in http://reviews.llvm.org/D15392 , we should be able to improve this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255370 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PGO] Revert r255365: solution incomplete, not handling lambda yet
Xinliang David Li [Fri, 11 Dec 2015 20:23:22 +0000 (20:23 +0000)]
[PGO] Revert r255365: solution incomplete, not handling lambda yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255369 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PGO] Stop using invalid char in instr variable names.
Xinliang David Li [Fri, 11 Dec 2015 19:53:19 +0000 (19:53 +0000)]
[PGO] Stop using invalid char in instr variable names.

Before the patch, -fprofile-instr-generate compile will fail
if no integrated-as is specified when the file contains
any static functions (the -S output is also invalid).

This patch fixed the issue. With the change, the index format
version will be bumped up by 1. Backward compatibility is
preserved with this change.

Differential Revision: http://reviews.llvm.org/D15243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: Redo analyzePhysRegs() and computeRegisterLiveness()
Matthias Braun [Fri, 11 Dec 2015 19:42:09 +0000 (19:42 +0000)]
CodeGen: Redo analyzePhysRegs() and computeRegisterLiveness()

computeRegisterLiveness() was broken in that it reported dead for a
register even if a subregister was alive. I assume this was because the
results of analayzePhysRegs() are hard to understand with respect to

This commit: Changes the results of analyzePhysRegs (=struct
PhysRegInfo) to be clearly understandable, also renames the fields to
avoid silent breakage of third-party code (and improve the grammar).

Fix all (two) users of computeRegisterLiveness() in llvm: By reenabling
it and removing workarounds for the bug.

This fixes http://llvm.org/PR24535 and http://llvm.org/PR25033

Differential Revision: http://reviews.llvm.org/D15320

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255362 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStart replacing vector_extract/vector_insert with extractelt/insertelt
Matt Arsenault [Fri, 11 Dec 2015 19:20:16 +0000 (19:20 +0000)]
Start replacing vector_extract/vector_insert with extractelt/insertelt

These are redundant pairs of nodes defined for
insertelement/extractelement are slightly closer to the corresponding
C++ node name, and has stricter type checking so prefer it.

Update targets to only use these nodes where it is trivial to do so.
AArch64, ARM, and Mips all have various type errors on simple replacement,
so they will need work to fix.

Example from AArch64:

def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
          (i32 (SMOVvi8to32 V128:$Rn, VectorIndexB:$idx))>;

Which is trying to do sext_inreg i8, i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255359 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Fix ADJCALLSTACKDOWN/UP use/defs
Derek Schuff [Fri, 11 Dec 2015 18:55:34 +0000 (18:55 +0000)]
[WebAssembly] Fix ADJCALLSTACKDOWN/UP use/defs

ADJCALLSTACK{DOWN,UP} (aka CALLSEQ_{START,END}) MIs are supposed to use
and def the stack pointer. Since they do not, all the nodes are being
eliminated by DeadMachineInstructionElim, so they aren't in the IR when
PrologEpilogInserter/eliminateCallFramePseudo needs them.

This change fixes that, but since RegStackify will not stackify across
them (and it runs early, before PEI), change LowerCall to only emit them
when the call frame size is > 0. That makes the current code work the
same way and makes code handled by D15344 also work the same way. We can
expand the condition beyond NumBytes > 0 in the future if needed.

Reviewers: sunfish, jfb

Subscribers: jfb, dschuff, llvm-commits

Differential Revision: http://reviews.llvm.org/D15459

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r255247, r255265, and r255286 due to serious compile-time regressions.
Chad Rosier [Fri, 11 Dec 2015 18:39:41 +0000 (18:39 +0000)]
Revert r255247, r255265, and r255286 due to serious compile-time regressions.

Revert "[DSE] Disable non-local DSE to see if the bots go green."
Revert "[DeadStoreElimination] Use range-based loops. NFC."
Revert "[DeadStoreElimination] Add support for non-local DSE."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCXX_FAST_TLS calling convention: target independent portion.
Manman Ren [Fri, 11 Dec 2015 18:24:30 +0000 (18:24 +0000)]
CXX_FAST_TLS calling convention: target independent portion.

The access function has a short entry and a short exit, the initialization
block is only run the first time. To improve the performance, we want to
have a short frame at the entry and exit.

We explicitly handle most of the CSRs via copies. Only the CSRs that are not
handled via copies will be in CSR_SaveList.

Frame lowering and prologue/epilogue insertion will generate a short frame
in the entry and exit according to CSR_SaveList. The majority of the CSRs will
be handled by register allcoator. Register allocator will try to spill and
reload them in the initialization block.

We add CSRsViaCopy, it will be explicitly handled during lowering.

1> we first set FunctionLoweringInfo->SplitCSR if conditions are met (the target
   supports it for the given calling convention and the function has only return
   exits). We also call TLI->initializeSplitCSR to perform initialization.
2> we call TLI->insertCopiesSplitCSR to insert copies from CSRsViaCopy to
   virtual registers at beginning of the entry block and copies from virtual
   registers to CSRsViaCopy at beginning of the exit blocks.
3> we also need to make sure the explicit copies will not be eliminated.


Differential Revision: http://reviews.llvm.org/D15340

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255353 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typos; NFC
Sanjay Patel [Fri, 11 Dec 2015 18:12:01 +0000 (18:12 +0000)]
fix typos; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255352 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Ignore absolute symbols in the debug map
Frederic Riss [Fri, 11 Dec 2015 17:50:37 +0000 (17:50 +0000)]
[dsymutil] Ignore absolute symbols in the debug map

Quoting from the comment added to the code:

    // Objective-C on i386 uses artificial absolute symbols to
    // perform some link time checks. Those symbols have a fixed 0
    // address that might conflict with real symbols in the object
    // file. As I cannot see a way for absolute symbols to find
    // their way into the debug information, let's just ignore those.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255350 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAlignmentFromAssumptions and SLPVectorizer preserves AA and GlobalsAA
Hal Finkel [Fri, 11 Dec 2015 17:46:01 +0000 (17:46 +0000)]
AlignmentFromAssumptions and SLPVectorizer preserves AA and GlobalsAA

GlobalsAA's assumptions that passes do not escape globals not previously
escaped is not violated by AlignmentFromAssumptions and SLPVectorizer. Marking
them as such allows GlobalsAA to be preserved until GVN in the LTO pipeline.


Patch by Vaivaswatha Nagaraj!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255348 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Correct Namespace lookup with AltNames in AsmWriterEmitter
Hal Finkel [Fri, 11 Dec 2015 17:31:27 +0000 (17:31 +0000)]
[TableGen] Correct Namespace lookup with AltNames in AsmWriterEmitter

AsmWriterEmitter will generate a getRegisterName function with an alternate
register name index as its second argument if the target makes use of them. The
enum of these values is generated in RegisterInfoEmitter. The getRegisterName
generator would assume the namespace could always be found by reading index 1
of the list of AltNameIndices, but this will fail if this list is sorted such
that the NoRegAltName is at index 1. Because this list is sorted by record name
(in CodeGenTarget::ReadRegAltNameIndices), you only run in to problems if your
MyTargetRegisterInfo.td defines a single RegAltNameIndex that sorts lexically
before NoRegAltName.

For example, if a target has something like

  def AnAltNameIndex : RegAltNameIndex

and defines RegAltNameIndices for some registers then, prior to this change,
AsmWriterEmitter would generate references to

  ::AnAltNameIndex and ::NoRegAltName

Patch by Alex Bradbury!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255344 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPruneEH pass incorrectly reports that a change was made
Artur Pilipenko [Fri, 11 Dec 2015 16:30:26 +0000 (16:30 +0000)]
PruneEH pass incorrectly reports that a change was made

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D14097

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255343 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Mem2Reg] Respect optnone
James Molloy [Fri, 11 Dec 2015 13:36:59 +0000 (13:36 +0000)]
[Mem2Reg] Respect optnone

Mem2Reg shouldn't be optimizing a function that is marked
optnone. There is a test checking this that fails when mem2reg is
explicitly added to the standard pass pipeline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255336 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Make MatchBSwap also match bit reversals
James Molloy [Fri, 11 Dec 2015 10:04:51 +0000 (10:04 +0000)]
[InstCombine] Make MatchBSwap also match bit reversals

MatchBSwap has most of the functionality to match bit reversals already. If we switch it from looking at bytes to individual bits and remove a few early exits, we can extend the main recursive function to match any sequence of ORs, ANDs and shifts that assemble a value from different parts of another, base value. Once we have this bit->bit mapping, we can very simply detect if it is appropriate for a bswap or bitreverse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert previous test commit.
Maxim Ostapenko [Fri, 11 Dec 2015 07:40:25 +0000 (07:40 +0000)]
Revert previous test commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis is a test commit to check my commit access works.
Maxim Ostapenko [Fri, 11 Dec 2015 07:31:29 +0000 (07:31 +0000)]
This is a test commit to check my commit access works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255330 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PGO] Read VP raw data without depending on the Value field
Xinliang David Li [Fri, 11 Dec 2015 06:53:53 +0000 (06:53 +0000)]
[PGO] Read VP raw data without depending on the Value field

Before this patch, each function's on-disk VP data is 'pointed'
to by the Value field of per-function ProfileData structue, and
read relies on this field (relocated with ValueDataDelta field)
to read the value data. However this means the Value field needs
to be updated during runtime before dumping, which creates undesirable
data races.

With this patch, the reading of VP data no longer depends on Value
field. There is no format change. ValueDataDelta header field becomes
obsolute but will be kept for compatibility reason (will be removed
next time the raw format change is needed).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255329 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build after r255319.
Hans Wennborg [Fri, 11 Dec 2015 00:58:32 +0000 (00:58 +0000)]
Fix build after r255319.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255322 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a spurious if.
Eric Christopher [Fri, 11 Dec 2015 00:51:59 +0000 (00:51 +0000)]
Fix a spurious if.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255321 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LazyValueInfo] Stop inserting overdefined values into ValueCache to
Akira Hatanaka [Fri, 11 Dec 2015 00:49:47 +0000 (00:49 +0000)]
[LazyValueInfo] Stop inserting overdefined values into ValueCache to
reduce memory usage.

Previously, LazyValueInfoCache inserted overdefined lattice values into
both ValueCache and OverDefinedCache. This wasn't necessary and was
causing LazyValueInfo to use an excessive amount of memory in some cases.

This patch changes LazyValueInfoCache to insert overdefined values only
into OverDefinedCache. The memory usage decreases by 70 to 75% when one
of the files in llvm is compiled.


Differential revision: http://reviews.llvm.org/D15391

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255320 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PPC]: Peephole optimize small accesss to aligned globals.
Kyle Butt [Fri, 11 Dec 2015 00:47:36 +0000 (00:47 +0000)]
[PPC]: Peephole optimize small accesss to aligned globals.

Access to aligned globals gives us a chance to peephole optimize nonzero
offsets. If a struct is 4 byte aligned, then accesses to bytes 0-3 won't
overflow the available displacement. For example:
        addis 3, 2, b4v@toc@ha
        addi 4, 3, b4v@toc@l
        lbz 5, b4v@toc@l(3) ; This is the result of the current peephole
        lbz 6, 1(4)         ; optimizer
        lbz 7, 2(4)
        lbz 8, 3(4)
If b4v is 4-byte aligned, we can skip using register 4 because we know
that b4v@toc@l+{1,2,3} won't overflow 32K, and instead generate:
        addis 3, 2, b4v@toc@ha
        lbz 4, b4v@toc@l(3)
        lbz 5, b4v@toc@l+1(3)
        lbz 6, b4v@toc@l+2(3)
        lbz 7, b4v@toc@l+3(3)
Saving a register and an addition.
Larger alignments allow larger structures/arrays to be optimized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255319 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCheck in the script for building Win snapshots
Hans Wennborg [Fri, 11 Dec 2015 00:43:42 +0000 (00:43 +0000)]
Check in the script for building Win snapshots

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255318 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ProfileData] clang-format TextInstrProfReader::hasFormat. NFC.
Vedant Kumar [Fri, 11 Dec 2015 00:40:05 +0000 (00:40 +0000)]
[ProfileData] clang-format TextInstrProfReader::hasFormat. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255317 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Update the cost table for integer-integer conversions on SSE2/SSE4.1.
Cong Hou [Fri, 11 Dec 2015 00:31:39 +0000 (00:31 +0000)]
[X86][SSE] Update the cost table for integer-integer conversions on SSE2/SSE4.1.

Previously in the conversion cost table there are no entries for integer-integer
conversions on SSE2. This will result in imprecise costs for certain vectorized
operations. This patch adds those entries for SSE2 and SSE4.1. The cost numbers
are counted from the result of running llc on the new test case in this patch.

Differential revision: http://reviews.llvm.org/D15132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255315 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFormat fix (NFC)
Xinliang David Li [Thu, 10 Dec 2015 23:48:05 +0000 (23:48 +0000)]
Format fix (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255313 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agos/need/needs
Eric Christopher [Thu, 10 Dec 2015 22:29:26 +0000 (22:29 +0000)]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255306 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix (bitcast (fabs x)), (bitcast (fneg x)) and (bitcast (fcopysign cst,
Eric Christopher [Thu, 10 Dec 2015 22:09:06 +0000 (22:09 +0000)]
Fix (bitcast (fabs x)), (bitcast (fneg x)) and (bitcast (fcopysign cst,
x)) combines for ppc_fp128, since signbit computation is more

Discussion thread:

Patch by Tim Shen!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255305 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAttempt to fix the ReST compilation to html of the C API docs.
Eric Christopher [Thu, 10 Dec 2015 22:04:11 +0000 (22:04 +0000)]
Attempt to fix the ReST compilation to html of the C API docs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255304 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMore non-ascii quote characters.
Eric Christopher [Thu, 10 Dec 2015 21:47:38 +0000 (21:47 +0000)]
More non-ascii quote characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255303 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoClarify some of the wording on adding a new subcomponent to the
Eric Christopher [Thu, 10 Dec 2015 21:46:24 +0000 (21:46 +0000)]
Clarify some of the wording on adding a new subcomponent to the

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255302 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix non-ascii quotes.
Eric Christopher [Thu, 10 Dec 2015 21:38:56 +0000 (21:38 +0000)]
Fix non-ascii quotes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255301 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd C API guidelines to the developer policy to match discussions
Eric Christopher [Thu, 10 Dec 2015 21:33:53 +0000 (21:33 +0000)]
Add C API guidelines to the developer policy to match discussions
on the llvm mailing lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255300 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPPC: Teach FMA mutate to respect register classes.
Kyle Butt [Thu, 10 Dec 2015 21:28:40 +0000 (21:28 +0000)]
PPC: Teach FMA mutate to respect register classes.

This was causing bad code gen and assembly that won't assemble, as
mixed altivec and vsx code would end up with a vsx high register
assigned to an altivec instruction, which won't work. Constraining the
classes allows the optimization to proceed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255299 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Add LLVM_BUILD_INSTRUMENTED option to enable building with -fprofile-instr...
Chris Bieneman [Thu, 10 Dec 2015 21:19:07 +0000 (21:19 +0000)]
[CMake] Add LLVM_BUILD_INSTRUMENTED option to enable building with -fprofile-instr-generate

This is the first step in supporting PGO data generation via CMake. I've marked the option as advanced and experimental until it is fleshed out further.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255298 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LibFuzzer] Introducing FUZZER_FLAG_UNSIGNED and using it for seeding.
Mike Aizatsky [Thu, 10 Dec 2015 20:41:53 +0000 (20:41 +0000)]
[LibFuzzer] Introducing FUZZER_FLAG_UNSIGNED and using it for seeding.

Differential Revision: http://reviews.llvm.org/D15339


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255296 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEarlyCSE: add tests
JF Bastien [Thu, 10 Dec 2015 20:24:34 +0000 (20:24 +0000)]
EarlyCSE: add tests

Summary: As a follow-up to rL255054 I wasn't able to convince myself that the code did what I thought, so I wrote more tests.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D15371

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255295 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a forward declaration (NFC)
Xinliang David Li [Thu, 10 Dec 2015 20:13:41 +0000 (20:13 +0000)]
Add a forward declaration (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255292 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDelete a duplicate branch in IfConversion.cpp. NFC.
Cong Hou [Thu, 10 Dec 2015 19:57:22 +0000 (19:57 +0000)]
Delete a duplicate branch in IfConversion.cpp. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255291 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Fix PR25763 - vector comparison constant folding + sign-extension
Simon Pilgrim [Thu, 10 Dec 2015 19:47:06 +0000 (19:47 +0000)]
[DAGCombiner] Fix PR25763 - vector comparison constant folding + sign-extension

PR25763 demonstrated an issue with D14683 - vector comparison constant folding only works for i1 results, so we need to split off the sign-extension of the result to the required type. Luckily this can be done with the existing type legalization code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255289 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DSE] Disable non-local DSE to see if the bots go green.
Chad Rosier [Thu, 10 Dec 2015 19:23:02 +0000 (19:23 +0000)]
[DSE] Disable non-local DSE to see if the bots go green.

I see a few bots timing out, so I'm speculatively disabling r255247.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255286 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix another case where the linkage was not set.
Rafael Espindola [Thu, 10 Dec 2015 18:44:26 +0000 (18:44 +0000)]
Fix another case where the linkage was not set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255272 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PGO] Use %t as the temporary profdata filename in the test cases.
Rong Xu [Thu, 10 Dec 2015 18:24:44 +0000 (18:24 +0000)]
[PGO] Use %t as the temporary profdata filename in the test cases.

Using %t rather %T/<specific_name> as the temporary profdata filename.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255271 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoVerifier: Avoid quadratic checking of aggregates for bad bitcasts
Duncan P. N. Exon Smith [Thu, 10 Dec 2015 17:56:06 +0000 (17:56 +0000)]
Verifier: Avoid quadratic checking of aggregates for bad bitcasts

Avoid O(N^2) behaviour when checking for bad bitcasts in `ConstantExpr`s
buried inside of aggregate initializers to `GlobalVariable`s.  I've:
- centralized the "visited" set for recursing through `ConstantExpr`s so
  that expressions are only visited once per Verifier run,
- removed the duplicate logic for the stack visit, and
- avoided recursing into other `GlobalValue`s.

This recovers roughly a 100x time difference in clang compiles of a
particular input file (filled with large cross-referencing tables) that
depends on whether `-disable-llvm-verifier` is on.  This slowdown was
caused by r187506, which introduced these checks.

Now, avoiding `-disable-llvm-verifier` only causes a 2x slowdown for
this case.

(Interestingly, dumping the textual IR for this file starts at least
50GB of global variable initializers (I don't know the total, since I
killed the dump)...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255269 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DeadStoreElimination] Use range-based loops. NFC.
Chad Rosier [Thu, 10 Dec 2015 17:27:18 +0000 (17:27 +0000)]
[DeadStoreElimination] Use range-based loops. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255265 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ProfileData] Add unit test infrastructure for sample profile reader/writer
Nathan Slingerland [Thu, 10 Dec 2015 17:21:42 +0000 (17:21 +0000)]
[ProfileData] Add unit test infrastructure for sample profile reader/writer

Adds support for in-memory round-trip of sample profile data along with basic
round trip unit tests. This will also make it easier to include unit tests for
future changes to sample profiling.

Reviewers: davidxl, dnovillo, silvas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D15211

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255264 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix fptosi, fptoui from f16 vectors to i8, i16 vectors
Pirama Arumuga Nainar [Thu, 10 Dec 2015 17:16:49 +0000 (17:16 +0000)]
Fix fptosi, fptoui from f16 vectors to i8, i16 vectors

Convert f16 vectors to corresponding f32 vectors before doing the
conversion to int.

Add tests for v4f16, v8f16.

Reviewers: ab, jmolloy

Subscribers: llvm-commits, srhines

Differential Revision: http://reviews.llvm.org/D14936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255263 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] fold bitcasts around an extractelement (3rd try)
Sanjay Patel [Thu, 10 Dec 2015 17:09:28 +0000 (17:09 +0000)]
[InstCombine] fold bitcasts around an extractelement (3rd try)

This is a redo of r255137 (reverted at r255227) which was a redo of
r255124 (reverted at r255126) with a fixed check for a scalar source
type and an added test for the failure that caused the revert.

Original commit message:

  bitcast (extractelement (bitcast <2 x float> %X to <2 x i32>), 1) to float
  extractelement <2 x float> %X, i32 1

This is part of fixing PR25543:

The next step will be to generalize this fold:
trunc ( lshr ( bitcast X) ) -> extractelement (X)

Ie, I'm hoping to replace the existing transform of:
bitcast ( trunc ( lshr ( bitcast X)))
added by:

with 2 less specific transforms to catch the case in the bug report.

Differential Revision: http://reviews.llvm.org/D14879

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255261 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Debug message cleanup (NFC)
Teresa Johnson [Thu, 10 Dec 2015 16:39:07 +0000 (16:39 +0000)]
[ThinLTO] Debug message cleanup (NFC)

Added some missing spaces between the module identifier and the start of
the debug message. Also added a ":" after the module identifier to make
this look a little nicer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255259 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAvoid undefined behavior when vector is empty.
Rafael Espindola [Thu, 10 Dec 2015 16:35:06 +0000 (16:35 +0000)]
Avoid undefined behavior when vector is empty.

Found by ubsan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255258 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove duplicated comments and don't repeat function names in comments; NFC
Sanjay Patel [Thu, 10 Dec 2015 16:34:21 +0000 (16:34 +0000)]
remove duplicated comments and don't repeat function names in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255257 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Release files in gold plugin during combined index (take 2)
Teresa Johnson [Thu, 10 Dec 2015 16:11:23 +0000 (16:11 +0000)]
[ThinLTO] Release files in gold plugin during combined index (take 2)

Ensure we release the files even when they don't hold a function index
summary section, by restructuring the control flow a little bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255256 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Tighten up several CHECK tests.
Dan Gohman [Thu, 10 Dec 2015 14:52:34 +0000 (14:52 +0000)]
[WebAssembly] Tighten up several CHECK tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255255 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSlit lib/Linker in two.
Rafael Espindola [Thu, 10 Dec 2015 14:19:35 +0000 (14:19 +0000)]
Slit lib/Linker in two.

A linker normally has two stages: symbol resolution and "moving stuff".

In lib/Linker there is the complication of lazy linking some globals,
but it was still far more mixed than it needed to.

This splits the linker into a lower level IRMover and the linker proper.
The IRMover just takes a list of globals to move and a callback that
lets the user control what is lazy linked.

The main motivation is that now tools/gold (and soon lld) can use their
own symbol resolution to instruct IRMover what to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255254 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Make WebAssemblyStoreResults only return true when it has a change.
Dan Gohman [Thu, 10 Dec 2015 14:17:36 +0000 (14:17 +0000)]
[WebAssembly] Make WebAssemblyStoreResults only return true when it has a change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255253 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Fix WebAssemblyPeephole to set Changed to true when making changes.
Dan Gohman [Thu, 10 Dec 2015 14:16:34 +0000 (14:16 +0000)]
[WebAssembly] Fix WebAssemblyPeephole to set Changed to true when making changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255252 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Declare that WebAssemblyPeephole does not modify the CFG.
Dan Gohman [Thu, 10 Dec 2015 14:12:04 +0000 (14:12 +0000)]
[WebAssembly] Declare that WebAssemblyPeephole does not modify the CFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255251 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Remove an unneeded getAnalysisUsage override.
Dan Gohman [Thu, 10 Dec 2015 14:10:04 +0000 (14:10 +0000)]
[WebAssembly] Remove an unneeded getAnalysisUsage override.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255250 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DeadStoreElimination] Add support for non-local DSE.
Chad Rosier [Thu, 10 Dec 2015 13:51:43 +0000 (13:51 +0000)]
[DeadStoreElimination] Add support for non-local DSE.

We extend the search for redundant stores to predecessor blocks that
unconditionally lead to the block BB with the current store instruction.  That
also includes single-block loops that unconditionally lead to BB, and
if-then-else blocks where then- and else-blocks unconditionally lead to BB.

Patch by Ivan Baev <ibaev@codeaurora.org>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255247 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBitcasts between FP and INT values using direct moves
Nemanja Ivanovic [Thu, 10 Dec 2015 13:35:28 +0000 (13:35 +0000)]
Bitcasts between FP and INT values using direct moves

This patch corresponds to review:

LLVM IR frequently contains bitcast operations between floating point and
integer values of the same width. Doing this through memory operations is
quite expensive on PPC. This patch allows the use of direct register moves
between FPRs and GPRs for lowering bitcasts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255246 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMacro debug info support in LLVM IR
Amjad Aboud [Thu, 10 Dec 2015 12:56:35 +0000 (12:56 +0000)]
Macro debug info support in LLVM IR
Introduced DIMacro and DIMacroFile debug info metadata in the LLVM IR to support macros.

Differential Revision: http://reviews.llvm.org/D14687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255245 91177308-0d34-0410-b5e6-96231b3b80d8