7 years ago[llvm-rtdyld] Fail early if we can't load dynamic libraries.
Davide Italiano [Sat, 21 Nov 2015 05:58:19 +0000 (05:58 +0000)]
[llvm-rtdyld] Fail early if we can't load dynamic libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253767 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-rtdyld] Turn assertion into errors, it seems more appropriate.
Davide Italiano [Sat, 21 Nov 2015 05:49:07 +0000 (05:49 +0000)]
[llvm-rtdyld] Turn assertion into errors, it seems more appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253766 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-rtdyld] Improve error handling, use Error().
Davide Italiano [Sat, 21 Nov 2015 05:44:41 +0000 (05:44 +0000)]
[llvm-rtdyld] Improve error handling, use Error().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253765 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove new assert to correct location
Teresa Johnson [Sat, 21 Nov 2015 03:51:23 +0000 (03:51 +0000)]
Move new assert to correct location

This assert was meant to execute at the end of parseMetadata, but
we return early and never reach the end of the function. Caught
by a compile-time warning since the function doesn't return a value
from that location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253762 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] don't crash when reporting a leak in test_single_input mode
Kostya Serebryany [Sat, 21 Nov 2015 03:46:43 +0000 (03:46 +0000)]
[libFuzzer] don't crash when reporting a leak in test_single_input mode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253761 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-rtdyld] Use report_fatal_error().
Davide Italiano [Sat, 21 Nov 2015 02:15:51 +0000 (02:15 +0000)]
[llvm-rtdyld] Use report_fatal_error().

This is a first step towards saner/uniform error reporting in llvm-rtdyld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253759 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARMLoadStoreOptimizer: Cleanup isMemoryOp(); NFC
Matthias Braun [Sat, 21 Nov 2015 02:09:49 +0000 (02:09 +0000)]
ARMLoadStoreOptimizer: Cleanup isMemoryOp(); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253757 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-link option and test for recent metadata mapping bug
Teresa Johnson [Sat, 21 Nov 2015 00:35:38 +0000 (00:35 +0000)]
llvm-link option and test for recent metadata mapping bug

Add a -preserve-modules option to llvm-link that simulates LTO
clients that don't destroy modules as they are linked. This enables
reproduction of a recent bug introduced by a metadata linking change
that was only caught when the modules weren't destroyed before
writing bitcode (LTO on Windows).

See http://llvm.org/viewvc/llvm-project?view=revision&revision=253170
for more details on the original bug and the fix.

Confirmed the new test added here reproduces the failure using the new
option when I suppress the fix.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14818

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253740 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest commit
Vinicius Tinti [Fri, 20 Nov 2015 23:20:12 +0000 (23:20 +0000)]
Test commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253737 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-rtdyld] Message() is used only once. Inline. NFC.
Davide Italiano [Fri, 20 Nov 2015 23:12:15 +0000 (23:12 +0000)]
[llvm-rtdyld] Message() is used only once. Inline. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253736 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd some constantness to GetSuccessorNumber().
Rong Xu [Fri, 20 Nov 2015 23:02:06 +0000 (23:02 +0000)]
Add some constantness to GetSuccessorNumber().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253733 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/
NAKAMURA Takumi [Fri, 20 Nov 2015 22:55:34 +0000 (22:55 +0000)]
Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253730 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPower8 and later support fusing addis/addi and addis/ld instruction
Eric Christopher [Fri, 20 Nov 2015 22:38:20 +0000 (22:38 +0000)]
Power8 and later support fusing addis/addi and addis/ld instruction
pairs that use the same register to execute as a single instruction.
No Functional Change

Patch by Kyle Butt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253724 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix another infinite loop in Reassociate caused by Constant::isZero().
Owen Anderson [Fri, 20 Nov 2015 22:34:48 +0000 (22:34 +0000)]
Fix another infinite loop in Reassociate caused by Constant::isZero().

Not all zero vectors are ConstantDataVector's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253723 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrepare] Create more extloads and fewer ands
Geoff Berry [Fri, 20 Nov 2015 22:34:39 +0000 (22:34 +0000)]
[CodeGenPrepare] Create more extloads and fewer ands

Add and instructions immediately after loads that only have their low
bits used, assuming that the (and (load x) c) will be matched as a
extload and the ands/truncs fed by the extload will be removed by isel.

Reviewers: mcrosier, qcolombet, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14584

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253722 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Fix handling of passing through semi-colon separated lists.
Chris Bieneman [Fri, 20 Nov 2015 22:08:49 +0000 (22:08 +0000)]
[CMake] Fix handling of passing through semi-colon separated lists.

When passing around CMake arguments as lists of arguments any arguments containing lists need to have their semi-colons escaped otherwise CMake will split the arguments in the middle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253719 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.
Arnaud A. de Grandmaison [Fri, 20 Nov 2015 21:54:27 +0000 (21:54 +0000)]
[ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.

The included test only checks for a compiler crash for now. Several people are
facing this issue, so we first resolve the crash, and will increase shrinkwrap's
coverage later in a follow-up patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253718 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSamplePGO - Tweak RUN command for a test. NFC.
Diego Novillo [Fri, 20 Nov 2015 21:46:41 +0000 (21:46 +0000)]
SamplePGO - Tweak RUN command for a test. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253717 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSamplePGO - Do not count never-executed inlined functions when computing coverage.
Diego Novillo [Fri, 20 Nov 2015 21:46:38 +0000 (21:46 +0000)]
SamplePGO - Do not count never-executed inlined functions when computing coverage.

If a function was originally inlined but not actually hot at runtime,
its samples will not be counted inside the parent function. This throws
off the coverage calculation because it expects to find more used
records than it should.

Fixed by ignoring functions that will not be inlined into the parent.
Currently, this is inlined functions with 0 samples.  In subsequent
patches, I'll change this to mean "cold" functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253716 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64]Merge narrow zero stores to a wider store
Jun Bum Lim [Fri, 20 Nov 2015 21:14:07 +0000 (21:14 +0000)]
[AArch64]Merge narrow zero stores to a wider store

This change merges adjacent zero stores into a wider single store.
For example :
  strh wzr, [x0]
  strh wzr, [x0, #2]
  str wzr, [x0]

This will fix PR25410.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253711 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWeak non-function symbols were being accessed directly, which is
Eric Christopher [Fri, 20 Nov 2015 20:51:31 +0000 (20:51 +0000)]
Weak non-function symbols were being accessed directly, which is
incorrect, as the chosen representative of the weak symbol may not live
with the code in question. Always indirect the access through the TOC

Patch by Kyle Butt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253708 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Fix the return value from HexagonGenInsert::runOnMachineFunction
Krzysztof Parzyszek [Fri, 20 Nov 2015 20:46:23 +0000 (20:46 +0000)]
[Hexagon] Fix the return value from HexagonGenInsert::runOnMachineFunction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix test case label check
Bill Seurer [Fri, 20 Nov 2015 20:24:49 +0000 (20:24 +0000)]
Fix test case label check

Several (but not all) of the labels that are checked for in this test case
are checked as strings instead of labels.  This can cause an apparent test
case failure if they are tested in an appropriately named directory.

For example, one of them that fails:

define zeroext i32 @test2(i32 %A.u, i32 %B.u)  {
; A8: test2
; A8: uxtab  r0, r0, r1

Output that causes it to fail:

. . .
.file "/home/seurer/llvm/llvm-test2/test/CodeGen/Thumb2/thumb2-uxt_rot.ll"
. . .
.globl test2
.align 1
.type test2,%function
.code 16                      @ @test2

The "A8: test2" matches on the directory name instead of the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253702 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the Windows build, include <tuple> for std::tie
Reid Kleckner [Fri, 20 Nov 2015 19:29:40 +0000 (19:29 +0000)]
Fix the Windows build, include <tuple> for std::tie

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253698 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[FunctionAttrs] Remove redundant assignment."
Tilmann Scheller [Fri, 20 Nov 2015 19:17:10 +0000 (19:17 +0000)]
Revert "[FunctionAttrs] Remove redundant assignment."

This reverts r253661.

Turns out that the assignment is not redundant (despite the Clang static analyzer claiming the opposite).

The variable is being used by the lambda function AddUsersToWorklistIfCapturing().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253696 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-profdata] Add merge() to InstrProfRecord
Nathan Slingerland [Fri, 20 Nov 2015 19:12:43 +0000 (19:12 +0000)]
[llvm-profdata] Add merge() to InstrProfRecord

This change refactors two aspects of InstrProfRecord:

1) Add a merge() method to InstrProfRecord (previously InstrProfWriter combineInstrProfRecords()) in order to better encapsulate this functionality and to make the InstrProfRecord and SampleRecord APIs more consistent.

2) Make InstrProfRecord mergeValueProfData() a private method since it is only ever called internally by merge().

Reviewers: dnovillo, bogner, davidxl

Subscribers: silvas, vsk, llvm-commits

Differential Revision: http://reviews.llvm.org/D14786

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253695 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAvoid duplicate entry for cortex-a7 in the TargetParser (NFC)
Artyom Skrobov [Fri, 20 Nov 2015 16:46:14 +0000 (16:46 +0000)]
Avoid duplicate entry for cortex-a7 in the TargetParser (NFC)

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D14757

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253676 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHandle ARMv6-J as an alias, instead of fake architecture
Artyom Skrobov [Fri, 20 Nov 2015 16:46:09 +0000 (16:46 +0000)]
Handle ARMv6-J as an alias, instead of fake architecture

This follows D14577 to treat ARMv6-J as an alias for ARMv6,
instead of an architecture in its own right.

The functional change is that the default CPU when targeting ARMv6-J
changes from arm1136j-s to arm1136jf-s, which is currently used as
the default CPU for ARMv6; both are, in fact, ARMv6-J CPUs.

The J-bit (Jazelle support) is irrelevant to LLVM, and it doesn't
affect code generation, attributes, optimizations, or anything else,
apart from selecting the default CPU.

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253675 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSamplePGO - Add line offset and discriminator information to sample reports.
Diego Novillo [Fri, 20 Nov 2015 15:39:42 +0000 (15:39 +0000)]
SamplePGO - Add line offset and discriminator information to sample reports.

While debugging some sampling coverage problems, I found this useful:
When applying samples from a profile, it helps to also know what line
offset and discriminator the sample belongs to. This makes it easy to
correlate against the input profile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253670 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Add MODULE_CODE_METADATA_VALUES record
Teresa Johnson [Fri, 20 Nov 2015 14:51:27 +0000 (14:51 +0000)]

This is split out from the ThinLTO metadata mapping patch

To avoid needing to parse the module level metadata during function
importing, a new module-level record is added which holds the
number of module-level metadata values. This is required because
metadata value ids are assigned implicitly during parsing, and the
function-level metadata ids start after the module-level metadata ids.

I made a change to this version of the code compared to D14752
in order to add more consistent and thorough assertion checking of the
new record value. We now unconditionally use the record value to
initialize the MDValueList size, and handle it the same in parseMetadata
for all module level metadata cases (lazy loading or not).

Reviewers: dexonsmith, joker.eph

Subscribers: davidxl, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D14825

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253668 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Remove redundant assignment.
Tilmann Scheller [Fri, 20 Nov 2015 13:27:30 +0000 (13:27 +0000)]
[Hexagon] Remove redundant assignment.

Identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253664 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPartially revert r253662: some unrelated work was accidentally committed with it.
Daniel Sanders [Fri, 20 Nov 2015 13:16:35 +0000 (13:16 +0000)]
Partially revert r253662: some unrelated work was accidentally committed with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253663 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert the revert 253497 and 253539 - These commits aren't the cause of the clang...
Daniel Sanders [Fri, 20 Nov 2015 13:13:53 +0000 (13:13 +0000)]
Revert the revert 253497 and 253539 - These commits aren't the cause of the clang-cmake-mips failures.

Sorry for the noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253662 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FunctionAttrs] Remove redundant assignment.
Tilmann Scheller [Fri, 20 Nov 2015 12:51:58 +0000 (12:51 +0000)]
[FunctionAttrs] Remove redundant assignment.

Identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253661 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Remove redundant local variable.
Tilmann Scheller [Fri, 20 Nov 2015 12:10:17 +0000 (12:10 +0000)]
[Hexagon] Remove redundant local variable.

Identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253660 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert 253497 and 253539 to try to fix clang-cmake-mips buildbot.
Daniel Sanders [Fri, 20 Nov 2015 10:07:11 +0000 (10:07 +0000)]
Revert 253497 and 253539 to try to fix clang-cmake-mips buildbot.

It caused link errors of the form:
InstrProfiling.c:(.text.__llvm_profile_instrument_target+0x1c0): undefined reference to `__sync_fetch_and_add_8'

We had a network outage at the time of the commit so the first build to show a
problem is http://lab.llvm.org:8011/builders/clang-cmake-mips/builds/10827

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253656 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a pair of issues that caused an infinite loop in reassociate.
Owen Anderson [Fri, 20 Nov 2015 08:16:13 +0000 (08:16 +0000)]
Fix a pair of issues that caused an infinite loop in reassociate.

Terrifyingly, one of them is a mishandling of floating point vectors
in Constant::isZero().  How exactly this issue survived this long
is beyond me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253655 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse range-based for loops. NFC
Craig Topper [Fri, 20 Nov 2015 07:18:48 +0000 (07:18 +0000)]
Use range-based for loops. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253652 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, MULEU_S.PH...
Hrvoje Varga [Fri, 20 Nov 2015 07:14:52 +0000 (07:14 +0000)]
Differential Revision: http://reviews.llvm.org/D14280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253651 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Remove the AsmPrinter code for printing physical registers.
Dan Gohman [Fri, 20 Nov 2015 03:13:31 +0000 (03:13 +0000)]
[WebAssembly] Remove the AsmPrinter code for printing physical registers.

WebAssembly does not have physical registers, so even if LLVM uses physical
registers like SP, they'll need to be lowered to virtual registers before
AsmPrinter time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253644 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Add a few open tasks to the target README.txt.
Dan Gohman [Fri, 20 Nov 2015 03:08:27 +0000 (03:08 +0000)]
[WebAssembly] Add a few open tasks to the target README.txt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253643 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
Dan Gohman [Fri, 20 Nov 2015 03:02:49 +0000 (03:02 +0000)]
[WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253642 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Remove done items from the README.txt.
Dan Gohman [Fri, 20 Nov 2015 02:51:38 +0000 (02:51 +0000)]
[WebAssembly] Remove done items from the README.txt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253640 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Add asserts that the expression stack is used in stack order.
Dan Gohman [Fri, 20 Nov 2015 02:33:24 +0000 (02:33 +0000)]
[WebAssembly] Add asserts that the expression stack is used in stack order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253638 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssemby] Enforce FIFO ordering for instructions using stackified registers.
Dan Gohman [Fri, 20 Nov 2015 02:19:12 +0000 (02:19 +0000)]
[WebAssemby] Enforce FIFO ordering for instructions using stackified registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253634 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.
Peter Collingbourne [Fri, 20 Nov 2015 01:26:13 +0000 (01:26 +0000)]
ScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.

The nuw constraint will not be satisfied unless <expr> == 0.

This bug has been around since r102234 (in 2010!), but was uncovered by
r251052, which introduced more aggressive optimization of nuw scev expressions.

Differential Revision: http://reviews.llvm.org/D14850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253627 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSplit the argument unscheduling loop in the WebAssembly register
Eric Christopher [Fri, 20 Nov 2015 00:34:54 +0000 (00:34 +0000)]
Split the argument unscheduling loop in the WebAssembly register
coloring pass. Turn the logic into "look for an insert point and
then move things past the insert point".

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253626 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LTO] Add options to llvm-lto to select output format and dump merged module
Tobias Edler von Koch [Fri, 20 Nov 2015 00:13:05 +0000 (00:13 +0000)]
[LTO] Add options to llvm-lto to select output format and dump merged module

This introduces two new options:
- "llvm-lto -save-merged-module -o outfile" dumps the LTO Module to
  outfile.merged.bc prior to CodeGen and after LTO optimizations have been run.
- "llvm-lto -filetype=asm -o outfile" makes llvm-lto emit assembly instead of
  object code in outfile.

Both are intended for use in lit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253624 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LTO] Add option to emit assembly from LTOCodeGenerator
Tobias Edler von Koch [Thu, 19 Nov 2015 23:59:24 +0000 (23:59 +0000)]
[LTO] Add option to emit assembly from LTOCodeGenerator

This adds a new API, LTOCodeGenerator::setFileType, to choose the output file
format for LTO CodeGen. A corresponding change to use this new API from
llvm-lto and a test case is coming in a separate commit.

Differential Revision: http://reviews.llvm.org/D14554

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253622 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a [-Werror,-Wcovered-switch-default] warning by removing the
Eric Christopher [Thu, 19 Nov 2015 23:45:42 +0000 (23:45 +0000)]
Fix a [-Werror,-Wcovered-switch-default] warning by removing the
unnecessary default case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253621 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Disable most forms of demotion
Reid Kleckner [Thu, 19 Nov 2015 23:23:33 +0000 (23:23 +0000)]
[WinEH] Disable most forms of demotion

Now that the register allocator knows about the barriers on funclet
entry and exit, testing has shown that this is unnecessary.

We still demote PHIs on unsplittable blocks due to the differences
between the IR CFG and the Machine CFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253619 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Implement isCheapToSpeculateCtlz and isCheapToSpeculateCttz.
Dan Gohman [Thu, 19 Nov 2015 23:04:59 +0000 (23:04 +0000)]
[WebAssembly] Implement isCheapToSpeculateCtlz and isCheapToSpeculateCttz.

This unbreaks test/CodeGen/WebAssembly/i32.ll and
test/CodeGen/WebAssembly/i64.ll after r224899.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253617 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCleanup some -Wundef warnings in include/llvm/Support/MathExtras.h
Arch D. Robison [Thu, 19 Nov 2015 22:37:26 +0000 (22:37 +0000)]
Cleanup some -Wundef warnings in include/llvm/Support/MathExtras.h

Fix avoids gratuitous warnings from gcc for "_MSC_VER" not being defined.

Differential Revision: http://reviews.llvm.org/D14598

Patch by Tony Kelman <tony@kelman.net>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253614 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSamplePGO - Tweak debugging output for function samples. NFC.
Diego Novillo [Thu, 19 Nov 2015 22:18:30 +0000 (22:18 +0000)]
SamplePGO - Tweak debugging output for function samples. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253612 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.
Simon Pilgrim [Thu, 19 Nov 2015 22:13:56 +0000 (22:13 +0000)]
[X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.

Found during stress testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253611 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] add tests to show missing trunc optimizations
Sanjay Patel [Thu, 19 Nov 2015 22:11:52 +0000 (22:11 +0000)]
[InstCombine] add tests to show missing trunc optimizations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253609 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix UMRs in Mips disassembler on invalid instruction streams
Reid Kleckner [Thu, 19 Nov 2015 21:51:55 +0000 (21:51 +0000)]
Fix UMRs in Mips disassembler on invalid instruction streams

The Insn and Size local variables were used without initialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253607 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Use existing MachineInstrBuilder::addDisp to create offseted pointer. NFC.
Simon Pilgrim [Thu, 19 Nov 2015 21:50:57 +0000 (21:50 +0000)]
[X86] Use existing MachineInstrBuilder::addDisp to create offseted pointer. NFC.

Minor code duplication tidyup to D13988

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253606 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFollow up to r253591. Turn into an assertion.
Davide Italiano [Thu, 19 Nov 2015 21:50:08 +0000 (21:50 +0000)]
Follow up to r253591. Turn into an assertion.

Reported by: David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253605 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Update some comments. NFC.
Chad Rosier [Thu, 19 Nov 2015 21:33:07 +0000 (21:33 +0000)]
[LIR] Update some comments. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253603 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] add tests to show missing bitcast optimizations
Sanjay Patel [Thu, 19 Nov 2015 21:32:25 +0000 (21:32 +0000)]
[InstCombine] add tests to show missing bitcast optimizations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253602 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExpand subregisters in MachineFrameInfo::getPristineRegs
Krzysztof Parzyszek [Thu, 19 Nov 2015 21:18:52 +0000 (21:18 +0000)]
Expand subregisters in MachineFrameInfo::getPristineRegs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253600 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the debug build breakage that getDiscriminator is called by mistake.
Dehao Chen [Thu, 19 Nov 2015 20:29:27 +0000 (20:29 +0000)]
Fix the debug build breakage that getDiscriminator is called by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253597 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r253253 and r253126: "Don't recompute LCSSA after loop-unrolling when possible."
Michael Zolotukhin [Thu, 19 Nov 2015 20:28:32 +0000 (20:28 +0000)]
Revert r253253 and r253126: "Don't recompute LCSSA after loop-unrolling when possible."

The change exposed a bug in IndVarSimplify (PR25578), which led to a
failure (PR25538). When the bug is fixed, this patch can be reapplied.

The tests are kept in tree, as they're useful anyway, and will not break
with this revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253596 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReimplement discriminator assignment algorithm.
Dehao Chen [Thu, 19 Nov 2015 19:53:05 +0000 (19:53 +0000)]
Reimplement discriminator assignment algorithm.

Summary: The new algorithm is more efficient (O(n), n is number of basic blocks). And it is guaranteed to cover all cases of multiple BB mapped to same line.

Reviewers: dblaikie, davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14738

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253594 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AddressSanitizer] assert(false) -> llvm_unreachable and remove return.
Davide Italiano [Thu, 19 Nov 2015 19:28:23 +0000 (19:28 +0000)]
[AddressSanitizer] assert(false) -> llvm_unreachable and remove return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253591 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago [AArch64] Refactoring aarch64-ldst-opt. NCF.
Jun Bum Lim [Thu, 19 Nov 2015 18:41:27 +0000 (18:41 +0000)]
 [AArch64] Refactoring aarch64-ldst-opt. NCF.

Summary :
 * Rename isSmallTypeLdMerge() to isNarrowLoad().
 * Rename NumSmallTypeMerged to NumNarrowTypePromoted.
 * Use Subtarget defined as a member variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253587 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Fix 80-column from previous commit.
Chad Rosier [Thu, 19 Nov 2015 18:25:11 +0000 (18:25 +0000)]
[LIR] Fix 80-column from previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253586 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Sink checks into function to enable future refactoring. NFC.
Chad Rosier [Thu, 19 Nov 2015 18:22:21 +0000 (18:22 +0000)]
[LIR] Sink checks into function to enable future refactoring. NFC.

The purpose of this change is help delineate the memset and memcpy
optimizations with the overall goal of resolving PR25520.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253585 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalOpt] Localize some globals that have non-instruction users
James Molloy [Thu, 19 Nov 2015 18:04:33 +0000 (18:04 +0000)]
[GlobalOpt] Localize some globals that have non-instruction users

We currently bail out of global localization if the global has non-instruction users. However, often these can be simple bitcasts or constant-GEPs, which we can easily turn into instructions before localizing. Be a bit more aggressive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253584 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoupdate comment and error message; NFC
Sanjay Patel [Thu, 19 Nov 2015 17:35:55 +0000 (17:35 +0000)]
update comment and error message; NFC

'notail' was added in:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253580 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Use the more appropriate method. NFC.
Chad Rosier [Thu, 19 Nov 2015 17:27:28 +0000 (17:27 +0000)]
[LIR] Use the more appropriate method. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253578 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64]Extend merging narrow loads into a wider load
Jun Bum Lim [Thu, 19 Nov 2015 17:21:41 +0000 (17:21 +0000)]
[AArch64]Extend merging narrow loads into a wider load

This change extends r251438 to handle more narrow load promotions
including byte type, unscaled, and signed. For example, this change will
convert :
  ldursh w1, [x0, #-2]
  ldurh  w2, [x0, #-4]
  ldur  w2, [x0, #-4]
  asr   w1, w2, #16
  and   w2, w2, #0xffff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253577 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agothis new test file was accidentally left out of r253573
Sanjay Patel [Thu, 19 Nov 2015 16:39:00 +0000 (16:39 +0000)]
this new test file was accidentally left out of r253573

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253574 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CGP] despeculate expensive cttz/ctlz intrinsics
Sanjay Patel [Thu, 19 Nov 2015 16:37:10 +0000 (16:37 +0000)]
[CGP] despeculate expensive cttz/ctlz intrinsics

This is another step towards allowing SimplifyCFG to speculate harder, but then have
CGP clean things up if the target doesn't like it.

Previous patches in this series:

D13297 should catch most expensive ops, but speculation of cttz/ctlz requires special
handling because of weirdness in the intrinsic definition for handling a zero input
(that definition can probably be blamed on x86).

For example, if we have the usual speculated-by-select expensive op pattern like this:

  %tobool = icmp eq i64 %A, 0
  %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)   ; is_zero_undef == true
  %cond = select i1 %tobool, i64 64, i64 %0
  ret i64 %cond

There's an instcombine that will turn it into:

  %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 false)   ; is_zero_undef == false

This CGP patch is looking for that case and despeculating it back into:

    %tobool = icmp eq i64 %A, 0
    br i1 %tobool, label %cond.end, label %cond.true

    %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)    ; is_zero_undef == true
    br label %cond.end

    %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
    ret i64 %cond

This unfortunately may lead to poorer codegen (see the changes in the existing x86 test),
but if we increase speculation in SimplifyCFG (the next step in this patch series), then
we should avoid those kinds of cases in the first place.

The need for this patch was originally mentioned here:
with follow-up here:

Differential Revision: http://reviews.llvm.org/D14630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253573 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86: More efficient legalization of wide integer compares
Hans Wennborg [Thu, 19 Nov 2015 16:35:08 +0000 (16:35 +0000)]
X86: More efficient legalization of wide integer compares

In particular, this makes the code for 64-bit compares on 32-bit targets
much more efficient.


  define i32 @test_slt(i64 %a, i64 %b) {
    %cmp = icmp slt i64 %a, %b
    br i1 %cmp, label %bb1, label %bb2
    ret i32 1
    ret i32 2

Before this patch:

          movl    4(%esp), %eax
          movl    8(%esp), %ecx
          cmpl    12(%esp), %eax
          setae   %al
          cmpl    16(%esp), %ecx
          setge   %cl
          je      .LBB2_2
          movb    %cl, %al
          testb   %al, %al
          jne     .LBB2_4
          movl    $1, %eax
          movl    $2, %eax

After this patch:

          movl    4(%esp), %eax
          movl    8(%esp), %ecx
          cmpl    12(%esp), %eax
          sbbl    16(%esp), %ecx
          jge     .LBB1_2
          movl    $1, %eax
          movl    $2, %eax

Differential Revision: http://reviews.llvm.org/D14496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253572 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTargetParser.cpp: Fixup -- StringRef::startswith() is better here. NFC.
NAKAMURA Takumi [Thu, 19 Nov 2015 15:42:52 +0000 (15:42 +0000)]
TargetParser.cpp: Fixup -- StringRef::startswith() is better here. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253570 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused function parameter (NFC)
Mehdi Amini [Thu, 19 Nov 2015 15:42:34 +0000 (15:42 +0000)]
Remove unused function parameter (NFC)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253569 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSamplePGO - Sort samples by source location when emitting as text.
Diego Novillo [Thu, 19 Nov 2015 15:33:08 +0000 (15:33 +0000)]
SamplePGO - Sort samples by source location when emitting as text.

When dumping function samples or writing them out as text format, it
helps if the samples are emitted sorted by source location. The sorting
of the maps is a bit slow, so we only do it on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253568 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Add tests for ROL and ROR macros expansion
Zoran Jovanovic [Thu, 19 Nov 2015 15:04:31 +0000 (15:04 +0000)]
[mips] Add tests for ROL and ROR macros expansion

Author: obucina

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253567 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm/lib/Support/TargetParser.cpp: Rework llvm::ARM::getArchExtFeature() to avoid...
NAKAMURA Takumi [Thu, 19 Nov 2015 15:03:11 +0000 (15:03 +0000)]
llvm/lib/Support/TargetParser.cpp: Rework llvm::ARM::getArchExtFeature() to avoid abuse of Twine in r253470.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253566 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LV] Add a helper function, isReductionVariable. NFC.
Chad Rosier [Thu, 19 Nov 2015 14:19:06 +0000 (14:19 +0000)]
[LV] Add a helper function, isReductionVariable. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253565 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Expansion of ROL and ROR macros
Zoran Jovanovic [Thu, 19 Nov 2015 14:15:03 +0000 (14:15 +0000)]
[mips] Expansion of ROL and ROR macros

Author: obucina

Reviewers: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D10611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253564 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Fixed COPY_TO_REGCLASS for mask registers
Elena Demikhovsky [Thu, 19 Nov 2015 13:13:00 +0000 (13:13 +0000)]
AVX-512: Fixed COPY_TO_REGCLASS for mask registers

Copying one mask register to another under BW should be done with kmovq instruction, otherwise we can loose some bits.
Copying 8 bits under DQ may be done with kmovb.

Differential Revision: http://reviews.llvm.org/D14812

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253563 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemoving specific target from the generic test
Artyom Skrobov [Thu, 19 Nov 2015 12:24:47 +0000 (12:24 +0000)]
Removing specific target from the generic test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253562 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Fix lowering of X86ISD::VZEXT_MOVL for 128-bit -> 256-bit extension
Simon Pilgrim [Thu, 19 Nov 2015 12:18:37 +0000 (12:18 +0000)]
[X86][AVX] Fix lowering of X86ISD::VZEXT_MOVL for 128-bit -> 256-bit extension

The lowering patterns for X86ISD::VZEXT_MOVL for 128-bit to 256-bit vectors were just copying the lower xmm instead of actually masking off the first scalar using a blend.

Fix for PR25320.

Differential Revision: http://reviews.llvm.org/D14151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253561 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAlternative to long nops for X86 CPUs, by Andrey Turetsky
Alexey Bataev [Thu, 19 Nov 2015 11:44:35 +0000 (11:44 +0000)]
Alternative to long nops for X86 CPUs, by Andrey Turetsky
Make X86AsmBackend generate smarter nops instead of a bunch of 0x90 for code alignment for CPUs which don't support long nop instructions.
Differential Revision: http://reviews.llvm.org/D14178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253557 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[lit] Fix bug when using Python3 where a failing test would not show
Dan Liew [Thu, 19 Nov 2015 11:35:42 +0000 (11:35 +0000)]
[lit] Fix bug when using Python3 where a failing test would not show
the script when running a ShTest with an external or internal shell.

This bug is caused by use of the ``map`` function in Python 3 which
returns an iterable (rather than a list in Python 2). After the iterable
is exhausted it won't return any more output and consequently when
``_runShTest()`` tries to access the ``script`` which has already been
iterated over it is empty. Converting to a list immediatley after
calling ``map()`` fixes this.

This fixes the ``tests/shtest-format.py`` test when running under
Python3 which was previously failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253556 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agogold-plugin.cpp: Fix diagnosticHandler corresponding to r253540.
NAKAMURA Takumi [Thu, 19 Nov 2015 10:43:44 +0000 (10:43 +0000)]
gold-plugin.cpp: Fix diagnosticHandler corresponding to r253540.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253553 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FunctionAttrs] Provide a mechanism for adding function attributes from the command...
James Molloy [Thu, 19 Nov 2015 08:49:57 +0000 (08:49 +0000)]
[FunctionAttrs] Provide a mechanism for adding function attributes from the command line

This provides a way to force a function to have certain attributes from the command line. This can be useful when debugging or doing workload exploration, where manually editing IR is tedious or not possible (due to build systems etc).

The syntax is -force-attribute=function_name:attribute_name

All function attributes are parsed except alignstack as it requires an argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253550 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions.
Igor Breger [Thu, 19 Nov 2015 08:26:56 +0000 (08:26 +0000)]
AVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions.

Differential Revision: http://reviews.llvm.org/D14702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253548 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding for the vmovss.s and vmovsd.s instructions.
Igor Breger [Thu, 19 Nov 2015 07:58:33 +0000 (07:58 +0000)]
AVX512: Implemented encoding for the vmovss.s and vmovsd.s instructions.

Differential Revision: http://reviews.llvm.org/D14771

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253547 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding for the follow instructions.
Igor Breger [Thu, 19 Nov 2015 07:43:43 +0000 (07:43 +0000)]
AVX512: Implemented encoding for the follow instructions.
    vmovapd.s, vmovaps.s, vmovdqa32.s, vmovdqa64.s, vmovdqu16.s, vmovdqu32.s, vmovdqu64.s, vmovdqu8.s, vmovupd.s, vmovups.s

Differential Revision: http://reviews.llvm.org/D14768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253546 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPointers in Masked Load, Store, Gather, Scatter intrinsics
Elena Demikhovsky [Thu, 19 Nov 2015 07:17:16 +0000 (07:17 +0000)]
Pointers in Masked Load, Store, Gather, Scatter intrinsics

The masked intrinsics support all integer and floating point data types. I added the pointer type to this list.
Added tests for CodeGen and for Loop Vectorizer.
Updated the Language Reference.

Differential Revision: http://reviews.llvm.org/D14150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253544 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Change memcpy/memset/memmove to have dest and source alignments."
Pete Cooper [Thu, 19 Nov 2015 05:56:52 +0000 (05:56 +0000)]
Revert "Change memcpy/memset/memmove to have dest and source alignments."

This reverts commit r253511.

This likely broke the bots in

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253543 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDo not require a Context to extract the FunctionIndex from Bitcode (NFC)
Mehdi Amini [Thu, 19 Nov 2015 05:52:29 +0000 (05:52 +0000)]
Do not require a Context to extract the FunctionIndex from Bitcode (NFC)

The LLVMContext was only used for Diagnostic. Pass a DiagnosticHandler

Differential Revision: http://reviews.llvm.org/D14794

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253540 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Disable SaturatingMultiply() unit test while investigating
Nathan Slingerland [Thu, 19 Nov 2015 05:20:17 +0000 (05:20 +0000)]
[Support] Disable SaturatingMultiply() unit test while investigating

Ubsan detected undefined behavior in the MathExtras SaturatingMultiply test.

This change disables the test while it is being investigated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253539 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix bug 25440: GVN assertion after coercing loads
Weiming Zhao [Thu, 19 Nov 2015 02:45:18 +0000 (02:45 +0000)]
Fix bug 25440: GVN assertion after coercing loads

Optimizations like LoadPRE in GVN will insert new instructions.
If the insertion point is in a already processed BB, they should
get a value number explicitly. If the insertion point is after
current instruction, then just leave it. However, current GVN framework
has no support for it.
In this patch, we just bail out if a VN can't be found.

Dfferential Revision: http://reviews.llvm.org/D14670

A    test/Transforms/GVN/pr25440.ll
M    lib/Transforms/Scalar/GVN.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253536 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix UMR in llvm-nm on IR object files in printDarwinSymbol
Reid Kleckner [Thu, 19 Nov 2015 00:51:50 +0000 (00:51 +0000)]
Fix UMR in llvm-nm on IR object files in printDarwinSymbol

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253529 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Enable shrink-wrapping by default.
Quentin Colombet [Thu, 19 Nov 2015 00:38:00 +0000 (00:38 +0000)]
[X86] Enable shrink-wrapping by default.

Differential Revision: http://reviews.llvm.org/D14156


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253528 91177308-0d34-0410-b5e6-96231b3b80d8