7 years ago[dfsan] Abort at runtime on indirect calls to uninstrumented vararg functions.
Peter Collingbourne [Wed, 5 Nov 2014 17:21:00 +0000 (17:21 +0000)]
[dfsan] Abort at runtime on indirect calls to uninstrumented vararg functions.

We currently have no infrastructure to support these correctly.

This is accomplished by generating a call to a runtime library function that
aborts at runtime in place of the regular wrapper for such functions. Direct
calls are rewritten in the usual way during traversal of the caller's IR.

We also remove the "split-stack" attribute from such wrappers, as the code
generator cannot currently handle split-stack vararg functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221360 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: MDNode => Value: NamedMDNode::addOperand()
Duncan P. N. Exon Smith [Wed, 5 Nov 2014 17:16:09 +0000 (17:16 +0000)]
IR: MDNode => Value: NamedMDNode::addOperand()

Change `NamedMDNode::addOperand()` to take a `Value *` instead of an
`MDNode *`.  This is part of PR21433.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221359 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Remove dead code identified by the Clang static analyzer.
Tilmann Scheller [Wed, 5 Nov 2014 17:10:43 +0000 (17:10 +0000)]
[ARM] Remove dead code identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221358 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Mark symbols as microMIPS if necessary
Zoran Jovanovic [Wed, 5 Nov 2014 16:35:20 +0000 (16:35 +0000)]
[mips][microMIPS] Mark symbols as microMIPS if necessary
Differential Revision: http://reviews.llvm.org/D6039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221355 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReverted revisions 221351, 221352 and 221353.
Zoran Jovanovic [Wed, 5 Nov 2014 16:19:59 +0000 (16:19 +0000)]
Reverted revisions 221351, 221352 and 221353.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement CodeGen support for ANDI16 instruction
Zoran Jovanovic [Wed, 5 Nov 2014 15:54:05 +0000 (15:54 +0000)]
[mips][microMIPS] Implement CodeGen support for ANDI16 instruction
Differential Revision: http://reviews.llvm.org/D5797

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221353 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
Zoran Jovanovic [Wed, 5 Nov 2014 15:46:53 +0000 (15:46 +0000)]
[mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
Differential Revision: http://reviews.llvm.org/D5933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221352 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement ANDI16 instruction
Zoran Jovanovic [Wed, 5 Nov 2014 15:39:41 +0000 (15:39 +0000)]
[mips][microMIPS] Implement ANDI16 instruction
Differential Revision: http://reviews.llvm.org/D5163

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Change all instruction assembly names to lowercase.
Tom Stellard [Wed, 5 Nov 2014 14:50:53 +0000 (14:50 +0000)]
R600/SI: Change all instruction assembly names to lowercase.

This matches the format produced by the AMD proprietary driver.

// Shell script for converting .ll test cases: (Pass the .ll files
   you want to convert to this script as arguments).

; This was necessary on my system so that A-Z in sed would match only
; upper case.  I'm not sure why.
export LC_ALL='C'


MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`

for f in $TEST_FILES; do
  # Check that there are SI tests:
  grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
  if [ $? -eq 0 ]; then
    for match in $MATCHES; do
      sed -i -e "s/\([ :]$match\)/\L\1/" $f

    # Try to get check lines with partial instruction names
    sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f

sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll

// Shell script for converting .td files (run this last)

export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Add an extra check line to make test more strict
Tom Stellard [Wed, 5 Nov 2014 14:50:34 +0000 (14:50 +0000)]
R600/SI: Add an extra check line to make test more strict

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221349 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a LLVM_BUILD_STATIC option to cmake.
Rafael Espindola [Wed, 5 Nov 2014 14:03:58 +0000 (14:03 +0000)]
Add a LLVM_BUILD_STATIC option to cmake.

Setting it to true causes all executables to be statically linked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221345 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Teach method 'isVectorClearMaskLegal' how to check for legal blend masks.
Andrea Di Biagio [Wed, 5 Nov 2014 13:04:14 +0000 (13:04 +0000)]
[X86] Teach method 'isVectorClearMaskLegal' how to check for legal blend masks.

This patch improves the folding of vector AND nodes into blend operations for
targets that feature SSE4.1. A vector AND node where one of the operands is
a constant build_vector with elements that are either zero or all-ones can be
converted into a blend.

This allows for example to simplify the following code:

define <4 x i32> @test(<4 x i32> %A, <4 x i32> %B) {
  %1 = and <4 x i32> %A, <i32 0, i32 0, i32 0, i32 -1>
  %2 = and <4 x i32> %B, <i32 -1, i32 -1, i32 -1, i32 0>
  %3 = or <4 x i32> %1, %2
  ret <4 x i32> %3

Before this patch llc (-mcpu=corei7) generated:
        andps  LCPI1_0(%rip), %xmm0, %xmm0
        andps  LCPI1_1(%rip), %xmm1, %xmm1
        orps   %xmm1, %xmm0, %xmm0

With this patch we generate a single 'vpblendw'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221343 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix bashism in tests added by r221341
Oliver Stannard [Wed, 5 Nov 2014 12:40:21 +0000 (12:40 +0000)]
Fix bashism in tests added by r221341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221342 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Honor FeatureD16 in the assembler and disassembler
Oliver Stannard [Wed, 5 Nov 2014 12:06:39 +0000 (12:06 +0000)]
[ARM] Honor FeatureD16 in the assembler and disassembler

Some ARM FPUs only have 16 double-precision registers, rather than the
normal 32. LLVM represents this with the D16 target feature. This is
currently used by CodeGen to avoid using high registers when they are
not available, but the assembler and disassembler do not.

I fix this in the assmebler and disassembler rather than the
InstrInfo.td files, as the latter would require a large number of
changes everywhere one of the floating-point instructions is referenced
in the backend. This solution is similar to the one used for
co-processor numbers and MSR masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove logic that decides if its profitable to commute when some of the virtual...
Craig Topper [Wed, 5 Nov 2014 06:43:02 +0000 (06:43 +0000)]
Improve logic that decides if its profitable to commute when some of the virtual registers involved have uses/defs chains connecting them to physical register. Fix up the tests that this change improves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221336 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm/test/Transforms/GCOVProfiling: Avoid to parse backslashes in MDString. Use ...
NAKAMURA Takumi [Wed, 5 Nov 2014 06:29:05 +0000 (06:29 +0000)]
llvm/test/Transforms/GCOVProfiling: Avoid to parse backslashes in MDString. Use %/T instead of %T.

LLVM Parser decodes "\bb" as hex in "C:\bb-win7\buildername\build...", with MDString.

See also, http://llvm.org/docs/LangRef.html#metadata-nodes-and-metadata-strings

This reverts r221270, "Disable 3 tests in llvm/test/Transforms/GCOVProfiling/ for now. Investigating."

FIXME: Please check EC in GCOVProfiler::emitProfileNotes().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-readobj: Add support for dumping the DOS header in PE files
David Majnemer [Wed, 5 Nov 2014 06:24:35 +0000 (06:24 +0000)]
llvm-readobj: Add support for dumping the DOS header in PE files

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221333 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert 220932.
Jiangning Liu [Wed, 5 Nov 2014 04:44:31 +0000 (04:44 +0000)]
Revert 220932.

Commit 220932 caused crash when building clang-tblgen on aarch64 debian target,
so it's blocking all daily tests.

The std::call_once implementation in pthread has bug for aarch64 debian.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Metadata: Remove unnecessary dyn_cast
Duncan P. N. Exon Smith [Wed, 5 Nov 2014 01:55:06 +0000 (01:55 +0000)]
IR: Metadata: Remove unnecessary dyn_cast

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221328 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix broken C++ mode comment
Matt Arsenault [Wed, 5 Nov 2014 01:36:22 +0000 (01:36 +0000)]
Fix broken C++ mode comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstSimplify: Exact shifts of X by Y are X if X has the lsb set
David Majnemer [Wed, 5 Nov 2014 00:59:59 +0000 (00:59 +0000)]
InstSimplify: Exact shifts of X by Y are X if X has the lsb set

Exact shifts may not shift out any non-zero bits. Use computeKnownBits
to determine when this occurs and just return the left hand side.

This fixes PR21477.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221325 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a check for misbehaving -Wcomment from gcc-4.7 and add
Eric Christopher [Wed, 5 Nov 2014 00:35:15 +0000 (00:35 +0000)]
Add a check for misbehaving -Wcomment from gcc-4.7 and add
-Wno-comment to the compilation flags if so.

Patch by Filipe Cabecinhas, configure regenerated by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221323 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: try to add extra CS-register whenever stack alignment >= 8.
Tim Northover [Wed, 5 Nov 2014 00:27:20 +0000 (00:27 +0000)]
ARM: try to add extra CS-register whenever stack alignment >= 8.

We currently try to push an even number of registers to preserve 8-byte
alignment during a function's prologue, but only when the stack alignment is
prcisely 8. Many of the reasons for doing it apply also when that alignment > 8
(the extra store is often free, and can save another stack adjustment, though
less frequently for 16-byte stack alignment).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221321 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM/Dwarf: correctly align stack before callee-saved VPRs
Tim Northover [Wed, 5 Nov 2014 00:27:13 +0000 (00:27 +0000)]
ARM/Dwarf: correctly align stack before callee-saved VPRs

We were making an attempt to do this by adding an extra callee-saved GPR (so
that there was an even number in the list), but when that failed we went ahead
and pushed anyway.

This had a couple of potential issues:
  + The .cfi directives we emit misplaced dN because they were based on
    PrologEpilogInserter's calculation.
  + Unaligned stores can be less efficient.
  + Unaligned stores can actually fault (likely only an issue in niche cases,
    but possible).

This adds a final explicit stack adjustment if all other options fail, so that
the actual locations of the registers match up with where they should be.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221320 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAnalysis: Make isSafeToSpeculativelyExecute fire less for divides
David Majnemer [Tue, 4 Nov 2014 23:49:08 +0000 (23:49 +0000)]
Analysis: Make isSafeToSpeculativelyExecute fire less for divides

Divides and remainder operations do not behave like other operations
when they are given poison: they turn into undefined behavior.

It's really hard to know if the operands going into a div are or are not
poison.  Because of this, we should only choose to speculate if there
are constant operands which we can easily reason about.

This fixes PR21412.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221318 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[Reassociate] Canonicalize negative constants out of expressions."
Reid Kleckner [Tue, 4 Nov 2014 23:42:45 +0000 (23:42 +0000)]
Revert "[Reassociate] Canonicalize negative constants out of expressions."

This reverts commit r221171.

It performs this invalid transformation:
-  %div.i = urem i64 -1, %add
-  %sub.i = sub i64 -2, %div.i
+  %div.i = urem i64 1, %add
+  %sub.i1 = add i64 %div.i, -2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221317 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Enable commutation for SSE immediate blend instructions
Simon Pilgrim [Tue, 4 Nov 2014 23:25:08 +0000 (23:25 +0000)]
[X86][SSE] Enable commutation for SSE immediate blend instructions

Patch to allow (v)blendps, (v)blendpd, (v)pblendw and vpblendd instructions to be commuted - swaps the src registers and inverts the blend mask.

This is primarily to improve memory folding (see new tests), but it also improves the quality of shuffles (see modified tests).

Differential Revision: http://reviews.llvm.org/D6015

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221313 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert earlier change removing setPreservesCFG from instcombine (r221223) and
Mark Heffernan [Tue, 4 Nov 2014 23:02:09 +0000 (23:02 +0000)]
Revert earlier change removing setPreservesCFG from instcombine (r221223) and
change LoopSimplifyPass to be !isCFGOnly.  The motivation for the earlier patch
(r221223) was that LoopSimplify is not preserved by instcombine though
setPreservesCFG indicates that it is.  This change fixes the issue
by making setPreservesCFG no longer imply LoopSimplifyPass, and is therefore less

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221311 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Use the correct register class for ORR.
Juergen Ributzka [Tue, 4 Nov 2014 22:20:07 +0000 (22:20 +0000)]
[AArch64] Use the correct register class for ORR.

While fixing up the register classes in the machine combiner in a previous
commit I missed one.

This fixes the last one and adds a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221308 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[mips] Add names and tests for the hardware registers"
Rafael Espindola [Tue, 4 Nov 2014 22:15:05 +0000 (22:15 +0000)]
Revert "[mips] Add names and tests for the hardware registers"

This reverts commit r221299.

The tests

    LLVM :: MC/Disassembler/Mips/mips32.txt
    LLVM :: MC/Disassembler/Mips/mips32_le.txt

were failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221307 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoProvide gmlt-like inline scope information in the skeleton CU to facilitate symbolica...
David Blaikie [Tue, 4 Nov 2014 22:12:25 +0000 (22:12 +0000)]
Provide gmlt-like inline scope information in the skeleton CU to facilitate symbolication without needing the .dwo files

Clang -gsplit-dwarf self-host -O0, binary increases by 0.0005%, -O2,
binary increases by 25%.

A large binary inside Google, split-dwarf, -O0, and other internal flags
(GDB index, etc) increases by 1.8%, optimized build is 35%.

The size impact may be somewhat greater in .o files (I haven't measured
that much - since the linked executable -O0 numbers seemed low enough)
due to relocations. These relocations could be removed if we taught the
llvm-symbolizer to handle indexed addressing in the .o file (GDB can't
cope with this just yet, but GDB won't be reading this info anyway).
Also debug_ranges could be shared between .o and .dwo, though ideally
debug_ranges would get a schema that could used index(+offset)
addressing, and move to the .dwo file, then we'd be back to sharing
addresses in the address pool again.

But for now, these sizes seem small enough to go ahead with this.

Verified that no other DW_TAGs are produced into the .o file other than
subprograms and inlined_subroutines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221306 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove cross-unit DIE caching to the DwarfFile level, so it doesn't interfere with...
David Blaikie [Tue, 4 Nov 2014 22:12:18 +0000 (22:12 +0000)]
Move cross-unit DIE caching to the DwarfFile level, so it doesn't interfere with fission-gmlt data and produce skeleton<>full unit cross referencing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221305 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't produce relocations for a difference in a section with no symbols.
Rafael Espindola [Tue, 4 Nov 2014 22:10:33 +0000 (22:10 +0000)]
Don't produce relocations for a difference in a section with no symbols.

We were producing a relocation for
.section foo,bar
 .long   La-Lb

but not for

  .section foo,bar
 .long   La-Lb

This patch handles the case where both fragments are part of the first atom
in a section and there is no corresponding symbol to that atom.

This fixes pr21328.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221304 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Move COP2 & COP3 load/store instructions from MipsInstrFPU.td to MipsInstrInfo...
Vasileios Kalintiris [Tue, 4 Nov 2014 21:45:16 +0000 (21:45 +0000)]
[mips] Move COP2 & COP3 load/store instructions from MipsInstrFPU.td to MipsInstrInfo.td. NFC.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221300 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Add names and tests for the hardware registers
Vasileios Kalintiris [Tue, 4 Nov 2014 21:30:44 +0000 (21:30 +0000)]
[mips] Add names and tests for the hardware registers

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221299 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add 'FeatureSlowSHLD' to cpu 'bdver3'. Also explicit set FeatureAVX and Feature...
Andrea Di Biagio [Tue, 4 Nov 2014 21:18:09 +0000 (21:18 +0000)]
[X86] Add 'FeatureSlowSHLD' to cpu 'bdver3'. Also explicit set FeatureAVX and FeatureSSE4A for all the bdver* cpus.

This patch adds 'FeatureSlowSHLD' to 'bdver3'.
According to the official AMD optimization guide for amdfam15: "Using
alternative code in place of SHLD achieves lower overall latency and
requires fewer execution resources. The 32-bit and 64-bit forms of
ADD, ADC, SHR, and LEA (except 16-bit form) are DirectPath
instructions, while SHLD is a VectorPath instruction."

This patch also explicitly sets feature AVX and SSE4A for all the bdver*
cpus. This part of the patch is a non-functional change and it is mainly
done for clarity reasons (Both XOP and FMA4 already imply AVX and SSE4A).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221296 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoErrorOr: Be more explicit in the implicit conversion to bool docs
Justin Bogner [Tue, 4 Nov 2014 21:01:48 +0000 (21:01 +0000)]
ErrorOr: Be more explicit in the implicit conversion to bool docs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221295 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PBQP] Callee saved regs should have a higher cost than scratch regs
Arnaud A. de Grandmaison [Tue, 4 Nov 2014 20:51:29 +0000 (20:51 +0000)]
[PBQP] Callee saved regs should have a higher cost than scratch regs

Registers are not all equal. Some are not allocatable (infinite cost),
some have to be preserved but can be used, and some others are just free
to use.

Ensure there is a cost hierarchy reflecting this fact, so that the
allocator will favor scratch registers over callee-saved registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221293 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PBQP] Tweak spill costs and coalescing benefits
Arnaud A. de Grandmaison [Tue, 4 Nov 2014 20:51:24 +0000 (20:51 +0000)]
[PBQP] Tweak spill costs and coalescing benefits

This patch improves how the different costs (register, interference, spill
and coalescing) relates together. The assumption is now that:
 - coalescing (or any other "side effect" of reg alloc) is negative, and
   instead of being derived from a spill cost, they use the block
   frequency info.
 - spill costs are in the [MinSpillCost:+inf( range
 - register or interference costs are in [0.0:MinSpillCost( or +inf

The current MinSpillCost is set to 10.0, which is a random value high
enough that the current constraint builders do not need to worry about
when settings costs. It would however be worth adding a normalization
step for register and interference costs as the last step in the
constraint builder chain to ensure they are not greater than SpillMinCost
(unless this has some sense for some architectures). This would work well
with the current builder pipeline, where all costs are tweaked relatively
to each others, but could grow above MinSpillCost if the pipeline is
deep enough.

The current heuristic is tuned to depend rather on the number of uses of
a live interval rather than a density of uses, as used by the greedy
allocator. This heuristic provides a few percent improvement on a number
of benchmarks (eembc, spec, ...) and will definitely need to change once
spill placement is implemented: the current spill placement is really
ineficient, so making the cost proportionnal to the number of use is a
clear win.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221292 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Rename div_scale dest operands to match documentation
Matt Arsenault [Tue, 4 Nov 2014 20:29:20 +0000 (20:29 +0000)]
R600/SI: Rename div_scale dest operands to match documentation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221291 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Pattern match integer vector abs like we do on ARM.
Benjamin Kramer [Tue, 4 Nov 2014 20:10:06 +0000 (20:10 +0000)]
AArch64: Pattern match integer vector abs like we do on ARM.

This kind of pattern is emitted by the loop vectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221289 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[asan] [mips] changed ShadowOffset32 for systems having 16kb PageSize; patch by Kumar...
Kostya Serebryany [Tue, 4 Nov 2014 19:46:15 +0000 (19:46 +0000)]
[asan] [mips] changed ShadowOffset32 for systems having 16kb PageSize; patch by Kumar Sukhani

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221288 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused DisableRedZone option.
Rafael Espindola [Tue, 4 Nov 2014 18:18:52 +0000 (18:18 +0000)]
Remove unused DisableRedZone option.

Patch by Steve King.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221282 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstSimplify: Fold a hasNoSignedWrap() call into a match() expression
David Majnemer [Tue, 4 Nov 2014 17:47:13 +0000 (17:47 +0000)]
InstSimplify: Fold a hasNoSignedWrap() call into a match() expression

No functionality change intended, it's just a little more concise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221281 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstSimplify: Fold a hasNoUnsignedWrap() call into a match() expression
David Majnemer [Tue, 4 Nov 2014 17:38:50 +0000 (17:38 +0000)]
InstSimplify: Fold a hasNoUnsignedWrap() call into a match() expression

No functionality change intended, it's just a little more concise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221280 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Improve support for the .set mips16/nomips16 assembler directives.
Toma Tabacu [Tue, 4 Nov 2014 17:18:07 +0000 (17:18 +0000)]
[mips] Improve support for the .set mips16/nomips16 assembler directives.

Appropriately set/clear the FeatureBit for Mips16 when these assembler directives are used and also emit ".set nomips16" (previously, only ".set mips16" was being emitted).

These improvements allow for better testing of the .cpload/.cprestore assembler directives (which are not supposed to work when Mips16 is enabled).

Test Plan: The test is bare-bones because there are no MC tests for Mips16 instructions (there's only one, which checks that the Mips16 ELF header flag gets set), and that suggests to me that it has not been implemented yet in the IAS.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5462

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221277 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Stackmaps] Make test less fragile. NFC.
Juergen Ributzka [Tue, 4 Nov 2014 17:11:00 +0000 (17:11 +0000)]
[Stackmaps] Make test less fragile. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221276 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove function names from comments; NFC
Sanjay Patel [Tue, 4 Nov 2014 16:27:42 +0000 (16:27 +0000)]
remove function names from comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221274 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo in comment
Sanjay Patel [Tue, 4 Nov 2014 16:09:50 +0000 (16:09 +0000)]
fix typo in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221273 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisable 3 tests in llvm/test/Transforms/GCOVProfiling/ for now. Investigating.
NAKAMURA Takumi [Tue, 4 Nov 2014 14:41:53 +0000 (14:41 +0000)]
Disable 3 tests in llvm/test/Transforms/GCOVProfiling/ for now. Investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221270 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove "REQUIRES:shell" from tests. They work for me.
NAKAMURA Takumi [Tue, 4 Nov 2014 13:41:33 +0000 (13:41 +0000)]
Remove "REQUIRES:shell" from tests. They work for me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221269 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[yaml2obj] Allow yaml2obj tool to recognize EF_MIPS_NAN2008 flag
Simon Atanasyan [Tue, 4 Nov 2014 13:33:36 +0000 (13:33 +0000)]
[yaml2obj] Allow yaml2obj tool to recognize EF_MIPS_NAN2008 flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221268 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-enable tests in llvm/test/Object, corresponding to line_iterator's
NAKAMURA Takumi [Tue, 4 Nov 2014 13:19:29 +0000 (13:19 +0000)]
Re-enable tests in llvm/test/Object, corresponding to line_iterator's
change in r221153.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221265 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm/test/Transforms/GCOVProfiling/linezero.ll: Use %/T instead of %T in regex. This...
NAKAMURA Takumi [Tue, 4 Nov 2014 13:00:48 +0000 (13:00 +0000)]
llvm/test/Transforms/GCOVProfiling/linezero.ll: Use %/T instead of %T in regex. This works on win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221262 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove FindProgramByName. NFC.
Rafael Espindola [Tue, 4 Nov 2014 12:35:47 +0000 (12:35 +0000)]
Remove FindProgramByName. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221258 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix Visual C++ warning, Program.inc(85): warning C4018: '<' : signed/unsigned mismatch.
Yaron Keren [Tue, 4 Nov 2014 09:22:41 +0000 (09:22 +0000)]
Fix Visual C++ warning, Program.inc(85): warning C4018: '<' : signed/unsigned mismatch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221252 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd missing tests for build attribute encodings in object files.
Charlie Turner [Tue, 4 Nov 2014 09:07:40 +0000 (09:07 +0000)]
Add missing tests for build attribute encodings in object files.

test/MC/ARM/directive-eabi_attribute.s was missing several tests of object file
encodings relative to the existing tests for assembly file encodings. This
commit adds the missing tests.

Change-Id: Ie110ca02b65e8f4d4c77f437bd09d03607fa5c0d

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221250 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-objdump: Pass DiceTableEntry by reference
David Majnemer [Tue, 4 Nov 2014 08:41:48 +0000 (08:41 +0000)]
llvm-objdump: Pass DiceTableEntry by reference

DiceTableEntry is 24 bytes on my machine, it's probably better to pass
them by reference.

This fixes PR21464.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221247 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agosys::findProgramByName(): [Win32] Tweak to pass lowercase .exe to SearchPath() to...
NAKAMURA Takumi [Tue, 4 Nov 2014 08:17:15 +0000 (08:17 +0000)]
sys::findProgramByName(): [Win32] Tweak to pass lowercase .exe to SearchPath() to appease clang Driver's tests.

It seems SearchPath() doesn't show actual extension on the filesystem.

FIXME: Shall we use FindFirstFile() here?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221246 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: Enable DWARF emission for MS ABI targets
David Majnemer [Tue, 4 Nov 2014 08:03:31 +0000 (08:03 +0000)]
CodeGen: Enable DWARF emission for MS ABI targets

This is experimental, just barely enough to get things to not
immediately combust.

A note for those who are curious:
Only lld can successfully link the object files, other linkers truncate
the section names making the debug sections illegible to debuggers.

Even with this in mind, we believe we are having trouble with SECREL

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221245 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago#include <winbase.h> is not enough for Visual C++ 2013, it errors:
Yaron Keren [Tue, 4 Nov 2014 07:53:30 +0000 (07:53 +0000)]
#include <winbase.h> is not enough for Visual C++ 2013, it errors:

1>C:\Program Files (x86)\Windows Kits\8.1\Include\um\minwinbase.h(46):
error C2146: syntax error : missing ';' before identifier 'nLength'
1>C:\Program Files (x86)\Windows Kits\8.1\Include\um\minwinbase.h(46):
error C4430: missing type specifier - int assumed. Note: C++ does not support default-int

including <windows.h> is actually required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221244 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agotest: Restore llvm-lit (at least for my machine)
David Majnemer [Tue, 4 Nov 2014 05:54:50 +0000 (05:54 +0000)]
test: Restore llvm-lit (at least for my machine)

r221137 feeds None into os.path.join which is not valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221242 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMinimize test case further
David Majnemer [Tue, 4 Nov 2014 05:17:58 +0000 (05:17 +0000)]
Minimize test case further

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221237 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/LLVMBuild.txt: Add TransformUtils.
NAKAMURA Takumi [Tue, 4 Nov 2014 02:16:53 +0000 (02:16 +0000)]
R600/LLVMBuild.txt: Add TransformUtils.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221228 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDocs: give binutils/gold instructions for CMake too.
Tim Northover [Tue, 4 Nov 2014 02:16:03 +0000 (02:16 +0000)]
Docs: give binutils/gold instructions for CMake too.

Patch by Steve King.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221227 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Transforms: reapply SVN r219899"
Reid Kleckner [Tue, 4 Nov 2014 02:02:14 +0000 (02:02 +0000)]
Revert "Transforms: reapply SVN r219899"

This reverts commit r220811 and r220839. It made an incorrect change to
musttail handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221226 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove setPreservesCFG from instcombine. The pass, in particular, does not
Mark Heffernan [Tue, 4 Nov 2014 01:51:01 +0000 (01:51 +0000)]
Remove setPreservesCFG from instcombine.  The pass, in particular, does not
preserve LoopSimplify because instcombine may replace branch predicates
with undef which loop simplify then replaces with always exit.  Replace
setPreservesCFG with the more constrained preservation of DomTree and

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221223 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse findProgramByName.
Michael J. Spencer [Tue, 4 Nov 2014 01:29:59 +0000 (01:29 +0000)]
Use findProgramByName.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221221 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support][Program] Add findProgramByName(Name, OptionalPaths)
Michael J. Spencer [Tue, 4 Nov 2014 01:29:29 +0000 (01:29 +0000)]
[Support][Program] Add findProgramByName(Name, OptionalPaths)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221220 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse the LLVM_GNUC_PREREQ macro instead of the longhand version check
Reid Kleckner [Tue, 4 Nov 2014 01:28:33 +0000 (01:28 +0000)]
Use the LLVM_GNUC_PREREQ macro instead of the longhand version check

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221219 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the END_WITH_NULL macro now that Clang doesn't use it
Reid Kleckner [Tue, 4 Nov 2014 01:15:53 +0000 (01:15 +0000)]
Remove the END_WITH_NULL macro now that Clang doesn't use it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221218 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the static version of getScatteredRelocationType() now that r221211 added
Kevin Enderby [Tue, 4 Nov 2014 01:12:39 +0000 (01:12 +0000)]
Remove the static version of getScatteredRelocationType() now that r221211 added
a public version MachOObjectFile::getScatteredRelocationType().

This should fix the build bot for the unused function error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221216 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRename END_WITH_NULL to LLVM_END_WITH_NULL and move to Compiler.h
Reid Kleckner [Tue, 4 Nov 2014 01:12:21 +0000 (01:12 +0000)]
Rename END_WITH_NULL to LLVM_END_WITH_NULL and move to Compiler.h

We shouldn't put this kind of attribute stuff in DataTypes.h.

Leave the END_WITH_NULL name for now so I can update clang without
making build spam.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221215 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe patchpoint lowering logic would crash with live constants equal to
Sanjoy Das [Tue, 4 Nov 2014 00:59:21 +0000 (00:59 +0000)]
The patchpoint lowering logic would crash with live constants equal to
the tombstone or empty keys of a DenseMap<int64_t, T>.  This patch
fixes the issue (and adds a tests case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221214 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd the code and test cases for 32-bit Intel to llvm-objdump’s Mach-O symbolizer.
Kevin Enderby [Tue, 4 Nov 2014 00:43:16 +0000 (00:43 +0000)]
Add the code and test cases for 32-bit Intel to llvm-objdump’s Mach-O symbolizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221211 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Reverting 220584 to address ASAN errors.
Colin LeMahieu [Tue, 4 Nov 2014 00:14:36 +0000 (00:14 +0000)]
[Hexagon] Reverting 220584 to address ASAN errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221210 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoChange logic in StackMaps::recordStackMapOpers to use the isInt<32>
Sanjoy Das [Tue, 4 Nov 2014 00:06:57 +0000 (00:06 +0000)]
Change logic in StackMaps::recordStackMapOpers to use the isInt<32>
predicate instead of bitwise operations.

This is not a functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221209 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRename variables to conform to llvm coding standards.
Akira Hatanaka [Mon, 3 Nov 2014 23:24:10 +0000 (23:24 +0000)]
Rename variables to conform to llvm coding standards.

Differential Revision: http://reviews.llvm.org/D6062

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221204 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse AA in LoadCombine
Hal Finkel [Mon, 3 Nov 2014 23:19:16 +0000 (23:19 +0000)]
Use AA in LoadCombine

LoadCombine can be smarter about aborting when a writing instruction is
encountered, instead of aborting upon encountering any writing instruction, use
an AliasSetTracker, and only abort when encountering some write that might
alias with the loads that could potentially be combined.

This was originally motivated by comments made (and a test case provided) by
David Majnemer in response to PR21448. It turned out that LoadCombine was not
responsible for that PR, but LoadCombine should also be improved so that
unrelated stores (and @llvm.assume) don't interrupt load combining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221203 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse common range handling for the CU's ranges
David Blaikie [Mon, 3 Nov 2014 23:10:59 +0000 (23:10 +0000)]
Use common range handling for the CU's ranges

This generalizes the range handling for ranges in both the skeleton and
full unit, laying the foundation for the addition of more ranges (rather
than just the CU's special case) in the skeleton CU with fission+gmlt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221202 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Make function processLogicalImmediate more efficient. NFC.
Akira Hatanaka [Mon, 3 Nov 2014 23:06:31 +0000 (23:06 +0000)]
[AArch64] Make function processLogicalImmediate more efficient. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221199 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHandle ASAN_OPTIONS and UBSAN_OPTIONS in TestingConfig.py
Rafael Espindola [Mon, 3 Nov 2014 23:04:56 +0000 (23:04 +0000)]
Handle ASAN_OPTIONS and UBSAN_OPTIONS in TestingConfig.py

Currently they are passed to tests of llvm itself, but not, for example, lld.

With this patch the options are visible in every test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221198 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agorefactor duplicated code. NFC.
Rafael Espindola [Mon, 3 Nov 2014 22:17:49 +0000 (22:17 +0000)]
refactor duplicated code. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221191 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Remove infinite loop caused by FoldOpIntoPhi
David Majnemer [Mon, 3 Nov 2014 21:55:12 +0000 (21:55 +0000)]
InstCombine: Remove infinite loop caused by FoldOpIntoPhi

FoldOpIntoPhi could create an infinite loop if the PHI could potentially
reach a BB it was considering inserting instructions into.  The
instructions it would insert would eventually lead to other combines
firing which would, again, lead to FoldOpIntoPhi firing.

The solution is to handicap FoldOpIntoPhi so that it doesn't attempt to
insert instructions that the PHI might reach.

This fixes PR21377.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221187 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPush the CURangeList down into the skeleton CU (where available) rather than the...
David Blaikie [Mon, 3 Nov 2014 21:52:56 +0000 (21:52 +0000)]
Push the CURangeList down into the skeleton CU (where available) rather than the full CU

So that it may be shared between skeleton/full compile unit, for CU
ranges and other ranges to be added for fission+gmlt.

(at some point we might want some kind of object shared between the
skeleton and full compile units for all those things we only want one of
in that scope, rather than having the full unit always look through to
the skeleton... - alternatively, we might be able to have the skeleton
pointer (or another, separate pointer) point to the skeleton or to the
unit itself in non-fission, so we don't have to special case its

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221186 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add debug print name for X86ISD::[US]MUL8. NFC-ish.
Ahmed Bougacha [Mon, 3 Nov 2014 21:25:18 +0000 (21:25 +0000)]
[X86] Add debug print name for X86ISD::[US]MUL8. NFC-ish.

The opcodes were added in r220516, but I forgot to add the print names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221185 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[lit] Forward LD_PRELOAD to tests.
Rafael Espindola [Mon, 3 Nov 2014 21:24:43 +0000 (21:24 +0000)]
[lit] Forward LD_PRELOAD to tests.

With this patch I can use asan to test the gold plugin without having
to build gold itself with asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221183 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd DwarfCompileUnit::BaseAddress to track the base address used by relative addressi...
David Blaikie [Mon, 3 Nov 2014 21:15:30 +0000 (21:15 +0000)]
Add DwarfCompileUnit::BaseAddress to track the base address used by relative addressing in debug_ranges and debug_loc

This is one of a few steps to generalize range handling to include the
CU range (thus the CU's range list will be moved into the range list
list, losing track of the base address in the process), which means
generalizing ranges from both the skeleton and full unit under fission.

And... then I can used that generalized support for ranges in
fission+gmlt where there'll be a bunch more ranges in the skeleton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221182 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM, inline-asm] Fix ARMTargetLowering::getRegForInlineAsmConstraint to return
Akira Hatanaka [Mon, 3 Nov 2014 20:37:04 +0000 (20:37 +0000)]
[ARM, inline-asm] Fix ARMTargetLowering::getRegForInlineAsmConstraint to return
register class tGPRRegClass if the target is thumb1.

This commit fixes a crash that occurs during register allocation which was
triggered when a virtual register defined by an inline-asm instruction had to
be spilled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221178 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMSVC requires redeclarations to repeat noexcept
Reid Kleckner [Mon, 3 Nov 2014 20:35:30 +0000 (20:35 +0000)]
MSVC requires redeclarations to repeat noexcept

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221177 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] 8bit divrem: Improve codegen for AH register extraction.
Ahmed Bougacha [Mon, 3 Nov 2014 20:26:35 +0000 (20:26 +0000)]
[X86] 8bit divrem: Improve codegen for AH register extraction.

For 8-bit divrems where the remainder is used, we used to generate:
    divb  %sil
    shrw  $8, %ax
    movzbl  %al, %eax

That was to avoid an H-reg access, which is problematic mainly because
it isn't possible in REX-prefixed instructions.

This patch optimizes that to:
    divb  %sil
    movzbl  %ah, %eax

To do that, we explicitly extend AH, and extract the L-subreg in the
resulting register.  The extension is done using the NOREX variants of
MOVZX.  To support signed operations, MOVSX_NOREX is also added.
Further, this introduces a new SDNode type, [us]divrem_ext_hreg, which is
then lowered to a sequence containing a single zext (rather than 2).

Differential Revision: http://reviews.llvm.org/D6064

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221176 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEarlyCSE should ignore calls to @llvm.assume
Hal Finkel [Mon, 3 Nov 2014 20:21:32 +0000 (20:21 +0000)]
EarlyCSE should ignore calls to @llvm.assume

EarlyCSE uses a simple generation scheme for handling memory-based
dependencies, and calls to @llvm.assume (which are marked as writing to memory
to ensure the preservation of control dependencies) disturb that scheme
unnecessarily. Skipping calls to @llvm.assume is legal, and the alternative
(adding AA calls in EarlyCSE) is likely undesirable (we have GVN for that).

Fixes PR21448.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221175 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply: R600: Make sure to inline all internal functions
Tom Stellard [Mon, 3 Nov 2014 19:49:05 +0000 (19:49 +0000)]
Reapply: R600: Make sure to inline all internal functions

Function calls aren't supported yet.

This was reverted due to build breakages, which should be fixed now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221173 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Reassociate] Canonicalize negative constants out of expressions.
Chad Rosier [Mon, 3 Nov 2014 19:11:30 +0000 (19:11 +0000)]
[Reassociate] Canonicalize negative constants out of expressions.

This gives CSE/GVN more options to eliminate duplicate expressions.
This is a follow up patch to http://reviews.llvm.org/D4904.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221171 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRelax the LLVM_NOEXCEPT _MSC_VER version check back to 1900
Reid Kleckner [Mon, 3 Nov 2014 18:22:42 +0000 (18:22 +0000)]
Relax the LLVM_NOEXCEPT _MSC_VER version check back to 1900

Unconditional noexcept support was added in the VS 2013 Nov CTP. Given
that there have been three CTPs since then, I don't think we need
careful macro magic to target that specific tech preview. Instead,
target the major release version number of 1900, which corresponds to
the as-yet unreleased VS "14".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221169 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNormally an 'optnone' function goes through fast-isel, which does not
Paul Robinson [Mon, 3 Nov 2014 18:19:26 +0000 (18:19 +0000)]
Normally an 'optnone' function goes through fast-isel, which does not
call DAGCombiner. But we ran into a case (on Windows) where the
calling convention causes argument lowering to bail out of fast-isel,
and we end up in CodeGenAndEmitDAG() which does run DAGCombiner.
So, we need to make DAGCombiner check for 'optnone' after all.

Commit includes the test that found this, plus another one that got
missed in the original optnone work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221168 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: MDNode => Value: Instruction::getAllMetadataOtherThanDebugLoc()
Duncan P. N. Exon Smith [Mon, 3 Nov 2014 18:13:57 +0000 (18:13 +0000)]
IR: MDNode => Value: Instruction::getAllMetadataOtherThanDebugLoc()

Change `Instruction::getAllMetadataOtherThanDebugLoc()` from a vector of
`MDNode` to one of `Value`.  Part of PR21433.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221167 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the cortex-a9-mp CPU.
Charlie Turner [Mon, 3 Nov 2014 17:38:00 +0000 (17:38 +0000)]
Remove the cortex-a9-mp CPU.

This CPU definition is redundant. The Cortex-A9 is defined as
supporting multiprocessing extensions. Remove its definition and
update appropriate tests.

LLVM defines both a cortex-a9 CPU and a cortex-a9-mp CPU. The only
difference between the two CPU definitions in ARM.td is that
cortex-a9-mp contains the feature FeatureMP for multiprocessing

This is redundant since the Cortex-A9 is defined as having
multiprocessing extensions in the TRMs. armcc also defines the
Cortex-A9 as having multiprocessing extensions by default.

Change-Id: Ifcadaa6c322be0a33d9d2a39cfdd7da1d75981a7

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221166 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCleanup some unused or trivial functions in DwarfCompileUnit
David Blaikie [Mon, 3 Nov 2014 17:10:38 +0000 (17:10 +0000)]
Cleanup some unused or trivial functions in DwarfCompileUnit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221164 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSink DwarfUnit::CURanges into DwarfCompileUnit
David Blaikie [Mon, 3 Nov 2014 16:40:43 +0000 (16:40 +0000)]
Sink DwarfUnit::CURanges into DwarfCompileUnit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221161 91177308-0d34-0410-b5e6-96231b3b80d8