9 years agoMake one of the AttributeSet ctors maintain the invariant that the
Peter Collingbourne [Fri, 2 Aug 2013 22:29:40 +0000 (22:29 +0000)]
Make one of the AttributeSet ctors maintain the invariant that the
attribute list is ordered by index.

Differential Revision: http://llvm-reviews.chandlerc.com/D1265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187682 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoOption parsing: recognize the special -- token
Hans Wennborg [Fri, 2 Aug 2013 21:20:27 +0000 (21:20 +0000)]
Option parsing: recognize the special -- token

Everything that comes after -- should be treated as a filename. This
enables passing in filenames that would otherwise be conflated with
command-line options.

This is especially important for clang-cl which supports options
starting with /, which are easily conflatable with Unix-style
path names.

Differential Revision: http://llvm-reviews.chandlerc.com/D1274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187675 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix invalid function pointers in bugpoint ExtractLoops
Hal Finkel [Fri, 2 Aug 2013 21:13:42 +0000 (21:13 +0000)]
Fix invalid function pointers in bugpoint ExtractLoops

The ExtractLoops function tries to reduce the failing test case by extracting
one or more loops from the misoptimized piece of the program. In doing this,
ExtractLoops must keep the MiscompiledFunctions vector up-to-date by ensuring
that the pointers refer to functions in the current failing program.
Unfortunately, this is not trivial because:

 - ExtractLoops is iterative, and there are several early exits (and the
   MiscompiledFunctions vector must be consistent with the current program at
every non-fatal exit point).
 - Several of the utility functions used by ExtractLoops (such as
   TestOptimizer, some of which are called through the TestFn callback
parameter, and Linker::LinkModules) delete their inputs upon success.

This change adds several updates of the MiscompiledFunctions vector at
different points. The first is after the initial call to TestMergedProgram
which checks that the loop-extracted program still works. The second is after
the call to TestFn (TestOptimizer, for example). This function will delete its
inputs (which is why the existing ExtractLoops logic cloned the inputs first).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187674 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a missing 'return' statement.
Joey Gouly [Fri, 2 Aug 2013 20:50:01 +0000 (20:50 +0000)]
Add a missing 'return' statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187671 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Expand vector truncating stores and extending loads.
Akira Hatanaka [Fri, 2 Aug 2013 19:23:33 +0000 (19:23 +0000)]
[mips] Expand vector truncating stores and extending loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187667 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARMv8] Add an assembler warning for the deprecated 'setend' instruction.
Joey Gouly [Fri, 2 Aug 2013 19:18:12 +0000 (19:18 +0000)]
[ARMv8] Add an assembler warning for the deprecated 'setend' instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187666 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSLPVectorizer: Fix PR16777. PHInodes may use multiple extracted values that come...
Nadav Rotem [Fri, 2 Aug 2013 18:40:24 +0000 (18:40 +0000)]
SLPVectorizer: Fix PR16777. PHInodes may use multiple extracted values that come from different blocks.
Thanks Alexey Samsonov.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187663 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTeach EmitGEPOffset about address spaces
Matt Arsenault [Fri, 2 Aug 2013 18:33:34 +0000 (18:33 +0000)]
Teach EmitGEPOffset about address spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187662 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixes ARM LNT bot from SLP change in O3
Renato Golin [Fri, 2 Aug 2013 17:10:04 +0000 (17:10 +0000)]
Fixes ARM LNT bot from SLP change in O3

This patch fixes the multiple breakages on ARM test-suite after the SLP
vectorizer was introduced by default on O3. The problem was an illegal
vector type on ARMTTI::getCmpSelInstrCost() <3 x i1> which is not simple.

The guard protects this code from breaking (cause of the problems) but
doesn't fix the issue that is generating the odd vector in the first
place, which also needs to be investigated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187658 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoBugfix for making the DWARF debug strings and labels to code emitted as secrel32...
Carlo Kok [Fri, 2 Aug 2013 16:14:15 +0000 (16:14 +0000)]
Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB (with fix for 64bits msvc)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187656 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix handling of CHECK-DAG combined with CHECK-NOT
Tim Northover [Fri, 2 Aug 2013 11:32:50 +0000 (11:32 +0000)]
Fix handling of CHECK-DAG combined with CHECK-NOT

Patch by Daniel Sanders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187651 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPacify GCC, which worries about falling off the end of the switch.
Duncan Sands [Fri, 2 Aug 2013 09:37:20 +0000 (09:37 +0000)]
Pacify GCC, which worries about falling off the end of the switch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187649 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix dereferencing end iterator in SimplifyCFG. Patch by Ye Mei.
Alexey Samsonov [Fri, 2 Aug 2013 08:06:43 +0000 (08:06 +0000)]
Fix dereferencing end iterator in SimplifyCFG. Patch by Ye Mei.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187646 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r187597, "Bugfix for making the DWARF debug strings and labels to code emitted...
NAKAMURA Takumi [Fri, 2 Aug 2013 03:46:05 +0000 (03:46 +0000)]
Revert r187597, "Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB."

It broke x86_64-win32 builder in llvm/test/DebugInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187642 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse @rpath for libraries rather than @executable_path on OSX.
Eric Christopher [Fri, 2 Aug 2013 01:51:52 +0000 (01:51 +0000)]
Use @rpath for libraries rather than @executable_path on OSX.

Patch by Benjamin Scarlet!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187641 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTemporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached to
Eric Christopher [Fri, 2 Aug 2013 00:49:44 +0000 (00:49 +0000)]
Temporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached to
instructions." in an attempt to bring back some bots.

This reverts commit r187609.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187638 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTeach InstructionSimplify about pointer address spaces
Matt Arsenault [Fri, 2 Aug 2013 00:10:44 +0000 (00:10 +0000)]
Teach InstructionSimplify about pointer address spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187635 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Make load/store accumulator pseudo instructions codeGenOnly. Also,
Akira Hatanaka [Thu, 1 Aug 2013 23:14:16 +0000 (23:14 +0000)]
[mips] Make load/store accumulator pseudo instructions codeGenOnly. Also,
remove lines that are setting DecoderNamespace for pseudo atomic instructions.

No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187632 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTeach getOrEnforceKnownAlignment about address spaces
Matt Arsenault [Thu, 1 Aug 2013 22:42:18 +0000 (22:42 +0000)]
Teach getOrEnforceKnownAlignment about address spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187629 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove the optlevel check to the frontend.
Nadav Rotem [Thu, 1 Aug 2013 22:41:58 +0000 (22:41 +0000)]
Move the optlevel check to the frontend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187628 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agofix for LLVM debug info on llvm-mips-linux where the label name uses % instead of...
Carlo Kok [Thu, 1 Aug 2013 22:15:34 +0000 (22:15 +0000)]
fix for LLVM debug info on llvm-mips-linux where the label name uses % instead of L as a prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187623 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse function attributes to indicate that we don't want to realign the stack.
Bill Wendling [Thu, 1 Aug 2013 21:42:05 +0000 (21:42 +0000)]
Use function attributes to indicate that we don't want to realign the stack.

Function attributes are the future! So just query whether we want to realign the
stack directly from the function instead of through a random target options

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187618 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoExpose that the unique file ID has a device and a file component.
Rafael Espindola [Thu, 1 Aug 2013 21:36:02 +0000 (21:36 +0000)]
Expose that the unique file ID has a device and a file component.

The use of sd_dev and st_ino has reached libclang, so expose the two components
in UniqueID so that we can use it in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187616 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixed the Intel-syntax X86 disassembler to respect the (existing) option for hexadeci...
Daniel Malea [Thu, 1 Aug 2013 21:18:16 +0000 (21:18 +0000)]
Fixed the Intel-syntax X86 disassembler to respect the (existing) option for hexadecimal immediates, to match AT&T syntax. This also brings a new option for C-vs-MASM-style hex.

Patch by Richard Mitton
Reviewed: http://llvm-reviews.chandlerc.com/D1243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187614 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix some issues with Mips16 floating when certain intrinsics are present.
Reed Kotler [Thu, 1 Aug 2013 21:17:53 +0000 (21:17 +0000)]
Fix some issues with Mips16 floating when certain intrinsics are present.
This is actually an LLVM bug in the way it generates signatures for these
when soft float is enabled. For example, floor ends up having the signature
of int64(int64). The signature part is not the same as where the actual
parameter types are recorded, and those ARE of course int64(int64) when
soft float is enabled. (Yes, Mips16 hard float uses soft float but with
different runtime rounes but then has to interoperate with Mips32 using
normal floating point). This logic will eventually be moved to the
Mips16HardFloat pass so it's not worth sorting out these issues in LLVM
since nobody but Mips16 cares about these signatures, as far as I know,
and even I won't eventually either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187613 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM/Hexagon testcases can't compile x86 only testcase. Reverting change to testcase...
Carlo Kok [Thu, 1 Aug 2013 20:53:57 +0000 (20:53 +0000)]
ARM/Hexagon testcases can't compile x86 only testcase. Reverting change to testcase & fixing check for all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187610 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebug Info Finder|Verifier: handle DbgLoc attached to instructions.
Manman Ren [Thu, 1 Aug 2013 20:52:39 +0000 (20:52 +0000)]
Debug Info Finder|Verifier: handle DbgLoc attached to instructions.

Also remove checking of llvm.dbg.sp since it is not used in generating dwarf.

Current state of Finder:
DebugInfoFinder tries to list all debug info MDNodes used in a module. To
list debug info MDNodes used by an instruction, DebugInfoFinder provides
processDeclare, processValue and processLocation to handle DbgDeclareInst,
DbgValueInst and DbgLoc attached to instructions. processModule will go
through all DICompileUnits in llvm.dbg.cu and list debug info MDNodes
used by the CUs.

1> Finder has a list of CUs, SPs, Types, Scopes and global variables. We
need to add a list of variables that are used by DbgDeclareInst and
2> MDString fields should be null or isa<MDString> and MDNode fields should be
null or isa<MDNode>. We currently use empty string or int 0 to represent null.
3> Go though Verify functions and make sure that they check field types.
4> Clean up existing testing cases to remove llvm.dbg.sp and make sure each
testing case has a llvm.dbg.cu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187609 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Emit definitions for types with no members.
David Blaikie [Thu, 1 Aug 2013 20:30:22 +0000 (20:30 +0000)]
DebugInfo: Emit definitions for types with no members.

The absence of members was a poor/incorrect proxy for "is definition".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187607 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agochange the inlinefnlocalvar testcase so it uses a triple that's not coff (doesn't...
Carlo Kok [Thu, 1 Aug 2013 20:17:37 +0000 (20:17 +0000)]
change the inlinefnlocalvar testcase so it uses a triple that's not coff (doesn't seem to matter for the testcase itself, what it tests isn't triple specific), as coff has a slightly different way of emitting what it checks for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187604 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTemporarily xfail a test that breaks on OS X when building with LTO.
Bob Wilson [Thu, 1 Aug 2013 19:29:26 +0000 (19:29 +0000)]
Temporarily xfail a test that breaks on OS X when building with LTO.

This is another case where internalize hides a symbol that is needed by
a loadable module.  I am currently investigating a proper fix but this patch
will get our buildbot to pass in the meantime. <rdar://problem/14578094>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187601 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate incorrect file headers.
Sean Silva [Thu, 1 Aug 2013 18:42:28 +0000 (18:42 +0000)]
Update incorrect file headers.

One of these was spotted in review by Rafael.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187598 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoBugfix for making the DWARF debug strings and labels to code emitted as secrel32...
Carlo Kok [Thu, 1 Aug 2013 18:38:14 +0000 (18:38 +0000)]
Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB.

fixes Bug 16249 - LLVM generates broken debug info on Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187597 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoOnly enable SLP-vectorization on O3 builds.
Nadav Rotem [Thu, 1 Aug 2013 18:28:15 +0000 (18:28 +0000)]
Only enable SLP-vectorization on O3 builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187595 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPass -G argument to cmake with the same generator's name as used for the
Simon Atanasyan [Thu, 1 Aug 2013 18:04:07 +0000 (18:04 +0000)]
Pass -G argument to cmake with the same generator's name as used for the
initial cmake invocation.

Patch reviewed by Reid Kleckner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187591 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoremove executable permission from IntrinsicsXCore.td
Robert Lytton [Thu, 1 Aug 2013 17:17:59 +0000 (17:17 +0000)]
remove executable permission from IntrinsicsXCore.td

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187584 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Add 64-bit float load/store support
Tom Stellard [Thu, 1 Aug 2013 15:23:42 +0000 (15:23 +0000)]
R600: Add 64-bit float load/store support

* Added R600_Reg64 class
* Added T#Index#.XY registers definition
* Added v2i32 register reads from parameter and global space
* Added f32 and i32 elements extraction from v2f32 and v2i32
* Added v2i32 -> v2f32 conversions

Tom Stellard:
  - Mark vec2 operations as expand.  The addition of a vec2 register
    class made them all legal.

Patch by: Dmitry Cherkassov

Signed-off-by: Dmitry Cherkassov <dcherkassov@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187582 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Use 64-bit alignment for 64-bit kernel arguments
Tom Stellard [Thu, 1 Aug 2013 15:23:31 +0000 (15:23 +0000)]
R600: Use 64-bit alignment for 64-bit kernel arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187581 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Custom lower i64 ZERO_EXTEND
Tom Stellard [Thu, 1 Aug 2013 15:23:26 +0000 (15:23 +0000)]
R600/SI: Custom lower i64 ZERO_EXTEND

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187580 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoEVEX and compressed displacement encoding for AVX512
Elena Demikhovsky [Thu, 1 Aug 2013 13:34:06 +0000 (13:34 +0000)]
EVEX and compressed displacement encoding for AVX512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187576 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Reuse CC results for integer comparisons with zero
Richard Sandiford [Thu, 1 Aug 2013 10:39:40 +0000 (10:39 +0000)]
[SystemZ] Reuse CC results for integer comparisons with zero

This also fixes a bug in the predication of LR to LOCR: I'd forgotten
that with these in-place instruction builds, the implicit operands need
to be added manually.  I think this was latent until now, but is tested
by int-cmp-45.c.  It also adds a CC valid mask to STOC, again tested by

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187573 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Prefer comparisons with zero
Richard Sandiford [Thu, 1 Aug 2013 10:29:45 +0000 (10:29 +0000)]
[SystemZ] Prefer comparisons with zero

Convert >= 1 to > 0, etc.  Using comparison with zero isn't a win on its own,
but it exposes more opportunities for CC reuse (the next patch).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187571 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd tests for Mips DSP instructions.
Vladimir Medic [Thu, 1 Aug 2013 09:35:25 +0000 (09:35 +0000)]
Add tests for Mips DSP instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187570 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMoving definition of MnemonicContainsDot field from class Instruction to class AsmPar...
Vladimir Medic [Thu, 1 Aug 2013 09:25:27 +0000 (09:25 +0000)]
Moving definition of MnemonicContainsDot field from class Instruction to class AsmParser as suggested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187569 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAArch64: add initial NEON support
Tim Northover [Thu, 1 Aug 2013 09:20:35 +0000 (09:20 +0000)]
AArch64: add initial NEON support

Patch by Ana Pazos.

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoXCore target: add GCCBuiltin to four intrinsics
Robert Lytton [Thu, 1 Aug 2013 08:41:32 +0000 (08:41 +0000)]
XCore target: add GCCBuiltin to four intrinsics

The following are made available by clang in the XCore ABI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187566 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoXCore target: Fix Vararg handling
Robert Lytton [Thu, 1 Aug 2013 08:29:44 +0000 (08:29 +0000)]
XCore target: Fix Vararg handling

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187565 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoXCore target: Add byval handling
Robert Lytton [Thu, 1 Aug 2013 08:18:55 +0000 (08:18 +0000)]
XCore target: Add byval handling

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187563 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoXcore target
Robert Lytton [Thu, 1 Aug 2013 07:52:05 +0000 (07:52 +0000)]
Xcore target
Fix emitArrayBound() calling OutStreamer.Emit*() multiple times when trying to print a single line

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187562 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix some misc. issues with Mips16 fp stubs.
Reed Kotler [Thu, 1 Aug 2013 02:26:31 +0000 (02:26 +0000)]
Fix some misc. issues with Mips16 fp stubs.
1) They should never be inlined.
2) A naming inconsistency with gcc mips16
3) Stubs should not have the global attribute

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187555 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFormatting.
Eric Christopher [Thu, 1 Aug 2013 01:38:16 +0000 (01:38 +0000)]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187554 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd an omitted IsCall=1.
Reed Kotler [Thu, 1 Aug 2013 00:59:06 +0000 (00:59 +0000)]
Add an omitted IsCall=1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187553 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoOption parsing: remove non-SUPPORT_ALIASARGS fall-back
Hans Wennborg [Wed, 31 Jul 2013 23:28:51 +0000 (23:28 +0000)]
Option parsing: remove non-SUPPORT_ALIASARGS fall-back

The clients of this code have been updated to all support AliasArgs.

This depends on Clang r187538 and lld r187541.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187546 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoOption parsing: add support for alias arguments.
Hans Wennborg [Wed, 31 Jul 2013 22:44:41 +0000 (22:44 +0000)]
Option parsing: add support for alias arguments.

This makes option aliases more powerful by enabling them to
pass along arguments to the option they're aliasing.

For example, if we have a joined option "-foo=", we can now
specify a flag option "-bar" to be an alias of that, with the
argument "baz".

This is especially useful for the cl.exe compatible clang driver,
where many options are aliases. For example, this patch enables
us to alias "/Ox" to "-O3" (-O is a joined option), and "/WX" to
"-Werror" (again, -W is a joined option).

Differential Revision: http://llvm-reviews.chandlerc.com/D1245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187537 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago80-col
Nadav Rotem [Wed, 31 Jul 2013 22:17:45 +0000 (22:17 +0000)]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187535 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agocomment typo.
Andrew Trick [Wed, 31 Jul 2013 21:05:54 +0000 (21:05 +0000)]
comment typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187531 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdded the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.
Kevin Enderby [Wed, 31 Jul 2013 21:05:30 +0000 (21:05 +0000)]
Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.
While the .td entry is nice and all, it takes a pretty gross hack in
ARMAsmParser::ParseInstruction() because of handling of other "subs"
instructions to get it to match.  Ran it by Jim Grosbach and he said it was
about what he expected to make this work given the existing code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187530 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "R600: Non vector only instruction can be scheduled on trans unit"
Tom Stellard [Wed, 31 Jul 2013 20:43:27 +0000 (20:43 +0000)]
Revert "R600: Non vector only instruction can be scheduled on trans unit"

This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "TableGen: Enumerate Schedule Model too."
Tom Stellard [Wed, 31 Jul 2013 20:43:08 +0000 (20:43 +0000)]
Revert "TableGen: Enumerate Schedule Model too."

This reverts commit 2ca1e4a39c7e0d7a00e66ff5437c6d7ace2404a0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187525 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"
Tom Stellard [Wed, 31 Jul 2013 20:43:03 +0000 (20:43 +0000)]
Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"

This reverts commit 3f1de26cb5cc0543a6a1d71259a7a39d97139051.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187524 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Do not mergevector after a vector reg is used
Vincent Lejeune [Wed, 31 Jul 2013 19:32:12 +0000 (19:32 +0000)]
R600: Do not mergevector after a vector reg is used

If we merge vector when a vector is used, it will generate an artificial
antidependency that can prevent 2 tex/vtx instructions to use the same
clause and thus generate extra clauses that reduce performance.

There is no test case as such situation is really hard to predict.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187516 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Avoid more than 4 literals in the same instruction group at scheduling
Vincent Lejeune [Wed, 31 Jul 2013 19:32:07 +0000 (19:32 +0000)]
R600: Avoid more than 4 literals in the same instruction group at scheduling

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187515 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Non vector only instruction can be scheduled on trans unit
Vincent Lejeune [Wed, 31 Jul 2013 19:31:56 +0000 (19:31 +0000)]
R600: Non vector only instruction can be scheduled on trans unit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187514 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Don't mix LDS and non-LDS instructions in the same group
Vincent Lejeune [Wed, 31 Jul 2013 19:31:41 +0000 (19:31 +0000)]
R600: Don't mix LDS and non-LDS instructions in the same group

There are a lot of restrictions on instruction groups that contain
LDS instructions, so for now we will be conservative and not packetize
anything else with them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187513 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Use SchedModel enum for is{Trans,Vector}Only functions
Vincent Lejeune [Wed, 31 Jul 2013 19:31:35 +0000 (19:31 +0000)]
R600: Use SchedModel enum for is{Trans,Vector}Only functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187512 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTableGen: Enumerate Schedule Model too.
Vincent Lejeune [Wed, 31 Jul 2013 19:31:20 +0000 (19:31 +0000)]
TableGen: Enumerate Schedule Model too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187511 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Remove predicated_break inst
Vincent Lejeune [Wed, 31 Jul 2013 19:31:14 +0000 (19:31 +0000)]
R600: Remove predicated_break inst

We were using two instructions for similar purpose : break and
predicated break. Only predicated_break was emitted and it was
lowered at R600ControlFlowFinalizer to JUMP;CF_BREAK;POP.
This commit simplify the situation by making AMDILCFGStructurizer
emit IF_PREDICATE;BREAK;ENDIF; instead of predicated_break (which
is now removed).

There is no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187510 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReject bitcasts between address spaces with different sizes
Matt Arsenault [Wed, 31 Jul 2013 17:49:08 +0000 (17:49 +0000)]
Reject bitcasts between address spaces with different sizes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187506 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Implement isLegalAddressingMode()
Richard Sandiford [Wed, 31 Jul 2013 12:58:26 +0000 (12:58 +0000)]
[SystemZ] Implement isLegalAddressingMode()

The loop optimizers were assuming that scales > 1 were OK.  I think this
is actually a bug in TargetLoweringBase::isLegalAddressingMode(),
since it seems to be trying to reject anything that isn't r+i or r+r,
but it has no default case for scales other than 0, 1 or 2.  Implementing
the hook for z means that z can no longer test any change there though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187497 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Be more careful about inverting CC masks (conditional loads)
Richard Sandiford [Wed, 31 Jul 2013 12:38:08 +0000 (12:38 +0000)]
[SystemZ] Be more careful about inverting CC masks (conditional loads)

Extend r187495 to conditional loads.  I split this out because the
easiest way seemed to be to force a particular operand order in

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187496 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Be more careful about inverting CC masks
Richard Sandiford [Wed, 31 Jul 2013 12:30:20 +0000 (12:30 +0000)]
[SystemZ] Be more careful about inverting CC masks

System z branches have a mask to select which of the 4 CC values should
cause the branch to be taken.  We can invert a branch by inverting the mask.
However, not all instructions can produce all 4 CC values, so inverting
the branch like this can lead to some oddities.  For example, integer
comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater).
If an integer EQ is reversed to NE before instruction selection,
the branch will test for 1 or 2.  If instead the branch is reversed
after instruction selection (by inverting the mask), it will test for
1, 2 or 3.  Both are correct, but the second isn't really canonical.
This patch therefore keeps track of which CC values are possible
and uses this when inverting a mask.

Although this is mostly cosmestic, it fixes undefined behavior
for the CIJNLH in branch-08.ll.  Another fix would have been
to mask out bit 0 when generating the fused compare and branch,
but the point of this patch is that we shouldn't need to do that
in the first place.

The patch also makes it easier to reuse CC results from other instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Move compare-and-branch generation even later
Richard Sandiford [Wed, 31 Jul 2013 12:11:07 +0000 (12:11 +0000)]
[SystemZ] Move compare-and-branch generation even later

r187116 moved compare-and-branch generation from the instruction-selection
pass to the peephole optimizer (via optimizeCompare).  It turns out that even
this is a bit too early.  Fused compare-and-branch instructions don't
interact well with predication, where a CC result is needed.  They also
make it harder to reuse the CC side-effects of earlier instructions
(not yet implemented, but the subject of a later patch).

Another problem was that the AnalyzeBranch family of routines weren't
handling compares and branches, so we weren't able to reverse the fused
form in cases where we would reverse a separate branch.  This could have
been fixed by extending AnalyzeBranch, but given the other problems,
I've instead moved the fusing to the long-branch pass, which is also
responsible for the opposite transformation: splitting out-of-range
compares and branches into separate compares and long branches.

I've added a test for the AnalyzeBranch problem.  A test for the
predication problem is included in the next patch, which fixes a bug
in the choice of CC mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187494 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixed assertion in Extract128BitVector()
Elena Demikhovsky [Wed, 31 Jul 2013 12:03:08 +0000 (12:03 +0000)]
Fixed assertion in Extract128BitVector()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187493 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Postpone NI->RISBG conversion to convertToThreeAddress()
Richard Sandiford [Wed, 31 Jul 2013 11:36:35 +0000 (11:36 +0000)]
[SystemZ] Postpone NI->RISBG conversion to convertToThreeAddress()

r186399 aggressively used the RISBG instruction for immediate ANDs,
both because it can handle some values that AND IMMEDIATE can't,
and because it allows the destination register to be different from
the source.  I realized later while implementing the distinct-ops
support that it would be better to leave the choice up to
convertToThreeAddress() instead.  The AND IMMEDIATE form is shorter
and is less likely to be cracked.

This is a problem for 32-bit ANDs because we assume that all 32-bit
operations will leave the high word untouched, whereas RISBG used in
this way will either clear the high word or copy it from the source
register.  The patch uses the z196 instruction RISBLG for this instead.

This means that z10 will be restricted to NILL, NILH and NILF for
32-bit ANDs, but I think that should be OK for now.  Although we're
using z10 as the base architecture, the optimization work is going
to be focused more on z196 and zEC12.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187492 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdded INSERT and EXTRACT intructions from AVX-512 ISA.
Elena Demikhovsky [Wed, 31 Jul 2013 11:35:14 +0000 (11:35 +0000)]
Added INSERT and EXTRACT intructions from AVX-512 ISA.
All insertf*/extractf* functions replaced with insert/extract since we have insertf and inserti forms.
Added lowering for INSERT_VECTOR_ELT / EXTRACT_VECTOR_ELT for 512-bit vectors.
Added lowering for EXTRACT/INSERT subvector for 512-bit vectors.
Added a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187491 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add RISBLG and RISBHG instruction definitions
Richard Sandiford [Wed, 31 Jul 2013 11:17:35 +0000 (11:17 +0000)]
[SystemZ] Add RISBLG and RISBHG instruction definitions

The next patch will make use of RISBLG for codegen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187490 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd parentheses to silence gcc warning.
Richard Trieu [Wed, 31 Jul 2013 04:07:28 +0000 (04:07 +0000)]
Add parentheses to silence gcc warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187482 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix register pressure tables on ARM.
Andrew Trick [Wed, 31 Jul 2013 03:24:31 +0000 (03:24 +0000)]
Fix register pressure tables on ARM.

The heuristic that merges register pressure sets was bogus for ARM's S/D regs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187479 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd tracing to the tblgen register pressure table generator.
Andrew Trick [Wed, 31 Jul 2013 03:24:28 +0000 (03:24 +0000)]
Add tracing to the tblgen register pressure table generator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187478 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIncrement arg_count inside the loop in printInline. Patch by Joe Matarazzo.
Craig Topper [Wed, 31 Jul 2013 03:22:07 +0000 (03:22 +0000)]
Increment arg_count inside the loop in printInline. Patch by Joe Matarazzo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187477 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChanged register names (and pointer keywords) to be lower case when using Intel X86...
Craig Topper [Wed, 31 Jul 2013 02:47:52 +0000 (02:47 +0000)]
Changed register names (and pointer keywords) to be lower case when using Intel X86 assembler syntax.

Patch by Richard Mitton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187476 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a severe compile time problem when forming large SCEV expressions.
Andrew Trick [Wed, 31 Jul 2013 02:43:40 +0000 (02:43 +0000)]
Fix a severe compile time problem when forming large SCEV expressions.

This fix is very lightweight. The same fix already existed for AddRec
but was missing for NAry expressions.

This is obviously an improvement and I'm unsure how to test compile
time problems.

Patch by Xiaoyi Guo!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187475 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove trailing whitespace and some tab characters.
Craig Topper [Wed, 31 Jul 2013 02:00:15 +0000 (02:00 +0000)]
Remove trailing whitespace and some tab characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187472 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixed incorrect disassembly for MOV16o16a when using Intel syntax.
Craig Topper [Wed, 31 Jul 2013 01:50:26 +0000 (01:50 +0000)]
Fixed incorrect disassembly for MOV16o16a when using Intel syntax.

Patch by Richard Mitton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187471 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix crashing on invalid inline asm with matching constraints.
Eric Christopher [Wed, 31 Jul 2013 01:26:24 +0000 (01:26 +0000)]
Fix crashing on invalid inline asm with matching constraints.

For a testcase like the following:

 typedef unsigned long uint64_t;

 typedef struct {
   uint64_t lo;
   uint64_t hi;
 } blob128_t;

 void add_128_to_128(const blob128_t *in, blob128_t *res) {
   asm ("PAND %1, %0" : "+Q"(*res) : "Q"(*in));

where we'll fail to allocate the register for the output constraint,
our matching input constraint will not find a register to match,
and could try to search past the end of the current operands array.

On the idea that we'd like to attempt to keep compilation going
to find more errors in the module, change the error cases when
we're visiting inline asm IR to return immediately and avoid
trying to create a node in the DAG. This leaves us with only
a single error message per inline asm instruction, but allows us
to safely keep going in the general case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187470 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Rename instruction DANDi to ANDi64.
Akira Hatanaka [Wed, 31 Jul 2013 00:57:41 +0000 (00:57 +0000)]
[mips] Rename instruction DANDi to ANDi64.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187469 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Define instruction itineraries IIArith and IILogic.
Akira Hatanaka [Wed, 31 Jul 2013 00:55:34 +0000 (00:55 +0000)]
[mips] Define instruction itineraries IIArith and IILogic.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187468 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix ptr vector inconsistency in CreatePointerCast
Matt Arsenault [Wed, 31 Jul 2013 00:17:33 +0000 (00:17 +0000)]
Fix ptr vector inconsistency in CreatePointerCast

One form would accept a vector of pointers, and the other did not.
Make both accept vectors of pointers, and add an assertion
for the number of elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187464 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix windows' implementation of status when a file doesn't exist.
Rafael Espindola [Wed, 31 Jul 2013 00:10:25 +0000 (00:10 +0000)]
Fix windows' implementation of status when a file doesn't exist.

The unix one was returning no_such_file_or_directory, but the windows one
was return success.

Update the one one caller that was depending on the old behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187463 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPreserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y).
Owen Anderson [Tue, 30 Jul 2013 23:53:17 +0000 (23:53 +0000)]
Preserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187462 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReflow this to be easier to read.
Eric Christopher [Tue, 30 Jul 2013 22:50:44 +0000 (22:50 +0000)]
Reflow this to be easier to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187459 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake these just inline, not static inline.
Eric Christopher [Tue, 30 Jul 2013 22:35:06 +0000 (22:35 +0000)]
Make these just inline, not static inline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187457 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake sure that -gsplit-dwarf isn't passed to the linker.
Eric Christopher [Tue, 30 Jul 2013 22:34:30 +0000 (22:34 +0000)]
Make sure that -gsplit-dwarf isn't passed to the linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187456 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRespect address space sizes in isEliminableCastPair.
Matt Arsenault [Tue, 30 Jul 2013 22:27:10 +0000 (22:27 +0000)]
Respect address space sizes in isEliminableCastPair.

This avoids constant folding bitcast/ptrtoint/inttoptr combinations
that have illegal bitcasts between differently sized address spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187455 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Remove isCastable since nothing uses it now"
Matt Arsenault [Tue, 30 Jul 2013 22:02:14 +0000 (22:02 +0000)]
Revert "Remove isCastable since nothing uses it now"

Apparently dragonegg uses it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187454 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd capability for building with -gsplit-dwarf to the cmake build.
Eric Christopher [Tue, 30 Jul 2013 21:44:10 +0000 (21:44 +0000)]
Add capability for building with -gsplit-dwarf to the cmake build.

In limited testing this seems to work. Caveat emptor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187452 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove isCastable since nothing uses it now
Matt Arsenault [Tue, 30 Jul 2013 21:11:17 +0000 (21:11 +0000)]
Remove isCastable since nothing uses it now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187448 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoisKnownToBeAPowerOfTwo: Strengthen isKnownToBeAPowerOfTwo's analysis on add instructions
David Majnemer [Tue, 30 Jul 2013 21:01:36 +0000 (21:01 +0000)]
isKnownToBeAPowerOfTwo: Strengthen isKnownToBeAPowerOfTwo's analysis on add instructions

Call into ComputeMaskedBits to figure out which bits are set on both add
operands and determine if the value is a power-of-two-or-zero or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187445 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChange behavior of calling bitcasted alias functions.
Matt Arsenault [Tue, 30 Jul 2013 20:45:05 +0000 (20:45 +0000)]
Change behavior of calling bitcasted alias functions.

It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187444 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Delete instruction format for "bal".
Akira Hatanaka [Tue, 30 Jul 2013 20:42:19 +0000 (20:42 +0000)]
[mips] Delete instruction format for "bal".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187443 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoThis test may have been sensitive to the ARM ABI...
Andrew Trick [Tue, 30 Jul 2013 20:34:59 +0000 (20:34 +0000)]
This test may have been sensitive to the ARM ABI...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187442 91177308-0d34-0410-b5e6-96231b3b80d8