oota-llvm.git
6 years agoUse range-based for loops. NFC
Craig Topper [Fri, 20 Nov 2015 07:18:48 +0000 (07:18 +0000)]
Use range-based for loops. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253652 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, MULEU_S.PH...
Hrvoje Varga [Fri, 20 Nov 2015 07:14:52 +0000 (07:14 +0000)]
[mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, MULEU_S.PH.QBL, MULEU_S.PH.QBR, MULQ_RS.PH, MULQ_RS.W, MULQ_S.PH and MULQ_S.W instructions
Differential Revision: http://reviews.llvm.org/D14280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253651 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Remove the AsmPrinter code for printing physical registers.
Dan Gohman [Fri, 20 Nov 2015 03:13:31 +0000 (03:13 +0000)]
[WebAssembly] Remove the AsmPrinter code for printing physical registers.

WebAssembly does not have physical registers, so even if LLVM uses physical
registers like SP, they'll need to be lowered to virtual registers before
AsmPrinter time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253644 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add a few open tasks to the target README.txt.
Dan Gohman [Fri, 20 Nov 2015 03:08:27 +0000 (03:08 +0000)]
[WebAssembly] Add a few open tasks to the target README.txt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253643 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
Dan Gohman [Fri, 20 Nov 2015 03:02:49 +0000 (03:02 +0000)]
[WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253642 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Remove done items from the README.txt.
Dan Gohman [Fri, 20 Nov 2015 02:51:38 +0000 (02:51 +0000)]
[WebAssembly] Remove done items from the README.txt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253640 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add asserts that the expression stack is used in stack order.
Dan Gohman [Fri, 20 Nov 2015 02:33:24 +0000 (02:33 +0000)]
[WebAssembly] Add asserts that the expression stack is used in stack order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253638 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssemby] Enforce FIFO ordering for instructions using stackified registers.
Dan Gohman [Fri, 20 Nov 2015 02:19:12 +0000 (02:19 +0000)]
[WebAssemby] Enforce FIFO ordering for instructions using stackified registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253634 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.
Peter Collingbourne [Fri, 20 Nov 2015 01:26:13 +0000 (01:26 +0000)]
ScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.

The nuw constraint will not be satisfied unless <expr> == 0.

This bug has been around since r102234 (in 2010!), but was uncovered by
r251052, which introduced more aggressive optimization of nuw scev expressions.

Differential Revision: http://reviews.llvm.org/D14850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253627 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSplit the argument unscheduling loop in the WebAssembly register
Eric Christopher [Fri, 20 Nov 2015 00:34:54 +0000 (00:34 +0000)]
Split the argument unscheduling loop in the WebAssembly register
coloring pass. Turn the logic into "look for an insert point and
then move things past the insert point".

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253626 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Add options to llvm-lto to select output format and dump merged module
Tobias Edler von Koch [Fri, 20 Nov 2015 00:13:05 +0000 (00:13 +0000)]
[LTO] Add options to llvm-lto to select output format and dump merged module

This introduces two new options:
- "llvm-lto -save-merged-module -o outfile" dumps the LTO Module to
  outfile.merged.bc prior to CodeGen and after LTO optimizations have been run.
- "llvm-lto -filetype=asm -o outfile" makes llvm-lto emit assembly instead of
  object code in outfile.

Both are intended for use in lit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253624 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Add option to emit assembly from LTOCodeGenerator
Tobias Edler von Koch [Thu, 19 Nov 2015 23:59:24 +0000 (23:59 +0000)]
[LTO] Add option to emit assembly from LTOCodeGenerator

This adds a new API, LTOCodeGenerator::setFileType, to choose the output file
format for LTO CodeGen. A corresponding change to use this new API from
llvm-lto and a test case is coming in a separate commit.

Differential Revision: http://reviews.llvm.org/D14554

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253622 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix a [-Werror,-Wcovered-switch-default] warning by removing the
Eric Christopher [Thu, 19 Nov 2015 23:45:42 +0000 (23:45 +0000)]
Fix a [-Werror,-Wcovered-switch-default] warning by removing the
unnecessary default case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253621 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WinEH] Disable most forms of demotion
Reid Kleckner [Thu, 19 Nov 2015 23:23:33 +0000 (23:23 +0000)]
[WinEH] Disable most forms of demotion

Now that the register allocator knows about the barriers on funclet
entry and exit, testing has shown that this is unnecessary.

We still demote PHIs on unsplittable blocks due to the differences
between the IR CFG and the Machine CFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253619 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Implement isCheapToSpeculateCtlz and isCheapToSpeculateCttz.
Dan Gohman [Thu, 19 Nov 2015 23:04:59 +0000 (23:04 +0000)]
[WebAssembly] Implement isCheapToSpeculateCtlz and isCheapToSpeculateCttz.

This unbreaks test/CodeGen/WebAssembly/i32.ll and
test/CodeGen/WebAssembly/i64.ll after r224899.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253617 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCleanup some -Wundef warnings in include/llvm/Support/MathExtras.h
Arch D. Robison [Thu, 19 Nov 2015 22:37:26 +0000 (22:37 +0000)]
Cleanup some -Wundef warnings in include/llvm/Support/MathExtras.h

Fix avoids gratuitous warnings from gcc for "_MSC_VER" not being defined.

Differential Revision: http://reviews.llvm.org/D14598

Patch by Tony Kelman <tony@kelman.net>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253614 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSamplePGO - Tweak debugging output for function samples. NFC.
Diego Novillo [Thu, 19 Nov 2015 22:18:30 +0000 (22:18 +0000)]
SamplePGO - Tweak debugging output for function samples. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253612 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.
Simon Pilgrim [Thu, 19 Nov 2015 22:13:56 +0000 (22:13 +0000)]
[X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.

Found during stress testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253611 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add tests to show missing trunc optimizations
Sanjay Patel [Thu, 19 Nov 2015 22:11:52 +0000 (22:11 +0000)]
[InstCombine] add tests to show missing trunc optimizations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253609 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix UMRs in Mips disassembler on invalid instruction streams
Reid Kleckner [Thu, 19 Nov 2015 21:51:55 +0000 (21:51 +0000)]
Fix UMRs in Mips disassembler on invalid instruction streams

The Insn and Size local variables were used without initialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253607 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Use existing MachineInstrBuilder::addDisp to create offseted pointer. NFC.
Simon Pilgrim [Thu, 19 Nov 2015 21:50:57 +0000 (21:50 +0000)]
[X86] Use existing MachineInstrBuilder::addDisp to create offseted pointer. NFC.

Minor code duplication tidyup to D13988

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253606 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFollow up to r253591. Turn into an assertion.
Davide Italiano [Thu, 19 Nov 2015 21:50:08 +0000 (21:50 +0000)]
Follow up to r253591. Turn into an assertion.

Reported by: David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253605 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LIR] Update some comments. NFC.
Chad Rosier [Thu, 19 Nov 2015 21:33:07 +0000 (21:33 +0000)]
[LIR] Update some comments. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253603 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add tests to show missing bitcast optimizations
Sanjay Patel [Thu, 19 Nov 2015 21:32:25 +0000 (21:32 +0000)]
[InstCombine] add tests to show missing bitcast optimizations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253602 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoExpand subregisters in MachineFrameInfo::getPristineRegs
Krzysztof Parzyszek [Thu, 19 Nov 2015 21:18:52 +0000 (21:18 +0000)]
Expand subregisters in MachineFrameInfo::getPristineRegs

http://reviews.llvm.org/D14719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253600 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix the debug build breakage that getDiscriminator is called by mistake.
Dehao Chen [Thu, 19 Nov 2015 20:29:27 +0000 (20:29 +0000)]
Fix the debug build breakage that getDiscriminator is called by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253597 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r253253 and r253126: "Don't recompute LCSSA after loop-unrolling when possible."
Michael Zolotukhin [Thu, 19 Nov 2015 20:28:32 +0000 (20:28 +0000)]
Revert r253253 and r253126: "Don't recompute LCSSA after loop-unrolling when possible."

The change exposed a bug in IndVarSimplify (PR25578), which led to a
failure (PR25538). When the bug is fixed, this patch can be reapplied.

The tests are kept in tree, as they're useful anyway, and will not break
with this revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253596 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReimplement discriminator assignment algorithm.
Dehao Chen [Thu, 19 Nov 2015 19:53:05 +0000 (19:53 +0000)]
Reimplement discriminator assignment algorithm.

Summary: The new algorithm is more efficient (O(n), n is number of basic blocks). And it is guaranteed to cover all cases of multiple BB mapped to same line.

Reviewers: dblaikie, davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14738

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253594 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AddressSanitizer] assert(false) -> llvm_unreachable and remove return.
Davide Italiano [Thu, 19 Nov 2015 19:28:23 +0000 (19:28 +0000)]
[AddressSanitizer] assert(false) -> llvm_unreachable and remove return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253591 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago [AArch64] Refactoring aarch64-ldst-opt. NCF.
Jun Bum Lim [Thu, 19 Nov 2015 18:41:27 +0000 (18:41 +0000)]
 [AArch64] Refactoring aarch64-ldst-opt. NCF.

Summary :
 * Rename isSmallTypeLdMerge() to isNarrowLoad().
 * Rename NumSmallTypeMerged to NumNarrowTypePromoted.
 * Use Subtarget defined as a member variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253587 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LIR] Fix 80-column from previous commit.
Chad Rosier [Thu, 19 Nov 2015 18:25:11 +0000 (18:25 +0000)]
[LIR] Fix 80-column from previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253586 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LIR] Sink checks into function to enable future refactoring. NFC.
Chad Rosier [Thu, 19 Nov 2015 18:22:21 +0000 (18:22 +0000)]
[LIR] Sink checks into function to enable future refactoring. NFC.

The purpose of this change is help delineate the memset and memcpy
optimizations with the overall goal of resolving PR25520.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253585 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalOpt] Localize some globals that have non-instruction users
James Molloy [Thu, 19 Nov 2015 18:04:33 +0000 (18:04 +0000)]
[GlobalOpt] Localize some globals that have non-instruction users

We currently bail out of global localization if the global has non-instruction users. However, often these can be simple bitcasts or constant-GEPs, which we can easily turn into instructions before localizing. Be a bit more aggressive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253584 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoupdate comment and error message; NFC
Sanjay Patel [Thu, 19 Nov 2015 17:35:55 +0000 (17:35 +0000)]
update comment and error message; NFC

'notail' was added in:
http://reviews.llvm.org/rL252368

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253580 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LIR] Use the more appropriate method. NFC.
Chad Rosier [Thu, 19 Nov 2015 17:27:28 +0000 (17:27 +0000)]
[LIR] Use the more appropriate method. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253578 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64]Extend merging narrow loads into a wider load
Jun Bum Lim [Thu, 19 Nov 2015 17:21:41 +0000 (17:21 +0000)]
[AArch64]Extend merging narrow loads into a wider load

This change extends r251438 to handle more narrow load promotions
including byte type, unscaled, and signed. For example, this change will
convert :
  ldursh w1, [x0, #-2]
  ldurh  w2, [x0, #-4]
into
  ldur  w2, [x0, #-4]
  asr   w1, w2, #16
  and   w2, w2, #0xffff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253577 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agothis new test file was accidentally left out of r253573
Sanjay Patel [Thu, 19 Nov 2015 16:39:00 +0000 (16:39 +0000)]
this new test file was accidentally left out of r253573

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253574 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CGP] despeculate expensive cttz/ctlz intrinsics
Sanjay Patel [Thu, 19 Nov 2015 16:37:10 +0000 (16:37 +0000)]
[CGP] despeculate expensive cttz/ctlz intrinsics

This is another step towards allowing SimplifyCFG to speculate harder, but then have
CGP clean things up if the target doesn't like it.

Previous patches in this series:
http://reviews.llvm.org/D12882
http://reviews.llvm.org/D13297

D13297 should catch most expensive ops, but speculation of cttz/ctlz requires special
handling because of weirdness in the intrinsic definition for handling a zero input
(that definition can probably be blamed on x86).

For example, if we have the usual speculated-by-select expensive op pattern like this:

  %tobool = icmp eq i64 %A, 0
  %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)   ; is_zero_undef == true
  %cond = select i1 %tobool, i64 64, i64 %0
  ret i64 %cond

There's an instcombine that will turn it into:

  %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 false)   ; is_zero_undef == false

This CGP patch is looking for that case and despeculating it back into:

  entry:
    %tobool = icmp eq i64 %A, 0
    br i1 %tobool, label %cond.end, label %cond.true

  cond.true:
    %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)    ; is_zero_undef == true
    br label %cond.end

  cond.end:
    %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
    ret i64 %cond

This unfortunately may lead to poorer codegen (see the changes in the existing x86 test),
but if we increase speculation in SimplifyCFG (the next step in this patch series), then
we should avoid those kinds of cases in the first place.

The need for this patch was originally mentioned here:
http://reviews.llvm.org/D7506
with follow-up here:
http://reviews.llvm.org/D7554

Differential Revision: http://reviews.llvm.org/D14630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253573 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoX86: More efficient legalization of wide integer compares
Hans Wennborg [Thu, 19 Nov 2015 16:35:08 +0000 (16:35 +0000)]
X86: More efficient legalization of wide integer compares

In particular, this makes the code for 64-bit compares on 32-bit targets
much more efficient.

Example:

  define i32 @test_slt(i64 %a, i64 %b) {
  entry:
    %cmp = icmp slt i64 %a, %b
    br i1 %cmp, label %bb1, label %bb2
  bb1:
    ret i32 1
  bb2:
    ret i32 2
  }

Before this patch:

  test_slt:
          movl    4(%esp), %eax
          movl    8(%esp), %ecx
          cmpl    12(%esp), %eax
          setae   %al
          cmpl    16(%esp), %ecx
          setge   %cl
          je      .LBB2_2
          movb    %cl, %al
  .LBB2_2:
          testb   %al, %al
          jne     .LBB2_4
          movl    $1, %eax
          retl
  .LBB2_4:
          movl    $2, %eax
          retl

After this patch:

  test_slt:
          movl    4(%esp), %eax
          movl    8(%esp), %ecx
          cmpl    12(%esp), %eax
          sbbl    16(%esp), %ecx
          jge     .LBB1_2
          movl    $1, %eax
          retl
  .LBB1_2:
          movl    $2, %eax
          retl

Differential Revision: http://reviews.llvm.org/D14496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253572 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTargetParser.cpp: Fixup -- StringRef::startswith() is better here. NFC.
NAKAMURA Takumi [Thu, 19 Nov 2015 15:42:52 +0000 (15:42 +0000)]
TargetParser.cpp: Fixup -- StringRef::startswith() is better here. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253570 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove unused function parameter (NFC)
Mehdi Amini [Thu, 19 Nov 2015 15:42:34 +0000 (15:42 +0000)]
Remove unused function parameter (NFC)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253569 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSamplePGO - Sort samples by source location when emitting as text.
Diego Novillo [Thu, 19 Nov 2015 15:33:08 +0000 (15:33 +0000)]
SamplePGO - Sort samples by source location when emitting as text.

When dumping function samples or writing them out as text format, it
helps if the samples are emitted sorted by source location. The sorting
of the maps is a bit slow, so we only do it on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253568 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Add tests for ROL and ROR macros expansion
Zoran Jovanovic [Thu, 19 Nov 2015 15:04:31 +0000 (15:04 +0000)]
[mips] Add tests for ROL and ROR macros expansion

Author: obucina

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253567 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm/lib/Support/TargetParser.cpp: Rework llvm::ARM::getArchExtFeature() to avoid...
NAKAMURA Takumi [Thu, 19 Nov 2015 15:03:11 +0000 (15:03 +0000)]
llvm/lib/Support/TargetParser.cpp: Rework llvm::ARM::getArchExtFeature() to avoid abuse of Twine in r253470.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253566 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LV] Add a helper function, isReductionVariable. NFC.
Chad Rosier [Thu, 19 Nov 2015 14:19:06 +0000 (14:19 +0000)]
[LV] Add a helper function, isReductionVariable. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253565 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Expansion of ROL and ROR macros
Zoran Jovanovic [Thu, 19 Nov 2015 14:15:03 +0000 (14:15 +0000)]
[mips] Expansion of ROL and ROR macros

Author: obucina

Reviewers: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D10611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253564 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX-512: Fixed COPY_TO_REGCLASS for mask registers
Elena Demikhovsky [Thu, 19 Nov 2015 13:13:00 +0000 (13:13 +0000)]
AVX-512: Fixed COPY_TO_REGCLASS for mask registers

Copying one mask register to another under BW should be done with kmovq instruction, otherwise we can loose some bits.
Copying 8 bits under DQ may be done with kmovb.

Differential Revision: http://reviews.llvm.org/D14812

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253563 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemoving specific target from the generic test
Artyom Skrobov [Thu, 19 Nov 2015 12:24:47 +0000 (12:24 +0000)]
Removing specific target from the generic test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253562 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] Fix lowering of X86ISD::VZEXT_MOVL for 128-bit -> 256-bit extension
Simon Pilgrim [Thu, 19 Nov 2015 12:18:37 +0000 (12:18 +0000)]
[X86][AVX] Fix lowering of X86ISD::VZEXT_MOVL for 128-bit -> 256-bit extension

The lowering patterns for X86ISD::VZEXT_MOVL for 128-bit to 256-bit vectors were just copying the lower xmm instead of actually masking off the first scalar using a blend.

Fix for PR25320.

Differential Revision: http://reviews.llvm.org/D14151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253561 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAlternative to long nops for X86 CPUs, by Andrey Turetsky
Alexey Bataev [Thu, 19 Nov 2015 11:44:35 +0000 (11:44 +0000)]
Alternative to long nops for X86 CPUs, by Andrey Turetsky
Make X86AsmBackend generate smarter nops instead of a bunch of 0x90 for code alignment for CPUs which don't support long nop instructions.
Differential Revision: http://reviews.llvm.org/D14178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253557 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Fix bug when using Python3 where a failing test would not show
Dan Liew [Thu, 19 Nov 2015 11:35:42 +0000 (11:35 +0000)]
[lit] Fix bug when using Python3 where a failing test would not show
the script when running a ShTest with an external or internal shell.

This bug is caused by use of the ``map`` function in Python 3 which
returns an iterable (rather than a list in Python 2). After the iterable
is exhausted it won't return any more output and consequently when
``_runShTest()`` tries to access the ``script`` which has already been
iterated over it is empty. Converting to a list immediatley after
calling ``map()`` fixes this.

This fixes the ``tests/shtest-format.py`` test when running under
Python3 which was previously failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253556 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogold-plugin.cpp: Fix diagnosticHandler corresponding to r253540.
NAKAMURA Takumi [Thu, 19 Nov 2015 10:43:44 +0000 (10:43 +0000)]
gold-plugin.cpp: Fix diagnosticHandler corresponding to r253540.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253553 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[FunctionAttrs] Provide a mechanism for adding function attributes from the command...
James Molloy [Thu, 19 Nov 2015 08:49:57 +0000 (08:49 +0000)]
[FunctionAttrs] Provide a mechanism for adding function attributes from the command line

This provides a way to force a function to have certain attributes from the command line. This can be useful when debugging or doing workload exploration, where manually editing IR is tedious or not possible (due to build systems etc).

The syntax is -force-attribute=function_name:attribute_name

All function attributes are parsed except alignstack as it requires an argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253550 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions.
Igor Breger [Thu, 19 Nov 2015 08:26:56 +0000 (08:26 +0000)]
AVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions.

Differential Revision: http://reviews.llvm.org/D14702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253548 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX512: Implemented encoding for the vmovss.s and vmovsd.s instructions.
Igor Breger [Thu, 19 Nov 2015 07:58:33 +0000 (07:58 +0000)]
AVX512: Implemented encoding for the vmovss.s and vmovsd.s instructions.

Differential Revision: http://reviews.llvm.org/D14771

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253547 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX512: Implemented encoding for the follow instructions.
Igor Breger [Thu, 19 Nov 2015 07:43:43 +0000 (07:43 +0000)]
AVX512: Implemented encoding for the follow instructions.
    vmovapd.s, vmovaps.s, vmovdqa32.s, vmovdqa64.s, vmovdqu16.s, vmovdqu32.s, vmovdqu64.s, vmovdqu8.s, vmovupd.s, vmovups.s

Differential Revision: http://reviews.llvm.org/D14768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253546 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoPointers in Masked Load, Store, Gather, Scatter intrinsics
Elena Demikhovsky [Thu, 19 Nov 2015 07:17:16 +0000 (07:17 +0000)]
Pointers in Masked Load, Store, Gather, Scatter intrinsics

The masked intrinsics support all integer and floating point data types. I added the pointer type to this list.
Added tests for CodeGen and for Loop Vectorizer.
Updated the Language Reference.

Differential Revision: http://reviews.llvm.org/D14150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253544 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Change memcpy/memset/memmove to have dest and source alignments."
Pete Cooper [Thu, 19 Nov 2015 05:56:52 +0000 (05:56 +0000)]
Revert "Change memcpy/memset/memmove to have dest and source alignments."

This reverts commit r253511.

This likely broke the bots in
http://lab.llvm.org:8011/builders/clang-ppc64-elf-linux2/builds/20202
http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/3787

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253543 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDo not require a Context to extract the FunctionIndex from Bitcode (NFC)
Mehdi Amini [Thu, 19 Nov 2015 05:52:29 +0000 (05:52 +0000)]
Do not require a Context to extract the FunctionIndex from Bitcode (NFC)

The LLVMContext was only used for Diagnostic. Pass a DiagnosticHandler
instead.

Differential Revision: http://reviews.llvm.org/D14794

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253540 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Disable SaturatingMultiply() unit test while investigating
Nathan Slingerland [Thu, 19 Nov 2015 05:20:17 +0000 (05:20 +0000)]
[Support] Disable SaturatingMultiply() unit test while investigating

Ubsan detected undefined behavior in the MathExtras SaturatingMultiply test.

This change disables the test while it is being investigated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253539 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix bug 25440: GVN assertion after coercing loads
Weiming Zhao [Thu, 19 Nov 2015 02:45:18 +0000 (02:45 +0000)]
Fix bug 25440: GVN assertion after coercing loads

Optimizations like LoadPRE in GVN will insert new instructions.
If the insertion point is in a already processed BB, they should
get a value number explicitly. If the insertion point is after
current instruction, then just leave it. However, current GVN framework
has no support for it.
In this patch, we just bail out if a VN can't be found.

Dfferential Revision: http://reviews.llvm.org/D14670

A    test/Transforms/GVN/pr25440.ll
M    lib/Transforms/Scalar/GVN.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253536 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix UMR in llvm-nm on IR object files in printDarwinSymbol
Reid Kleckner [Thu, 19 Nov 2015 00:51:50 +0000 (00:51 +0000)]
Fix UMR in llvm-nm on IR object files in printDarwinSymbol

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253529 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Enable shrink-wrapping by default.
Quentin Colombet [Thu, 19 Nov 2015 00:38:00 +0000 (00:38 +0000)]
[X86] Enable shrink-wrapping by default.

Differential Revision: http://reviews.llvm.org/D14156

rdar://problem/21118279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253528 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix several long lines (>80) in LoopVectorize.cpp. NFC.
Cong Hou [Thu, 19 Nov 2015 00:32:30 +0000 (00:32 +0000)]
Fix several long lines (>80) in LoopVectorize.cpp. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253527 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDon't search for third party libraries while using MSan
Reid Kleckner [Thu, 19 Nov 2015 00:05:21 +0000 (00:05 +0000)]
Don't search for third party libraries while using MSan

On the average user's system, those libraries will not be compiled with
MSan. Prior to this change, the LLVM test suite was full of false
positives from calls from third party libraries to MSan interceptors
like strlen.

We can remove this check if MSan ever grows a suppression mechanism
similar to TSan's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253526 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDisable Go bindings test with MSan, it has tons of linker errors
Reid Kleckner [Thu, 19 Nov 2015 00:05:20 +0000 (00:05 +0000)]
Disable Go bindings test with MSan, it has tons of linker errors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253525 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoInitialize PersistentId for HandleSDNode, as these will never be inserted into the DAG
Reid Kleckner [Thu, 19 Nov 2015 00:05:09 +0000 (00:05 +0000)]
Initialize PersistentId for HandleSDNode, as these will never be inserted into the DAG

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253524 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SimplifyLibCalls] New trick: pow(x, 0.5) -> sqrt(x) under -ffast-math.
Davide Italiano [Wed, 18 Nov 2015 23:21:32 +0000 (23:21 +0000)]
[SimplifyLibCalls] New trick: pow(x, 0.5) -> sqrt(x) under -ffast-math.

Differential Revision: http://reviews.llvm.org/D14466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253521 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Enable shrink-wrapping by default.
Quentin Colombet [Wed, 18 Nov 2015 23:12:20 +0000 (23:12 +0000)]
[AArch64] Enable shrink-wrapping by default.

Differential Revision: http://reviews.llvm.org/D14360

rdar://problem/20820748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253520 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix returned value for GVN: could return "false" even after modifying the IR
Mehdi Amini [Wed, 18 Nov 2015 22:49:49 +0000 (22:49 +0000)]
Fix returned value for GVN: could return "false" even after modifying the IR

This bug would manifest in some very specific cases where all the following
conditions are fullfilled:

- GVN didn't remove block
- The regular GVN iteration didn't change the IR
- PRE is enabled
- PRE will not split critical edge
- The last instruction processed by PRE didn't change the IR

Because the CallGraph PassManager relies on this returned value to decide
if it needs to recompute a node after the execution of Function passes,
not returning the right value can lead to unexpected results.

Fix for: https://llvm.org/bugs/show_bug.cgi?id=24715

Patch by Wenxiang Qiu <vincentqiuuu@gmail.com>

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253518 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CMake] Support -fvisibility-inlines-hidden when LLVM_ENABLE_PIC=Off
Chris Bieneman [Wed, 18 Nov 2015 22:49:26 +0000 (22:49 +0000)]
[CMake] Support -fvisibility-inlines-hidden when LLVM_ENABLE_PIC=Off

I'm unaware of any reasons why -fvisibility-inlines-hidden would depend on PIC, and since autoconf supports this flag without PIC, we should support it in CMake too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253517 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMinor cleanups (from review feedback)
Xinliang David Li [Wed, 18 Nov 2015 22:42:27 +0000 (22:42 +0000)]
Minor cleanups (from review feedback)

1. remove uneeded header inclusion
2. use reinterpret_cast instead of c ctyle
3. other format change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253515 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BuildLibCalls] EmitStrNLen() is dead code. Garbage collect.
Davide Italiano [Wed, 18 Nov 2015 22:29:38 +0000 (22:29 +0000)]
[BuildLibCalls] EmitStrNLen() is dead code. Garbage collect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253514 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoChange memcpy/memset/memmove to have dest and source alignments.
Pete Cooper [Wed, 18 Nov 2015 22:17:24 +0000 (22:17 +0000)]
Change memcpy/memset/memmove to have dest and source alignments.

Note, this was reviewed (and more details are in) http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

These intrinsics currently have an explicit alignment argument which is
required to be a constant integer.  It represents the alignment of the
source and dest, and so must be the minimum of those.

This change allows source and dest to each have their own alignments
by using the alignment attribute on their arguments.  The alignment
argument itself is removed.

There are a few places in the code for which the code needs to be
checked by an expert as to whether using only src/dest alignment is
safe.  For those places, they currently take the minimum of src/dest
alignments which matches the current behaviour.

For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)
will now read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %dest, i8* align 8 %src, i32 500, i1 false)

For out of tree owners, I was able to strip alignment from calls using sed by replacing:
  (call.*llvm\.memset.*)i32\ [0-9]*\,\ i1 false\)
with:
  $1i1 false)

and similarly for memmove and memcpy.

I then added back in alignment to test cases which needed it.

A similar commit will be made to clang which actually has many differences in alignment as now
IRBuilder can generate different source/dest alignments on calls.

In IRBuilder itself, a new argument was added.  Instead of calling:
  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, /* isVolatile */ false)
you now call
  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, SrcAlign, /* isVolatile */ false)

There is a temporary class (IntegerAlignment) which takes the source alignment and rejects
implicit conversion from bool.  This is to prevent isVolatile here from passing its default
parameter to the source alignment.

Note, changes in future can now be made to codegen.  I didn't change anything here, but this
change should enable better memcpy code sequences.

Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253511 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[doc] fix a wrong link
Jingyue Wu [Wed, 18 Nov 2015 22:01:44 +0000 (22:01 +0000)]
[doc] fix a wrong link

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253509 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombiner] Vector constant folding for comparisons
Simon Pilgrim [Wed, 18 Nov 2015 21:17:19 +0000 (21:17 +0000)]
[DAGCombiner] Vector constant folding for comparisons

This patch adds support for vector constant folding of integer/float comparisons.

This requires FoldConstantVectorArithmetic to support scalar constant operands (in this case ISD::CONDCASE). In future we should be able to support other scalar constant types as necessary (and possibly start calling FoldConstantVectorArithmetic for all node creations)

Differential Revision: http://reviews.llvm.org/D14683

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253504 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoARM: make sure backend is consistent about exception handling method.
Tim Northover [Wed, 18 Nov 2015 21:10:39 +0000 (21:10 +0000)]
ARM: make sure backend is consistent about exception handling method.

It turns out we decide whether to use SjLj exceptions or some alternative in
two separate places in the backend, and they disagreed with each other. This
led to inconsistent code and is generally a terrible idea.

So make them consistent and add an assert that they *do* match (unfortunately
MCAsmInfo isn't available in opt, so it can't be used to initialise the CodeGen
version directly).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253502 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDisable gvn non-local speculative loads under asan.
Mike Aizatsky [Wed, 18 Nov 2015 20:43:00 +0000 (20:43 +0000)]
Disable gvn non-local speculative loads under asan.

Summary: Fix for https://llvm.org/bugs/show_bug.cgi?id=25550

Differential Revision: http://reviews.llvm.org/D14763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253498 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-profdata] Add SaturatingAdd/SaturatingMultiply Helper Functions (2nd try)
Nathan Slingerland [Wed, 18 Nov 2015 20:40:41 +0000 (20:40 +0000)]
[llvm-profdata] Add SaturatingAdd/SaturatingMultiply Helper Functions (2nd try)

Summary:
This change adds MathExtras helper functions for handling unsigned, saturating addition and multiplication. It also updates the instrumentation and sample profile merge implementations to use them.

Reviewers: dnovillo, bogner, davidxl

Subscribers: davidxl, llvm-commits

Differential Revision: http://reviews.llvm.org/D14720

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253497 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[OperandBundles] Address review on r253446; NFC
Sanjoy Das [Wed, 18 Nov 2015 19:44:59 +0000 (19:44 +0000)]
[OperandBundles] Address review on r253446; NFC

Post-commit review by David Blaikie, thanks David!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253494 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Value profiling support
Betul Buyukkurt [Wed, 18 Nov 2015 18:14:55 +0000 (18:14 +0000)]
[PGO] Value profiling support

This change introduces an instrumentation intrinsic instruction for
value profiling purposes, the lowering of the instrumentation intrinsic
and raw reader updates. The raw profile data files for llvm-profdata
testing are updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253484 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Aarch64] Add cost for missing extensions.
Matthew Simpson [Wed, 18 Nov 2015 18:03:06 +0000 (18:03 +0000)]
[Aarch64] Add cost for missing extensions.

This patch adds a cost estimate for some missing sign and zero extensions. The
costs were determined by counting the number of shift instructions generated
without context for each new extension.

Differential Revision: http://reviews.llvm.org/D14730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253482 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemoving specific target from the generic test
Artyom Skrobov [Wed, 18 Nov 2015 17:50:47 +0000 (17:50 +0000)]
Removing specific target from the generic test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253479 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-profdata] Use SmallSet rather that std::set for keeping track of profdata merge...
Nathan Slingerland [Wed, 18 Nov 2015 17:10:24 +0000 (17:10 +0000)]
[llvm-profdata] Use SmallSet rather that std::set for keeping track of profdata merge errors

Missed bit of feedback from D14720.

Use SmallSet<std::error_code> rather than std::set<...> in order to be more efficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253474 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add more whitespace characters to prettify the assembly output.
Dan Gohman [Wed, 18 Nov 2015 17:05:35 +0000 (17:05 +0000)]
[WebAssembly] Add more whitespace characters to prettify the assembly output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253472 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Add +feature names to TargetParser extensions table
Bradley Smith [Wed, 18 Nov 2015 16:32:12 +0000 (16:32 +0000)]
[ARM] Add +feature names to TargetParser extensions table

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253470 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Make bogus inline asm strings in tests be comments.
Dan Gohman [Wed, 18 Nov 2015 16:28:58 +0000 (16:28 +0000)]
[WebAssembly] Make bogus inline asm strings in tests be comments.

These tests aren't testing that the result is valid syntax; they're testing
that the compiler emits the inline asm operands correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253469 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add some spaces to the assembly output to vertically align operands.
Dan Gohman [Wed, 18 Nov 2015 16:25:38 +0000 (16:25 +0000)]
[WebAssembly] Add some spaces to the assembly output to vertically align operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253468 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Enable register coloring and register stackifying.
Dan Gohman [Wed, 18 Nov 2015 16:12:01 +0000 (16:12 +0000)]
[WebAssembly] Enable register coloring and register stackifying.

This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are connected. For
example, the value pushed in $push7 is popped in $pop7.

And, this begins an experiment with making get_local and set_local implicit
when an operation directly uses or defines a register. This greatly reduces
clutter. If this experiment succeeds, it may make sense to do this for
const instructions as well.

And, this introduces more special code for ARGUMENTS; hopefully this code
will soon be obviated by proper support for live-in virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253465 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix bug where WinCOFFObjectWriter would assume starting from an empty output.
Manuel Klimek [Wed, 18 Nov 2015 15:24:17 +0000 (15:24 +0000)]
Fix bug where WinCOFFObjectWriter would assume starting from an empty output.

Starting on an input stream that is not at offset 0 would trigger the
assert in WinCOFFObjectWriter.cpp:1065:

  assert(getStream().tell() <= (*i)->Header.PointerToRawData &&
               "Section::PointerToRawData is insane!");

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253464 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix typo in comment. NFC.
Fraser Cormack [Wed, 18 Nov 2015 15:02:59 +0000 (15:02 +0000)]
Fix typo in comment. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253462 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class.
Jonas Paulsson [Wed, 18 Nov 2015 14:59:00 +0000 (14:59 +0000)]
[SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class.

The virtual register containing the address for returned value on
stack should in the DAG be represented with a CopyFromReg node and not
a Register node. Otherwise, InstrEmitter will not make sure that it
ends up in the right register class for the target instruction.

SystemZ needs this, becuause the reg class for address registers is a
subset of the general 64 bit register class.

test/SystemZ/CodeGen/args-07.ll and args-04.ll updated to run with
-verify-machineinstrs.

Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253461 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Revert "Strip metadata when speculatively hoisting instructions (r252604)"
Igor Laevsky [Wed, 18 Nov 2015 14:50:18 +0000 (14:50 +0000)]
Revert "Revert "Strip metadata when speculatively hoisting instructions (r252604)"

Failing clang test is now fixed by the r253458.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253459 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Appease buildbots take 3
James Molloy [Wed, 18 Nov 2015 12:08:24 +0000 (12:08 +0000)]
[LTO] Appease buildbots take 3

This time I've found a linux box and checked it there. This test now passes.

Because I'd introduced an undefined reference in @bar, gold now returns an error. This doesn't matter for the test itself, because it also emits the remarks the test is checking for. But it does cause LIT to notice a nonzero return code which it faults on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253454 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Buildbot appeasing take 2
James Molloy [Wed, 18 Nov 2015 11:37:32 +0000 (11:37 +0000)]
[LTO] Buildbot appeasing take 2

Let's try again. This time using the right function signature. It's a real pity I can't run this on a darwin machine...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253453 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Fix up test/tools/gold/X86/remarks.ll
James Molloy [Wed, 18 Nov 2015 11:32:14 +0000 (11:32 +0000)]
[LTO] Fix up test/tools/gold/X86/remarks.ll

It needs the same fixes as in test/LTO/X86/remarks.ll, but this test appears not to get run on my system (but does on the buildbot). Strange.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253452 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Add an early run of functionattrs
James Molloy [Wed, 18 Nov 2015 11:24:42 +0000 (11:24 +0000)]
[LTO] Add an early run of functionattrs

Because we internalize early, we can potentially mark a bunch of functions as norecurse. Do this before globalopt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253451 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512CD] add mask broadcast intrinsics
Asaf Badouh [Wed, 18 Nov 2015 09:42:45 +0000 (09:42 +0000)]
[X86][AVX512CD] add mask broadcast intrinsics

Differential Revision: http://reviews.llvm.org/D14573

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253450 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] Added 256-bit shuffle splat tests.
Simon Pilgrim [Wed, 18 Nov 2015 09:39:38 +0000 (09:39 +0000)]
[X86][AVX] Added 256-bit shuffle splat tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253449 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAVX512: Implemented encoding for vpextrw.s instruction.
Igor Breger [Wed, 18 Nov 2015 08:46:16 +0000 (08:46 +0000)]
AVX512: Implemented encoding for vpextrw.s instruction.

Differential Revision: http://reviews.llvm.org/D14766

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253447 91177308-0d34-0410-b5e6-96231b3b80d8