8 years ago[docs] Improvements to CMake.rst
Vedant Kumar [Tue, 25 Aug 2015 00:09:47 +0000 (00:09 +0000)]
[docs] Improvements to CMake.rst

- Fix some grammatical and typographical errors.
- Try to improve upon some awkward/nonstandard phrasings.
- Expand slightly the treatment of how you specify arguments to cmake.
- Update the list of possible LLVM_BUILD_TESTS and state where to find the
  definitive list.
- Correct the name of llvm-tblgen.
- Expand slightly the treatment of several build options, including

Patch by Brian R. Gaeke!

Differential Revision: http://reviews.llvm.org/D11862

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245911 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PowerPC] PPCVSXFMAMutate should ignore trivial-copy addends
Hal Finkel [Mon, 24 Aug 2015 23:48:28 +0000 (23:48 +0000)]
[PowerPC] PPCVSXFMAMutate should ignore trivial-copy addends

We might end up with a trivial copy as the addend, and if so, we should ignore
the corresponding FMA instruction. The trivial copy can be coalesced away later,
so there's nothing to do here. We should not, however, assert. Fixes PR24544.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245907 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert r245355 "Release script: correctly symlink clang-tools-extra into the build...
Hans Wennborg [Mon, 24 Aug 2015 23:34:28 +0000 (23:34 +0000)]
Revert r245355 "Release script: correctly symlink clang-tools-extra into the build (PR22765)"

This worked with the CMake build but broke the Autoconf one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245902 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTry to fix buildbots
Matthias Braun [Mon, 24 Aug 2015 23:30:39 +0000 (23:30 +0000)]
Try to fix buildbots

Apparently std::vector::erase(const_iterator) (as opposed to the
non-const iterator) is a part of C++11 but it seems this is not available
on all the buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245900 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix typos; NFC
Sanjay Patel [Mon, 24 Aug 2015 23:20:16 +0000 (23:20 +0000)]
fix typos; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245899 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLet's try to fix GNU libstdc++ buildbots
Matthias Braun [Mon, 24 Aug 2015 23:19:39 +0000 (23:19 +0000)]
Let's try to fix GNU libstdc++ buildbots

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245898 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix typo; NFC
Sanjay Patel [Mon, 24 Aug 2015 23:18:44 +0000 (23:18 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245896 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMachineBasicBlock: Add liveins() method returning an iterator_range
Matthias Braun [Mon, 24 Aug 2015 22:59:52 +0000 (22:59 +0000)]
MachineBasicBlock: Add liveins() method returning an iterator_range

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245895 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] DYNAMIC_STACKALLOC returns a pointer.
Dan Gohman [Mon, 24 Aug 2015 22:31:52 +0000 (22:31 +0000)]
[WebAssembly] DYNAMIC_STACKALLOC returns a pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245893 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLTO: Simplify merged module ownership.
Peter Collingbourne [Mon, 24 Aug 2015 22:22:53 +0000 (22:22 +0000)]
LTO: Simplify merged module ownership.

This change moves LTOCodeGenerator's ownership of the merged module to a
field of type std::unique_ptr<Module>. This helps simplify parts of the code
and clears the way for the module to be consumed by LLVM CodeGen (see D12132
review comments).

Differential Revision: http://reviews.llvm.org/D12205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245891 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoWebAssembly: Implement call
JF Bastien [Mon, 24 Aug 2015 22:16:48 +0000 (22:16 +0000)]
WebAssembly: Implement call

Summary: Support function calls.

Reviewers: sunfish, sunfishcode

Subscribers: sunfishcode, jfb, llvm-commits

Differential revision: http://reviews.llvm.org/D12219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245887 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert two bad commits.
JF Bastien [Mon, 24 Aug 2015 22:07:33 +0000 (22:07 +0000)]
Revert two bad commits.

Summary: I forgot to squash git commits before doing an svn dcommit of D12219. Reverting, and re-submitting.

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D12298

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245886 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMissing print.
JF Bastien [Mon, 24 Aug 2015 22:00:04 +0000 (22:00 +0000)]
Missing print.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245883 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agocall
JF Bastien [Mon, 24 Aug 2015 21:59:51 +0000 (21:59 +0000)]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245882 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Added tests for zero-extension vector shuffles that don't extend starting...
Simon Pilgrim [Mon, 24 Aug 2015 21:28:13 +0000 (21:28 +0000)]
[X86][SSE] Added tests for zero-extension vector shuffles that don't extend starting from the 0'th lane.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245878 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Make the assembly printer indent instructions.
Dan Gohman [Mon, 24 Aug 2015 21:19:48 +0000 (21:19 +0000)]
[WebAssembly] Make the assembly printer indent instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245875 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLTO: Rename mergedModule variables to MergedModule to prepare for ownership change.
Peter Collingbourne [Mon, 24 Aug 2015 21:15:35 +0000 (21:15 +0000)]
LTO: Rename mergedModule variables to MergedModule to prepare for ownership change.

Also convert a few loops to range-for loops and correct a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245874 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReport an error if a SHT_SYMTAB_SHNDX section has the wrong size.
Rafael Espindola [Mon, 24 Aug 2015 21:09:41 +0000 (21:09 +0000)]
Report an error if a SHT_SYMTAB_SHNDX section has the wrong size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245873 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] CodeGen support for __builtin_wasm_page_size()
Dan Gohman [Mon, 24 Aug 2015 21:03:24 +0000 (21:03 +0000)]
[WebAssembly] CodeGen support for __builtin_wasm_page_size()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245872 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix typo; NFC
Sanjay Patel [Mon, 24 Aug 2015 20:11:14 +0000 (20:11 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245869 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PPC64LE] Fix PR24546 - Swap optimization and debug values
Bill Schmidt [Mon, 24 Aug 2015 19:27:27 +0000 (19:27 +0000)]
[PPC64LE] Fix PR24546 - Swap optimization and debug values

This patch fixes PR24546, which demonstrates a segfault during the VSX
swap removal pass.  The problem is that debug value instructions were
not excluded from the list of instructions to be analyzed for webs of
related computation.  I've added the test case from the PR as a crash
test in test/CodeGen/PowerPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245862 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Skeleton FastISel support
Dan Gohman [Mon, 24 Aug 2015 18:44:37 +0000 (18:44 +0000)]
[WebAssembly] Skeleton FastISel support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245860 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Implement floating point rounding operators.
Dan Gohman [Mon, 24 Aug 2015 18:23:13 +0000 (18:23 +0000)]
[WebAssembly] Implement floating point rounding operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245859 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[docs][PerformanceTips] Framing the generic IR tips
Philip Reames [Mon, 24 Aug 2015 18:16:02 +0000 (18:16 +0000)]
[docs][PerformanceTips] Framing the generic IR tips

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245858 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[docs][PerformanceTips] Point people towards llvm-dev
Philip Reames [Mon, 24 Aug 2015 17:46:11 +0000 (17:46 +0000)]
[docs][PerformanceTips] Point people towards llvm-dev

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245856 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[docs] Further organization of the Performance Tips document
Philip Reames [Mon, 24 Aug 2015 17:38:58 +0000 (17:38 +0000)]
[docs] Further organization of the Performance Tips document

Arranging the language specific property section into readable groupings and adding a couple of notes about pass order, extensions, and the like.

For the record, suggestion for word smithing are welcomed.  I'm happy to revise; I'm just trying to get *something* in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245855 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[docs] Organize the 'Performance Tips' page
Philip Reames [Mon, 24 Aug 2015 17:19:18 +0000 (17:19 +0000)]
[docs] Organize the 'Performance Tips' page

This change just groups the suggestions by broad topic.  I'm planning a couple of follow on changes to improve the readability of this document.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245854 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Tell TargetTransformInfo about popcnt and sqrt.
Dan Gohman [Mon, 24 Aug 2015 16:51:46 +0000 (16:51 +0000)]
[WebAssembly] Tell TargetTransformInfo about popcnt and sqrt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245853 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Use the checked form of MachineFunction::getSubtarget. NFC.
Dan Gohman [Mon, 24 Aug 2015 16:46:31 +0000 (16:46 +0000)]
[WebAssembly] Use the checked form of MachineFunction::getSubtarget. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245852 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Implement the is_zero_undef forms of cttz and ctlz
Dan Gohman [Mon, 24 Aug 2015 16:39:37 +0000 (16:39 +0000)]
[WebAssembly] Implement the is_zero_undef forms of cttz and ctlz

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245851 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[sanitizers] Add DFSan support for AArch64 42-bit VMA
Adhemerval Zanella [Mon, 24 Aug 2015 13:48:10 +0000 (13:48 +0000)]
[sanitizers] Add DFSan support for AArch64 42-bit VMA

This patch adds support for dfsan on aarch64-linux with 42-bit VMA
(current default config for 64K pagesize kernels).  The support is
enabled by defining the SANITIZER_AARCH64_VMA to 42 at build time
for both clang/llvm and compiler-rt.  The default VMA is 39 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245840 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] Add support for mmword memory operand size for Intel-syntax x86 assembly
Michael Zuckerman [Mon, 24 Aug 2015 10:26:54 +0000 (10:26 +0000)]
[X86] Add support for mmword memory operand size for Intel-syntax x86 assembly

Differential Revision: http://reviews.llvm.org/D12151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245835 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd DAG optimisation for FP16_TO_FP
Oliver Stannard [Mon, 24 Aug 2015 09:47:45 +0000 (09:47 +0000)]
Add DAG optimisation for FP16_TO_FP

The FP16_TO_FP node only uses the bottom 16 bits of its input, so the
following pattern can be optimised by removing the AND:

  (FP16_TO_FP (AND op, 0xffff)) -> (FP16_TO_FP op)

This is a common pattern for ARM targets when functions have __fp16
arguments, as they are passed as floats (so that they get passed in the
correct registers), but then bitcast and truncated to ignore the top 16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245832 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Use AEABI helpers for i64 div and rem
Scott Douglass [Mon, 24 Aug 2015 09:17:18 +0000 (09:17 +0000)]
[ARM] Use AEABI helpers for i64 div and rem

Differential Revision: http://reviews.llvm.org/D12232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245830 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Refactor LowerDivRem before adding LowerREM (nfc)
Scott Douglass [Mon, 24 Aug 2015 09:17:11 +0000 (09:17 +0000)]
[ARM] Refactor LowerDivRem before adding LowerREM (nfc)

Differential Revision: http://reviews.llvm.org/D12230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245829 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofirst commit to llvm
Michael Zuckerman [Mon, 24 Aug 2015 07:48:50 +0000 (07:48 +0000)]
first commit to llvm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245825 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRequire Dominator Tree For SROA, improve compile-time
Mehdi Amini [Sun, 23 Aug 2015 22:15:49 +0000 (22:15 +0000)]
Require Dominator Tree For SROA, improve compile-time

TL-DR: SROA is followed by EarlyCSE which requires the DominatorTree.
There is no reason not to require it up-front for SROA.

Some history is necessary to understand why we ended-up here.

r123437 switched the second (Legacy)SROA in the optimizer pipeline to
use SSAUpdater in order to avoid recomputing the costly
DominanceFrontier. The purpose was to speed-up the compile-time.

Later r123609 removed the need for the DominanceFrontier in

Right after, some cleanup was made in r123724 to remove any reference
to the DominanceFrontier. SROA existed in two flavors: SROA_SSAUp and
SROA_DT (the latter replacing SROA_DF).
The second argument of `createScalarReplAggregatesPass` was renamed
from `UseDomFrontier` to `UseDomTree`.
I believe this is were a mistake was made. The pipeline was not
updated and the call site was still:
    PM->add(createScalarReplAggregatesPass(-1, false));

At that time, SROA was immediately followed in the pipeline by
EarlyCSE which required alread the DominatorTree. Not requiring
the DominatorTree in SROA didn't save anything, but unfortunately
it was lost at this point.

When the new SROA Pass was introduced in r163965, I believe the goal
was to have an exact replacement of the existing SROA, this bug
slipped through.

You can see currently:

$ echo "" | clang -x c++  -O3 -c - -mllvm -debug-pass=Structure
      FunctionPass Manager
        Dominator Tree Construction
        Early CSE

After this patch:

$ echo "" | clang -x c++  -O3 -c - -mllvm -debug-pass=Structure
      FunctionPass Manager
        Dominator Tree Construction
        Early CSE

This improves the compile time from 88s to 23s for PR17855.

And from 113s to 12s for PR16756

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D12267

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245820 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoremove FIXME; fixed by r245733
Sanjay Patel [Sun, 23 Aug 2015 20:43:25 +0000 (20:43 +0000)]
remove FIXME; fixed by r245733

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245819 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IR] Cleanup EH instructions a little bit
David Majnemer [Sun, 23 Aug 2015 19:22:31 +0000 (19:22 +0000)]
[IR] Cleanup EH instructions a little bit

Just a cosmetic change, no functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245818 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Fold CONCAT_VECTORS of bitcasted EXTRACT_SUBVECTOR
Simon Pilgrim [Sun, 23 Aug 2015 15:22:14 +0000 (15:22 +0000)]

Minor generalization of D12125 - peek through any bitcast to the original vector that we're extracting from.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245814 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-readobj/ELF] Factor out common code.
Davide Italiano [Sun, 23 Aug 2015 14:06:40 +0000 (14:06 +0000)]
[llvm-readobj/ELF] Factor out common code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245813 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[dwarfdump] Do not apply relocations in mach-o files if there is no LoadedObjectInfo.
Frederic Riss [Sun, 23 Aug 2015 04:44:21 +0000 (04:44 +0000)]
[dwarfdump] Do not apply relocations in mach-o files if there is no LoadedObjectInfo.

Not only do we not need to do anything to read correct values from the
object files, but the current logic actually wrongly applies twice the
section base address when there is no LoadedObjectInfo passed to the
DWARFContext creation (as the added test shows).

Simply do not apply any relocations on the mach-o debug info if there is
no load offset to apply.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245807 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[dsymutil] Remove old ODR uniquing tests
Frederic Riss [Sun, 23 Aug 2015 02:38:37 +0000 (02:38 +0000)]
[dsymutil] Remove old ODR uniquing tests

These tests have been obsoleted by the refactored versions introduced
in the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245804 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[dsymutil] Refactor ODR uniquing tests to be more readable.
Frederic Riss [Sun, 23 Aug 2015 02:38:29 +0000 (02:38 +0000)]
[dsymutil] Refactor ODR uniquing tests to be more readable.

This patch adds all the refactored tests in new files, the old
tests will be removed by a followup commit.

Thanks to D. Blaikie for all the feedback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245803 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LangRef] Fix sphinx warning
Joseph Tremoulet [Sun, 23 Aug 2015 01:04:12 +0000 (01:04 +0000)]
[LangRef] Fix sphinx warning

Fix invalid inline literal introduced in r245797

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245801 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd missing break in AArch64DAGToDAGISel::Select() switch case
Mehdi Amini [Sun, 23 Aug 2015 00:42:57 +0000 (00:42 +0000)]
Add missing break in AArch64DAGToDAGISel::Select() switch case

Reported by coverity.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245800 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDo not use dyn_cast<> after isa<>
Mehdi Amini [Sun, 23 Aug 2015 00:27:57 +0000 (00:27 +0000)]
Do not use dyn_cast<> after isa<>

Reported by coverity.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245799 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WinEH] Require token linkage in EH pad/ret signatures
Joseph Tremoulet [Sun, 23 Aug 2015 00:26:33 +0000 (00:26 +0000)]
[WinEH] Require token linkage in EH pad/ret signatures

WinEHPrepare is going to require that cleanuppad and catchpad produce values
of token type which are consumed by any cleanupret or catchret exiting the
pad.  This change updates the signatures of those operators to require/enforce
that the type produced by the pads is token type and that the rets have an
appropriate argument.

The catchpad argument of a `CatchReturnInst` must be a `CatchPadInst` (and
similarly for `CleanupReturnInst`/`CleanupPadInst`).  To accommodate that
restriction, this change adds a notion of an operator constraint to both
LLParser and BitcodeReader, allowing appropriate sentinels to be constructed
for forward references and appropriate error messages to be emitted for
illegal inputs.

Also add a verifier rule (noted in LangRef) that a catchpad with a catchpad
predecessor must have no other predecessors; this ensures that WinEHPrepare
will see the expected linear relationship between sibling catches on the
same try.

Lastly, remove some superfluous/vestigial casts from instruction operand
setters operating on BasicBlocks.

Reviewers: rnk, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245797 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate test case so it passes the verifier
David Blaikie [Sat, 22 Aug 2015 22:38:44 +0000 (22:38 +0000)]
Update test case so it passes the verifier

Some debug info was drastically out of date, from the days where we used
to emit a list of length one (with a single null entry) rather than an
empty list (or, more recently, no list at all) for list fields that have
no elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245796 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoVerifier: Don't crash on null entries in debug info retained types list
David Blaikie [Sat, 22 Aug 2015 22:36:40 +0000 (22:36 +0000)]
Verifier: Don't crash on null entries in debug info retained types list

There was already a good error path for this. Added a test for it & made
a minor code change to ensure the error path was actually reached,
rather than crashing before we got that far.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245795 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-readobj] Test --macho-data-in-code option.
Davide Italiano [Sat, 22 Aug 2015 20:30:56 +0000 (20:30 +0000)]
[llvm-readobj] Test --macho-data-in-code option.

As added bonus this converts an existing test from macho-dump to
llvm-readobj. Only 66 to go.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245791 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[NVPTX] Allow undef value as global initializer
Jingyue Wu [Sat, 22 Aug 2015 05:40:26 +0000 (05:40 +0000)]
[NVPTX] Allow undef value as global initializer

__shared__ variable may now emit undef value as initializer, do not
throw error on that.

Test Plan: test/CodeGen/NVPTX/global-addrspace.ll

Patch by Xuetian Weng

Reviewers: jholewinski, tra, jingyue

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D12242

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245785 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] add_llvm_external_project: Just warn about nonexistent directories.
NAKAMURA Takumi [Sat, 22 Aug 2015 05:11:02 +0000 (05:11 +0000)]
[CMake] add_llvm_external_project: Just warn about nonexistent directories.

These entries were generated accidentally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245783 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Make LLVM_EXTERNAL_*_SOURCE_DIR consistent against older buildsites.
NAKAMURA Takumi [Sat, 22 Aug 2015 04:53:52 +0000 (04:53 +0000)]
[CMake] Make LLVM_EXTERNAL_*_SOURCE_DIR consistent against older buildsites.

If corresponding in-tree subdirectory exists, just ignore LLVM_EXTERNAL* stuff.
Otherwise, set LLVM_TOOL_*_BUILD ON/OFF properly according to LLVM_EXTERNAL_*.

This makes easier to walk among old revisions *without* deleteing CMakeCache.txt.

Before r242059, LLVM_EXTERNAL_* was working like;

  if(EXISTS ${*_SOURCE_DIR}/CMakeLists.txt)
    set(*_BUILD ON CACHE)
    if(*_BUILD is ON)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245782 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLTO: Maintain target triple, FeatureStr and CGOptLevel in the module or LTOCodeGenerator.
Peter Collingbourne [Sat, 22 Aug 2015 02:25:53 +0000 (02:25 +0000)]
LTO: Maintain target triple, FeatureStr and CGOptLevel in the module or LTOCodeGenerator.

This makes it easier to create new TargetMachines on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245781 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Allow specifying different opcode on VI for SMRD/SMEM
Matt Arsenault [Sat, 22 Aug 2015 00:54:31 +0000 (00:54 +0000)]
AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM

Although the basic s_load_* instructions happen to use the same
opcode, some of the special case SMRD instructions have
different opcodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245775 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Improve accuracy of instruction rates for some FP instructions
Matt Arsenault [Sat, 22 Aug 2015 00:50:41 +0000 (00:50 +0000)]
AMDGPU: Improve accuracy of instruction rates for some FP instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245774 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Use DFS to avoid second loop over function
Matt Arsenault [Sat, 22 Aug 2015 00:43:38 +0000 (00:43 +0000)]
AMDGPU: Use DFS to avoid second loop over function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245772 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges
Matt Arsenault [Sat, 22 Aug 2015 00:19:34 +0000 (00:19 +0000)]
AMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245769 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Improve debug printing in SIFixSGPRLiveRanges
Matt Arsenault [Sat, 22 Aug 2015 00:19:25 +0000 (00:19 +0000)]
AMDGPU: Improve debug printing in SIFixSGPRLiveRanges

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245768 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Move CI instructions into CIInstructions.td
Matt Arsenault [Sat, 22 Aug 2015 00:16:34 +0000 (00:16 +0000)]
AMDGPU: Move CI instructions into CIInstructions.td

There are still a couple of CI patterns left in SIInstructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245767 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Minor cleanups to help with f16 support
Matt Arsenault [Fri, 21 Aug 2015 23:49:51 +0000 (23:49 +0000)]
AMDGPU: Minor cleanups to help with f16 support

The main change is inverting the condition for the
operand class classes so that VT.Size == 16 uses VGPR_32
instead of 64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245764 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoImprove the determinism of MergeFunctions
JF Bastien [Fri, 21 Aug 2015 23:27:24 +0000 (23:27 +0000)]
Improve the determinism of MergeFunctions


Merge functions previously relied on unsigned comparisons of pointer values to
order functions. This caused observable non-determinism in the compiler for
large bitcode programs. Basically, opt -mergefuncs program.bc | md5sum produces
different hashes when run repeatedly on the same machine. Differing output was
observed on three large bitcodes, but it was less frequent on the smallest file.
It is possible that this only manifests on the large inputs, hence remaining
undetected until now.

This patch fixes this by removing (almost, see below) all places where
comparisons between pointers are used to order functions. Most of these changes
are local, but the comparison of global values requires assigning an identifier
to each local in the order it is visited. This is very similar to the way the
comparison function identifies Value*'s defined within a function. Because the
order of visiting the functions and their subparts is deterministic, the
identifiers assigned to the globals will be as well, and the order of functions
will be deterministic.

With these changes, there is no more observed non-determinism. There is also
only minor slowdowns (negligible to 4%) compared to the baseline, which is
likely a result of the fact that global comparisons involve hash lookups and not
just pointer comparisons.

The one caveat so far is that programs containing BlockAddress constants can
still be non-deterministic. It is not clear what the right solution is here. In
particular, even if the global numbers are used to order by function, we still
need a way to order the BasicBlock*'s. Unfortunately, we cannot just bail out
and fail to order the functions or consider them equal, because we require a
total order over functions. Note that programs with BlockAddress constants are
relatively rare, so the impact of leaving this in is minor as long as this pass
is opt-in.

Author: jrkoenig

Reviewers: nlewycky, jfb, dschuff

Subscribers: jevinskie, llvm-commits, chapuni

Differential revision: http://reviews.llvm.org/D12168

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245762 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LAA] Hold bounds via ValueHandles during SCEV expansion
Adam Nemet [Fri, 21 Aug 2015 23:19:57 +0000 (23:19 +0000)]
[LAA] Hold bounds via ValueHandles during SCEV expansion

SCEV expansion can invalidate previously expanded values.  For example
in SCEVExpander::ReuseOrCreateCast, if we already have the requested
cast value but it's not at the desired location, a new cast is inserted
and the old cast will be invalidated.

Therefore, when expanding the bounds for the pointers, a later entry can
invalidate the IR value for an earlier one.  The fix is to store a value
handle rather than the value itself.

The newly added test has a more detailed description of how the bug

This bug can have a negative but potentially highly variable performance
impact in Loop Distribution.  Because one of the bound values was
invalidated and is an undef expression now, InstCombine is free to
transform the array overlap check:

   Start0 <= End1 && Start1 <= End0


   Start0 <= End1

So depending on the runtime location of the arrays, we would detect a
conflict and fall back on the original loop of the versioned loop.

Also tested compile time with SPEC2006 LTO bc files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245760 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoStandardized 'failed' to 'Failed' in LoopVectorizationRequirements.
Tyler Nowicki [Fri, 21 Aug 2015 23:03:24 +0000 (23:03 +0000)]
Standardized 'failed' to 'Failed' in LoopVectorizationRequirements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245759 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMIRLangRef: Add 'MIR Testing Guide' section.
Alex Lorenz [Fri, 21 Aug 2015 22:58:33 +0000 (22:58 +0000)]
MIRLangRef: Add 'MIR Testing Guide' section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245757 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLTO: Change signature of LTOCodeGenerator::setCodePICModel() to take a Reloc::Model.
Peter Collingbourne [Fri, 21 Aug 2015 22:57:17 +0000 (22:57 +0000)]
LTO: Change signature of LTOCodeGenerator::setCodePICModel() to take a Reloc::Model.

This allows us to remove a bunch of code in LTOCodeGenerator and llvm-lto
and has the side effect of improving error handling in the libLTO C API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245756 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Better handle s_wait insertion
Tom Stellard [Fri, 21 Aug 2015 22:47:27 +0000 (22:47 +0000)]
AMDGPU/SI: Better handle s_wait insertion

We can wait on either VM, EXP or LGKM.
The waits are independent.

Without this patch, a wait inserted because of one of them
would also wait for all the previous others.
This patch makes s_wait only wait for the ones we need for the next

Here's an example of subtle perf reduction this patch solves:

This is without the patch:

buffer_load_format_xyzw v[8:11], v0, s[44:47], 0 idxen
buffer_load_format_xyzw v[12:15], v0, s[48:51], 0 idxen
s_load_dwordx4 s[44:47], s[8:9], 0xc
s_waitcnt lgkmcnt(0)
buffer_load_format_xyzw v[16:19], v0, s[52:55], 0 idxen
s_load_dwordx4 s[48:51], s[8:9], 0x10
s_waitcnt vmcnt(1)
buffer_load_format_xyzw v[20:23], v0, s[44:47], 0 idxen

The s_waitcnt vmcnt(1) is useless.
The reason it is added is because the last
buffer_load_format_xyzw needs s[44:47], which was issued
by the first s_load_dwordx4. It waits for all VM
before that call to have finished.

Internally after every instruction, 3 counters (for VM, EXP and LGTM)
are updated after every instruction. For example buffer_load_format_xyzw
increase the VM counter, and s_load_dwordx4 the LGKM one.

Without the patch, for every defined register,
the current 3 counters are stored, and are used to know
how long to wait when an instruction needs the register.

Because of that, the s[44:47] counter includes that to use the register
you need to wait for the previous buffer_load_format_xyzw.

Instead this patch stores only the counters that matter for the
and puts zero for the other ones, since we don't need any wait for them.

Patch by: Axel Davy

Differential Revision: http://reviews.llvm.org/D11883

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245755 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRe-apply r245635, "[InstCombine] Transform A & (L - 1) u< L --> L != 0"
Sanjoy Das [Fri, 21 Aug 2015 22:22:37 +0000 (22:22 +0000)]
Re-apply r245635, "[InstCombine] Transform A & (L - 1) u< L --> L != 0"

The original checkin was buggy, this change has a fix.

Original commit message:

[InstCombine] Transform A & (L - 1) u< L --> L != 0


This transform is never a pessimization at the IR level (since it
replaces an `icmp` with another), and has potentiall payoffs:

 1. It may make the `icmp` fold away or become loop invariant.
 2. It may make the `A & (L - 1)` computation dead.

This shows up in Java, in range checks generated by array accesses of
the form `a[i & (a.length - 1)]`.

Reviewers: reames, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12210

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245753 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRange-for-ify some things in GlobalMerge
David Blaikie [Fri, 21 Aug 2015 22:19:06 +0000 (22:19 +0000)]
Range-for-ify some things in GlobalMerge

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245752 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[opaque pointer types] Fix a few easy places in GlobalMerge that were accessing value...
David Blaikie [Fri, 21 Aug 2015 22:00:44 +0000 (22:00 +0000)]
[opaque pointer types] Fix a few easy places in GlobalMerge that were accessing value types through pointee types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245746 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMIR Serialization: Serialize the pointer IR expression values in the machine
Alex Lorenz [Fri, 21 Aug 2015 21:54:12 +0000 (21:54 +0000)]
MIR Serialization: Serialize the pointer IR expression values in the machine
memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245745 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Fix MachO CPU Subtype selection
Vedant Kumar [Fri, 21 Aug 2015 21:52:48 +0000 (21:52 +0000)]
[ARM] Fix MachO CPU Subtype selection

Differential Revision: http://reviews.llvm.org/D12040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245744 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMIRParser: Split the 'parseIRConstant' method into two methods. NFC.
Alex Lorenz [Fri, 21 Aug 2015 21:48:22 +0000 (21:48 +0000)]
MIRParser: Split the 'parseIRConstant' method into two methods. NFC.

One variant of this method can be reused when parsing the quoted IR pointer
expressions in the machine memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245743 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[opaque pointer types] Push the passing of value types up from Function/GlobalVariabl...
David Blaikie [Fri, 21 Aug 2015 21:35:28 +0000 (21:35 +0000)]
[opaque pointer types] Push the passing of value types up from Function/GlobalVariable to GlobalObject

(coming next, pushing this up into GlobalValue, so it can store the
value type directly)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245742 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PowerPC] PPCVSXFMAMutate should not segfault on undef input registers
Hal Finkel [Fri, 21 Aug 2015 21:34:24 +0000 (21:34 +0000)]
[PowerPC] PPCVSXFMAMutate should not segfault on undef input registers

When PPCVSXFMAMutate would look at the input addend register, it would get its
input value number. This would fail, however, if the register was undef,
causing a segfault. Don't segfault (just skip such FMA instructions).

Fixes the test case from PR24542 (although that may have been over-reduced).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245741 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAsmParser: Save and restore the parsing state for types using SlotMapping.
Alex Lorenz [Fri, 21 Aug 2015 21:32:39 +0000 (21:32 +0000)]
AsmParser: Save and restore the parsing state for types using SlotMapping.

This commit extends the 'SlotMapping' structure and includes mappings for named
and numbered types in it. The LLParser is extended accordingly to fill out
those mappings at the end of module parsing.

This information is useful when we want to parse standalone constant values
at a later stage using the 'parseConstantValue' method. The constant values
can be constant expressions, which can contain references to types. In order
to parse such constant values, we have to restore the internal named and
numbered mappings for the types in LLParser, otherwise the parser will report
a parsing error. Therefore, this commit also introduces a new method called
'restoreParsingState' to LLParser, which uses the slot mappings to restore
some of its internal parsing state.

This commit is required to serialize constant value pointers in the machine
memory operands for the MIR format.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245740 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LVI] Use a SmallVector instead of SmallPtrSet. NFC
Bruno Cardoso Lopes [Fri, 21 Aug 2015 21:18:26 +0000 (21:18 +0000)]
[LVI] Use a SmallVector instead of SmallPtrSet. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245739 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMIRLangRef: Describe the syntax for the immediate operands, register values,
Alex Lorenz [Fri, 21 Aug 2015 21:17:01 +0000 (21:17 +0000)]
MIRLangRef: Describe the syntax for the immediate operands, register values,
register operands and register flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245738 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMIR Serialization: Print MCSymbol operands.
Alex Lorenz [Fri, 21 Aug 2015 21:12:44 +0000 (21:12 +0000)]
MIR Serialization: Print MCSymbol operands.

This commit allows the MIR printer to print the MCSymbol machine operands.
Unfortunately they can't be parsed at this time. I will create a bug that will
track the fact that the MCSymbol operands can't be parsed yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245737 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLine endings fix.
Simon Pilgrim [Fri, 21 Aug 2015 21:09:51 +0000 (21:09 +0000)]
Line endings fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245736 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] enable machine combiner reassociations for 256-bit vector min/max
Sanjay Patel [Fri, 21 Aug 2015 21:04:21 +0000 (21:04 +0000)]
[x86] enable machine combiner reassociations for 256-bit vector min/max

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245735 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoremove 'FeatureSlowUAMem' from AMD CPUs based on 10H micro-arch or later
Sanjay Patel [Fri, 21 Aug 2015 20:39:17 +0000 (20:39 +0000)]
remove 'FeatureSlowUAMem' from AMD CPUs based on 10H micro-arch or later

See discussion in D12154 ( http://reviews.llvm.org/D12154 ), AMD Software
Optimization Guides for 10H/12H/15H/16H, and Agner Fog's experimental data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245733 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-readobj] Add support for MachO DataInCodeDataCommand.
Davide Italiano [Fri, 21 Aug 2015 20:28:30 +0000 (20:28 +0000)]
[llvm-readobj] Add support for MachO DataInCodeDataCommand.

Example output:

File: <stdin>
Format: Mach-O arm
Arch: arm
AddressSize: 32bit
DataInCode {
  Data offset: 300
  Data size: 32
  Data Regions [
    DICE {
      Index: 0
      Offset: 0
      Length: 4
      Kind: 1
    DICE {
      Index: 1
      Offset: 4
      Length: 4
      Kind: 4
    DICE {
      Index: 2
      Offset: 8
      Length: 2
      Kind: 3
    DICE {
      Index: 3
      Offset: 10
      Length: 1
      Kind: 2

Differential Revision:  http://reviews.llvm.org/D12084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245732 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd comment as follow up to r245712
David Blaikie [Fri, 21 Aug 2015 20:18:39 +0000 (20:18 +0000)]
Add comment as follow up to r245712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245730 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] invert logic for attribute 'FeatureFastUAMem'
Sanjay Patel [Fri, 21 Aug 2015 20:17:26 +0000 (20:17 +0000)]
[x86] invert logic for attribute 'FeatureFastUAMem'

This is a 'no functional change intended' patch. It removes one FIXME, but adds several more.

Motivation: the FeatureFastUAMem attribute may be too general. It is used to determine if any
sized misaligned memory access under 32-bytes is 'fast'. From the added FIXME comments, however,
you can see that we're not consistent about this. Changing the name of the attribute makes it
clearer to see the logic holes.

Changing this to a 'slow' attribute also means we don't have to add an explicit 'fast' attribute
to new chips; fast unaligned accesses have been standard for several generations of CPUs now.

Differential Revision: http://reviews.llvm.org/D12154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245729 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[opaque pointer type]: Pass explicit pointee type when building a constant GEP.
David Blaikie [Fri, 21 Aug 2015 20:16:51 +0000 (20:16 +0000)]
[opaque pointer type]: Pass explicit pointee type when building a constant GEP.

Gets a bit tricky in the ValueMapper, of course - not sure if we should
just expose a list of explicit types for each Value so that the
ValueMapper can be neutral to these special cases (it's OK for things
like load, where the explicit type is the result type - but when that's
not the case, it means plumbing through another "special" type... )

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245728 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-lto: Re-order code.
Peter Collingbourne [Fri, 21 Aug 2015 19:09:42 +0000 (19:09 +0000)]
llvm-lto: Re-order code.

This saves us from needing to asave a pointer, and will be needed for an
upcoming ownership change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245722 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFilter libraries that are not installed out of CMake exports (currently
Dan Liew [Fri, 21 Aug 2015 18:10:57 +0000 (18:10 +0000)]
Filter libraries that are not installed out of CMake exports (currently
gtest and gtest_main) when generating ``Makefile.llvmbuild``.

Libraries that are not installed should not be exported because they
won't be available from an install tree.  Rather than filtering out the
gtest libraries in cmake/modules/Makefile, simply teach llvm-build to
filter out libraries that will not be installed from its generated list
of exported libraries.

Note that LLVMBUILD_LIB_DEPS_* are used during our own CMake build
process so we cannot filter LLVMBUILD_LIB_DEPS_gtest* out in llvm-build.
We must leave this gtest filter logic in cmake/modules/Makefile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245718 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-build: Adopt generation of LLVM_LIBS_TO_EXPORT. Patch by
Dan Liew [Fri, 21 Aug 2015 18:10:55 +0000 (18:10 +0000)]
llvm-build: Adopt generation of LLVM_LIBS_TO_EXPORT. Patch by
Brad King.

Move `LLVM_LIBS_TO_EXPORT` over to Makefile.llvmbuild and generate it
from `llvm-build` using the same logic used to export the dependencies
of these libraries.  This avoids depending on `llvm-config`.

This refactoring was originally motivated by issue #24154 due to commit
r243297 (Fix `llvm-config` to emit the linker flag for the combined
shared object, 2015-07-27) changing the output of `llvm-config --libs`
to not have the individual libraries when we configure with
`--enable-shared`.  That change was reverted by r244108 but this
refactoring makes sense on its own anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245717 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-build: Factor out duplicate cmake export listing. Patch by
Dan Liew [Fri, 21 Aug 2015 18:10:51 +0000 (18:10 +0000)]
llvm-build: Factor out duplicate cmake export listing. Patch by
Brad King.

The write_cmake_fragment and write_cmake_exports_fragment methods share
some logic for selecting libraries that CMake needs to know about.
Factor it out into a helper to avoid duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245716 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] enable machine combiner reassociations for 128-bit vector min/max
Sanjay Patel [Fri, 21 Aug 2015 18:06:49 +0000 (18:06 +0000)]
[x86] enable machine combiner reassociations for 128-bit vector min/max

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245715 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove an unnecessary use of pointee types introduced in r194220
David Blaikie [Fri, 21 Aug 2015 17:37:41 +0000 (17:37 +0000)]
Remove an unnecessary use of pointee types introduced in r194220

David Majnemer (the original author) believes this to be an impossible
condition to reach anyway, and no test cases cover this so we'll go with

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245712 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDisable Visual C++ 2013 Debug mode assert on null pointer in some STL algorithms,
Yaron Keren [Fri, 21 Aug 2015 17:31:03 +0000 (17:31 +0000)]
Disable Visual C++ 2013 Debug mode assert on null pointer in some STL algorithms,
such as std::equal on the third argument. This reverts previous workarounds.

Predefining _DEBUG_POINTER_IMPL disables Visual C++ 2013 headers from defining
it to a function performing the null pointer check. In practice, it's not that
bad since any function actually using the nullptr will seg fault. The other
iterator sanity checks remain enabled in the headers.

Reviewed by Aaron Ballmanþ and Duncan P. N. Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245711 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMIRLangRef: Describe the syntax for machine instruction names and flags.
Alex Lorenz [Fri, 21 Aug 2015 17:26:38 +0000 (17:26 +0000)]
MIRLangRef: Describe the syntax for machine instruction names and flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245710 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agosave some testing time; get rid of the non-SSE chips in this test
Sanjay Patel [Fri, 21 Aug 2015 17:16:51 +0000 (17:16 +0000)]
save some testing time; get rid of the non-SSE chips in this test

It doesn't matter what slow/fast unaligned attribute the old chips
have - they can't use anything more than 4-byte stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245709 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[APFloat] Remove else after return and replace loop with std::equal. NFC.
Benjamin Kramer [Fri, 21 Aug 2015 16:44:52 +0000 (16:44 +0000)]
[APFloat] Remove else after return and replace loop with std::equal. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245707 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix typo - symetric -> symmetric.
Eric Christopher [Fri, 21 Aug 2015 16:23:39 +0000 (16:23 +0000)]
Fix typo - symetric -> symmetric.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245705 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoadd a test case to check the fast-unaligned-mem attribute per CPU
Sanjay Patel [Fri, 21 Aug 2015 16:08:26 +0000 (16:08 +0000)]
add a test case to check the fast-unaligned-mem attribute per CPU

This will confirm that the patch in D12154 is actually NFC.
It will also confirm that the proposed changes for the AMD chips
are behaving as expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245704 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Fold together mul and shl when both are by a constant
John Brawn [Fri, 21 Aug 2015 10:48:17 +0000 (10:48 +0000)]
[DAGCombiner] Fold together mul and shl when both are by a constant

This is intended to improve code generation for GEPs, as the index value is
shifted by the element size and in GEPs of multi-dimensional arrays the index
of higher dimensions is multiplied by the lower dimension size.

Differential Revision: http://reviews.llvm.org/D12197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245689 91177308-0d34-0410-b5e6-96231b3b80d8