oota-llvm.git
7 years ago[LIR] Re-instate r244880, reverted in r244884, factoring the handling of
Chandler Carruth [Fri, 14 Aug 2015 00:21:10 +0000 (00:21 +0000)]
[LIR] Re-instate r244880, reverted in r244884, factoring the handling of
AliasAnalysis in LoopIdiomRecognize.

The previous commit to LIR, r244879, exposed some scary bug in the loop
pass pipeline with an assert failure that showed up on several bots.
This patch got reverted as part of getting that revision reverted, but
they're actually independent and unrelated. This patch has no functional
change and should be completely safe. It is also useful for my current
work on the AA infrastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244993 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Change MIR syntax - use custom syntax for MBBs.
Alex Lorenz [Thu, 13 Aug 2015 23:10:16 +0000 (23:10 +0000)]
MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244982 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodon't repeat function names in comments; NFC
Sanjay Patel [Thu, 13 Aug 2015 22:53:20 +0000 (22:53 +0000)]
don't repeat function names in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244977 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IR] Cleanup indentation of EH instructions
David Majnemer [Thu, 13 Aug 2015 22:11:40 +0000 (22:11 +0000)]
[IR] Cleanup indentation of EH instructions

No functional change is intended, just tidying up whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244966 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Use the general SMAX/SMIN/UMAX/UMIN pattern matching and remove the AMDGPU...
Simon Pilgrim [Thu, 13 Aug 2015 21:40:02 +0000 (21:40 +0000)]
[AMDGPU] Use the general SMAX/SMIN/UMAX/UMIN pattern matching and remove the AMDGPU implementation

D9746 added general SMAX/SMIN/UMAX/UMIN pattern matching to SelectionDAGBuilder::visitSelect.

Differential Revision: http://reviews.llvm.org/D12007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244960 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Provide "too few operands" diags on short-form NEON also.
Ahmed Bougacha [Thu, 13 Aug 2015 21:09:13 +0000 (21:09 +0000)]
[AArch64] Provide "too few operands" diags on short-form NEON also.

We used to just say "invalid type suffix for instruction", which is
misleading. This is because we fallback to the long-form matcher if the
short-form matcher failed, losing the error information on the way.

Save it, so that we can provide a little better diagnostics when the
long-form matcher thinks a suffix is the cause of the error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244955 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Don't allow negative alignments for memory operands.
Alex Lorenz [Thu, 13 Aug 2015 20:55:01 +0000 (20:55 +0000)]
MIR Parser: Don't allow negative alignments for memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244953 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN pattern matching and remove the X86...
Simon Pilgrim [Thu, 13 Aug 2015 20:45:55 +0000 (20:45 +0000)]
[X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN pattern matching and remove the X86 implementation

Follow up to D10947 - D9746 added general SMAX/SMIN/UMAX/UMIN pattern matching to SelectionDAGBuilder::visitSelect.

This patch removes the X86 implementation and improves the AVX1/AVX2 support to correctly lower 256-bit integer vectors.

Differential Revision: http://reviews.llvm.org/D12006

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244949 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SimplifyLibCalls] Correctly set the is_zero_undef flag for llvm.cttz
Davide Italiano [Thu, 13 Aug 2015 20:34:26 +0000 (20:34 +0000)]
[SimplifyLibCalls] Correctly set the is_zero_undef flag for llvm.cttz

If <src> is non-zero we can safely set the flag to true, and this
results in less code generated for, e.g. ffs(x) + 1 on FreeBSD.
Thanks to majnemer for suggesting the fix and reviewing.

Code generated before the patch was applied:

 0:   0f bc c7                bsf    %edi,%eax
 3:   b9 20 00 00 00          mov    $0x20,%ecx
 8:   0f 45 c8                cmovne %eax,%ecx
 b:   83 c1 02                add    $0x2,%ecx
 e:   b8 01 00 00 00          mov    $0x1,%eax
13:   85 ff                   test   %edi,%edi
15:   0f 45 c1                cmovne %ecx,%eax
18:   c3                      retq

Code generated after the patch was applied:

 0:   0f bc cf                bsf    %edi,%ecx
 3:   83 c1 02                add    $0x2,%ecx
 6:   85 ff                   test   %edi,%edi
 8:   b8 01 00 00 00          mov    $0x1,%eax
 d:   0f 45 c1                cmovne %ecx,%eax
10:   c3                      retq

It seems we can still use cmove and save another 'test' instruction, but
that can be tackled separately.

Differential Revision:  http://reviews.llvm.org/D11989

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244947 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Extract the code that parses the alignment into a new method. NFC.
Alex Lorenz [Thu, 13 Aug 2015 20:33:33 +0000 (20:33 +0000)]
MIR Parser: Extract the code that parses the alignment into a new method. NFC.

This commit extracts the code that parses the memory operand's alignment into
a new method named 'parseAlignment' so that it can be reused when parsing the
basic block's alignment attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244945 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Tests for SMAX/SMIN/UMAX/UMIN vector instructions
Simon Pilgrim [Thu, 13 Aug 2015 20:31:03 +0000 (20:31 +0000)]
[X86][SSE] Tests for SMAX/SMIN/UMAX/UMIN vector instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244944 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Rename the method 'diagFromLLVMAssemblyDiag'. NFC.
Alex Lorenz [Thu, 13 Aug 2015 20:30:11 +0000 (20:30 +0000)]
MIR Parser: Rename the method 'diagFromLLVMAssemblyDiag'. NFC.

This commit renames the method 'diagFromLLVMAssemblyDiag' to
'diagFromBlockStringDiag'. This method will be used when converting diagnostics
from other YAML block strings, and not just the LLVM module block string, so
the new name should reflect that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244943 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SeparateConstOffsetFromGEP] strengthen the inbounds attribute
Jingyue Wu [Thu, 13 Aug 2015 18:48:49 +0000 (18:48 +0000)]
[SeparateConstOffsetFromGEP] strengthen the inbounds attribute

We used to be over-conservative about preserving inbounds. Actually, the second
GEP (which applies the constant offset) can inherit the inbounds attribute of
the original GEP, because the resultant pointer is equivalent to that of the
original GEP. For example,

  x  = GEP inbounds a, i+5
    =>
  y = GEP a, i               // inbounds removed
  x = GEP inbounds y, 5      // inbounds preserved

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244937 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-cxxdump] Correctly process relocations when given multiple files
David Majnemer [Thu, 13 Aug 2015 18:31:43 +0000 (18:31 +0000)]
[llvm-cxxdump] Correctly process relocations when given multiple files

Archive files wouldn't lead to us reprocessing the section relocations
for the new object files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244932 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove and forbid raw_svector_ostream::flush() calls.
Yaron Keren [Thu, 13 Aug 2015 18:12:56 +0000 (18:12 +0000)]
Remove and forbid raw_svector_ostream::flush() calls.
After r244870 flush() will only compare two null pointers and return,
doing nothing but wasting run time. The call is not required any more
as the stream and its SmallString are always in sync.

Thanks to David Blaikie for reviewing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244928 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix GCC warning: extra `;' [-Wpedantic].
Nick Lewycky [Thu, 13 Aug 2015 18:10:19 +0000 (18:10 +0000)]
Fix GCC warning: extra `;' [-Wpedantic].

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244924 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoScalar to vector conversions using direct moves
Nemanja Ivanovic [Thu, 13 Aug 2015 17:40:44 +0000 (17:40 +0000)]
Scalar to vector conversions using direct moves

This patch corresponds to review:
http://reviews.llvm.org/D11471

It improves the code generated for converting a scalar to a vector value. With
direct moves from GPRs to VSRs, we no longer require expensive stack operations
for this. Subsequent patches will handle the reverse case and more general
operations between vectors and their scalar elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244921 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEmit argmemonly attribute for intrinsics.
Igor Laevsky [Thu, 13 Aug 2015 17:40:04 +0000 (17:40 +0000)]
Emit argmemonly attribute for intrinsics.

Differential Revision: http://reviews.llvm.org/D11352

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244920 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] FMINNAN/FMAXNAN of f64 are not legal.
James Molloy [Thu, 13 Aug 2015 17:28:26 +0000 (17:28 +0000)]
[ARM] FMINNAN/FMAXNAN of f64 are not legal.

This was my error. We've got f32 marked as legal because they're simulated using a v2f32 instruction, but there's no equivalent for f64.

This will get test coverage imminently when D12015 lands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244916 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Allow vmin/vmax of scalars to be emitted without UseNEONForFP.
James Molloy [Thu, 13 Aug 2015 17:28:20 +0000 (17:28 +0000)]
[ARM] Allow vmin/vmax of scalars to be emitted without UseNEONForFP.

This overrides the default to more closely resemble the hand-crafted matching logic in ISelLowering. It makes sense, as there is no VFP equivalent of vmin or vmax, to use them when they're available even if in general VFP ops should be preferred.

This should be NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244915 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Rejig vmax tests a bit
James Molloy [Thu, 13 Aug 2015 17:28:16 +0000 (17:28 +0000)]
[ARM] Rejig vmax tests a bit

They rely on global fast-math options, but soon ISel will rely only on fast-math flags on the instructions themselves. Rip the fast checks out into their own file so we can mark their instructions as fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244914 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Small rejig of fmax tests, NFCI.
James Molloy [Thu, 13 Aug 2015 17:28:10 +0000 (17:28 +0000)]
[AArch64] Small rejig of fmax tests, NFCI.

These tests relied on -enable-no-nans-fp-math, whereas soon they'll take their no-nans hint
from the FCMP instruction itself, so split the no-nans stuff out into its own test.

Also do a slight rejig of instruction order. The old FMIN/MAX backend matching had to deal with looking through casts, which it never did particularly well. Now, instcombine will recognize such patterns and canonicalize the cast outside the select. So modify the test inputs to assume that instcombine has already run.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244913 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DeadStoreElimination] remove a redundant store even if the load is in a different...
Erik Eckstein [Thu, 13 Aug 2015 15:36:11 +0000 (15:36 +0000)]
[DeadStoreElimination] remove a redundant store even if the load is in a different block.

DeadStoreElimination does eliminate a store if it stores a value which was loaded from the same memory location.
So far this worked only if the store is in the same block as the load.
Now we can also handle stores which are in a different block than the load.
Example:

define i32 @test(i1, i32*) {
entry:
  %l2 = load i32, i32* %1, align 4
  br i1 %0, label %bb1, label %bb2
bb1:
  br label %bb3
bb2:
  ; This store is redundant
  store i32 %l2, i32* %1, align 4
  br label %bb3
bb3:
  ret i32 0
}

Differential Revision: http://reviews.llvm.org/D11854

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244901 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][mcjit] Calculate correct addend for HI16 and PCHI16 reloc
Petar Jovanovic [Thu, 13 Aug 2015 15:12:49 +0000 (15:12 +0000)]
[mips][mcjit] Calculate correct addend for HI16 and PCHI16 reloc

Previously, for O32 ABI we did not calculate correct addend for R_MIPS_HI16
and R_MIPS_PCHI16 relocations. This patch fixes that.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D11186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244897 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEHPrepare] Update demotion logic
Joseph Tremoulet [Thu, 13 Aug 2015 14:30:10 +0000 (14:30 +0000)]
[WinEHPrepare] Update demotion logic

Summary:
Update the demotion logic in WinEHPrepare to avoid creating new cleanups by
walking predecessors as necessary to insert stores for EH-pad PHIs.

Also avoid creating stores for EH-pad PHIs that have no uses.

The store/load placement is still pretty naive.  Likely future improvements
(at least for optimized compiles) include:
 - Share loads for related uses as possible
 - Coalesce non-interfering use/def-related PHIs
 - Store at definition point rather than each PHI pred for non-interfering
   lifetimes.

Reviewers: rnk, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11955

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244894 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SystemZ] Support large LLVM IR struct return values
Ulrich Weigand [Thu, 13 Aug 2015 13:37:06 +0000 (13:37 +0000)]
[SystemZ] Support large LLVM IR struct return values

Recent mesa/llvmpipe crashes on SystemZ due to a failed assertion when
attempting to compile a routine with a return type of
  { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
on a system without vector instruction support.

This is because after legalizing the vector type, we get a return value
consisting of 16 floats, which cannot all be returned in registers.

Usually, what should happen in this case is that the target's CanLowerReturn
routine rejects the return type, in which case SelectionDAG falls back to
implementing a structure return in memory via implicit reference.

However, the SystemZ target never actually implemented any CanLowerReturn
routine, and thus would accept any struct return type.

This patch fixes the crash by implementing CanLowerReturn.  As a side effect,
this also handles fp128 return values, fixing a todo that was noted in
SystemZCallingConv.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244889 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove raw_svector_ostream::resync and users. It's no-op after r244870.
Yaron Keren [Thu, 13 Aug 2015 12:42:25 +0000 (12:42 +0000)]
Remove raw_svector_ostream::resync and users. It's no-op after r244870.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244888 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombinePHI] Partial simplification of identity operations.
Charlie Turner [Thu, 13 Aug 2015 12:38:58 +0000 (12:38 +0000)]
[InstCombinePHI] Partial simplification of identity operations.

Consider this code:

BB:
  %i = phi i32 [ 0, %if.then ], [ %c, %if.else ]
  %add = add nsw i32 %i, %b
  ...

In this common case the add can be moved to the %if.else basic block, because
adding zero is an identity operation. If we go though %if.then branch it's
always a win, because add is not executed; if not, the number of instructions
stays the same.

This pattern applies also to other instructions like sub, shl, shr, ashr | 0,
mul, sdiv, div | 1.

Patch by Jakub Kuderski!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244887 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[LIR] Start leveraging the fundamental guarantees of a loop..."
Renato Golin [Thu, 13 Aug 2015 11:25:38 +0000 (11:25 +0000)]
Revert "[LIR] Start leveraging the fundamental guarantees of a loop..."

This reverts commit r244879, as it broke the test-suite on
SingleSource/Regression/C/2004-03-15-IndirectGoto in AArch64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244885 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[LIR] Handle access to AliasAnalysis the same way as the other analysis in...
Renato Golin [Thu, 13 Aug 2015 11:25:35 +0000 (11:25 +0000)]
Revert "[LIR] Handle access to AliasAnalysis the same way as the other analysis in LoopIdiomRecognize."

This reverts commit r244880, as it broke the test-suite on
SingleSource/Regression/C/2004-03-15-IndirectGoto in AArch64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244884 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest Commit.
Ashutosh Nema [Thu, 13 Aug 2015 11:18:35 +0000 (11:18 +0000)]
Test Commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244883 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Reorganise and simplify thumb-1 load/store selection
John Brawn [Thu, 13 Aug 2015 10:48:22 +0000 (10:48 +0000)]
[ARM] Reorganise and simplify thumb-1 load/store selection

Other than PC-relative loads/store the patterns that match the various
load/store addressing modes have the same complexity, so the order that they
are matched is the order that they appear in the .td file.

Rearrange the instruction definitions in ARMInstrThumb.td, and make use of
AddedComplexity for PC-relative loads, so that the instruction matching order
is the order that results in the simplest selection logic. This also makes
register-offset load/store be selected when it should, as previously it was
only selected for too-large immediate offsets.

Differential Revision: http://reviews.llvm.org/D11800

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244882 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Handle access to AliasAnalysis the same way as the other analysis
Chandler Carruth [Thu, 13 Aug 2015 10:00:53 +0000 (10:00 +0000)]
[LIR] Handle access to AliasAnalysis the same way as the other analysis
in LoopIdiomRecognize. This is what started me staring at this code. Now
migrating it with the new AA stuff will be trivial.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244880 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Start leveraging the fundamental guarantees of a loop in
Chandler Carruth [Thu, 13 Aug 2015 09:56:20 +0000 (09:56 +0000)]
[LIR] Start leveraging the fundamental guarantees of a loop in
simplified form to remove redundant checks and simplify the code for
popcount recognition. We don't actually need to handle all of these
cases.

I've left a FIXME for one in particular until I finish inspecting to
make sure we don't actually *rely* on the predicate in any way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244879 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Handle the LoopInfo the same as all the other analyses. No utility
Chandler Carruth [Thu, 13 Aug 2015 09:27:01 +0000 (09:27 +0000)]
[LIR] Handle the LoopInfo the same as all the other analyses. No utility
really in breaking pattern just for this analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244878 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] SSE/AVX vector shifts demanded shift amount bits
Simon Pilgrim [Thu, 13 Aug 2015 07:39:03 +0000 (07:39 +0000)]
[InstCombine] SSE/AVX vector shifts demanded shift amount bits

Most SSE/AVX (non-constant) vector shift instructions only use the lower 64-bits of the 128-bit shift amount vector operand, this patch calls SimplifyDemandedVectorElts to optimize for this.

I had to refactor some of my recent InstCombiner work on the vector shifts to avoid quite a bit of duplicate code, it means that SimplifyX86immshift now (re)decodes the type of shift.

Differential Revision: http://reviews.llvm.org/D11938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244872 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoModify raw_svector_ostream to use its SmallString without additional buffering.
Yaron Keren [Thu, 13 Aug 2015 06:19:52 +0000 (06:19 +0000)]
Modify raw_svector_ostream to use its SmallString without additional buffering.
This is faster and avoids the stream and SmallString state synchronization issue.
resync() is a no-op and may be safely deleted.  I'll do so in a follow-up commit.

Reviewed by Rafael Espindola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244870 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopUnswitch] Check OptimizeForSize before traversing over all basic blocks in curre...
Chen Li [Thu, 13 Aug 2015 05:24:29 +0000 (05:24 +0000)]
[LoopUnswitch] Check OptimizeForSize before traversing over all basic blocks in current loop

Summary: This patch moves the check of OptimizeForSize before traversing over all basic blocks in current loop. If OptimizeForSize is set to true, no non-trivial unswitch is ever allowed. Therefore, the early exit will help reduce compilation time. This patch should be NFC.

Reviewers: reames, weimingz, broune

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11997

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244868 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGen] Mark the promoted FCOPYSIGN result FP_ROUND as TRUNCating.
Ahmed Bougacha [Thu, 13 Aug 2015 01:32:30 +0000 (01:32 +0000)]
[CodeGen] Mark the promoted FCOPYSIGN result FP_ROUND as TRUNCating.

Now that we can properly promote mismatched FCOPYSIGNs (r244858), we
can mark the FP_ROUND on the result as truncating, to expose folding.

FCOPYSIGN doesn't change anything but the sign bit, so
  (fp_round (fcopysign (fpext a), b))
is equivalent to (modulo the sign bit):
  (fp_round (fpext a))
which is a no-op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244862 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Cleanup vector-fcopysign.ll test. NFC.
Ahmed Bougacha [Thu, 13 Aug 2015 01:20:38 +0000 (01:20 +0000)]
[AArch64] Cleanup vector-fcopysign.ll test. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244861 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Also custom-lowering mismatched vector/f16 FCOPYSIGN.
Ahmed Bougacha [Thu, 13 Aug 2015 01:13:56 +0000 (01:13 +0000)]
[AArch64] Also custom-lowering mismatched vector/f16 FCOPYSIGN.

We can lower them using our cool tricks if we fpext/fptrunc the second
input, like we do for f32/f64.

Follow-up to r243924, r243926, and r244858.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244860 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGen] Assert on getNode(FP_EXTEND) with a smaller dst type.
Ahmed Bougacha [Thu, 13 Aug 2015 01:10:29 +0000 (01:10 +0000)]
[CodeGen] Assert on getNode(FP_EXTEND) with a smaller dst type.

This would have caught the problem in r244858.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244859 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGen] When Promoting, don't extend the 2nd FCOPYSIGN operand.
Ahmed Bougacha [Thu, 13 Aug 2015 01:09:43 +0000 (01:09 +0000)]
[CodeGen] When Promoting, don't extend the 2nd FCOPYSIGN operand.

We don't care about its type, and there's even a combine that'll fold
away the FP_EXTEND if we let it run. However, until it does, we'll have
something broken like:
  (f32 (fp_extend (f64 v)))

Scalar f16 follow-up to r243924.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244858 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGen] Simplify getNode(*EXT/TRUNC) type size assert. NFC.
Ahmed Bougacha [Thu, 13 Aug 2015 01:08:48 +0000 (01:08 +0000)]
[CodeGen] Simplify getNode(*EXT/TRUNC) type size assert. NFC.

We already check that vectors have the same number of elements, we
don't need to use the scalar types explicitly: comparing the size of
the whole vector is enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244857 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThere is only one saver of strings.
Rafael Espindola [Thu, 13 Aug 2015 01:07:02 +0000 (01:07 +0000)]
There is only one saver of strings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244854 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Make the LoopIdiomRecognize pass get analyses essentially the same
Chandler Carruth [Thu, 13 Aug 2015 01:03:26 +0000 (01:03 +0000)]
[LIR] Make the LoopIdiomRecognize pass get analyses essentially the same
way as every other pass. This simplifies the code quite a bit and is
also more idiomatic! <ba-dum!>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244853 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Remove the dedicated class for popcount recognition and sink the
Chandler Carruth [Thu, 13 Aug 2015 00:44:29 +0000 (00:44 +0000)]
[LIR] Remove the dedicated class for popcount recognition and sink the
code into methods on LoopIdiomRecognize.

This simplifies the code somewhat and also makes it much easier to move
the analyses around. Ultimately, the separate class wasn't providing
significant value over methods -- it contained the precondition basic
block and the current loop. The current loop is already available and
the precondition block wasn't needed everywhere and is easy to pass
around.

In several cases I just moved things to be static functions because they
already accepted most of their inputs as arguments.

This doesn't fix the way we manage analyses yet, that will be the next
patch, but it already makes the code over 50 lines shorter.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244851 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReturn ErrorOr from FileOutputBuffer::create. NFC.
Rafael Espindola [Thu, 13 Aug 2015 00:31:39 +0000 (00:31 +0000)]
Return ErrorOr from FileOutputBuffer::create. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244848 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Declare the llvm.wasm.page.size() intrinsic.
Dan Gohman [Thu, 13 Aug 2015 00:26:04 +0000 (00:26 +0000)]
[WebAssembly] Declare the llvm.wasm.page.size() intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244847 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Move all the helpers to be private and re-order the methods in
Chandler Carruth [Thu, 13 Aug 2015 00:10:03 +0000 (00:10 +0000)]
[LIR] Move all the helpers to be private and re-order the methods in
a way that groups things logically. No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244845 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest Commit - Corrected spelling in README.txt.
Steve King [Wed, 12 Aug 2015 23:56:50 +0000 (23:56 +0000)]
Test Commit - Corrected spelling in README.txt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244842 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Remove the 'LIRUtils' abstraction which was unnecessary and adding
Chandler Carruth [Wed, 12 Aug 2015 23:55:56 +0000 (23:55 +0000)]
[LIR] Remove the 'LIRUtils' abstraction which was unnecessary and adding
complexity.

There is only one function that was called from multiple locations, and
that was 'getBranch' which has a reasonable one-line spelling already:
dyn_cast<BranchInst>(BB->getTerminator). We could make this shorter, but
it doesn't seem to add much value. Instead, we should avoid calling it
so many times on the same basic blocks, but that will be in a subsequent
patch.

The other functions are only called in one location, so inline them
there, and take advantage of this to use direct early exit and reduce
indentation. This makes it much more clear what is being tested for, and
in fact makes it clear now to me that there are simpler ways to do this
work. However, this patch just does the mechanical inlining. I'll clean
up the functionality of the code to leverage loop simplified form more
effectively in a follow-up.

Despite lots of early line breaks due to early-exit, this is still
shorter than it was before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244841 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify PackedVector by removing user-defined special members that aren't any differ...
David Blaikie [Wed, 12 Aug 2015 23:26:12 +0000 (23:26 +0000)]
Simplify PackedVector by removing user-defined special members that aren't any different than the defaults

This causes the other special members (like move and copy construction,
and move assignment) to come through for free. Some code in clang was
depending on the (deprecated, in the original code) copy ctor. Now that
there's no user-defined special members, they're all available without
any deprecation concerns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244835 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIRBuilder: Use move semantics for the IRBuilderInserter parameter
David Blaikie [Wed, 12 Aug 2015 23:18:49 +0000 (23:18 +0000)]
IRBuilder: Use move semantics for the IRBuilderInserter parameter

Just drive by cleanup while fixing -Wdeprecated warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244832 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LIR] Run clang-format over LoopIdiomRecognize in preparation for
Chandler Carruth [Wed, 12 Aug 2015 23:06:37 +0000 (23:06 +0000)]
[LIR] Run clang-format over LoopIdiomRecognize in preparation for
a significant code cleanup here.

The handling of analyses in this pass is overly complex and can be
simplified significantly, but the right way to do that is to simplify
all of the code not just the analyses, and that'll require pretty
extensive edits that would be noisy with formatting changes mixed into
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244828 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Remove the AliasDebugger pass.
Chandler Carruth [Wed, 12 Aug 2015 22:54:47 +0000 (22:54 +0000)]
[PM/AA] Remove the AliasDebugger pass.

This debugger was designed to catch places where the old update API was
failing to be used correctly. As I've removed the update API, it no
longer serves any purpose. We can introduce new debugging aid passes
around any future work w.r.t. updating AAs.

Note that I've updated the documentation here, but really I need to
rewrite the documentation to carefully spell out the ideas around
stateful AA and how things are changing in the AA world. However, I'm
hoping to do that as a follow-up to the refactoring of the AA
infrastructure to work in both old and new pass managers so that I can
write the documentation specific to that world.

Differential Revision: http://reviews.llvm.org/D11984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244825 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd myself as the InstCombine owner.
David Majnemer [Wed, 12 Aug 2015 22:30:45 +0000 (22:30 +0000)]
Add myself as the InstCombine owner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244823 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RewriteStatepointsForGC] Avoid using unrelocated pointers after safepoints
Philip Reames [Wed, 12 Aug 2015 22:11:45 +0000 (22:11 +0000)]
[RewriteStatepointsForGC] Avoid using unrelocated pointers after safepoints

To be clear: this is an *optimization* not a correctness change.

CodeGenPrep likes to duplicate icmps feeding branch instructions to take advantage of x86's ability to fuze many comparison/branch patterns into a single micro-op and to reduce the need for materializing i1s into general registers. PlaceSafepoints likes to place safepoint polls right at the end of basic blocks (immediately before terminators) when inserting entry and backedge safepoints. These two heuristics interact in a somewhat unfortunate way where the branch terminating the original block will be controlled by a condition driven by unrelocated pointers. This forces the register allocator to keep both the relocated and unrelocated values of the pointers feeding the icmp alive over the safepoint poll.

One simple fix would have been to just adjust PlaceSafepoints to move one back in the basic block, but you can reach similar cases as a result of LICM or other hoisting passes. As a result, doing a post insertion fixup seems to be more robust.

I considered doing this in CodeGenPrep itself, but having to update the live sets of already rewritten safepoints gets complicated fast. In particular, you can't just use def/use information because by moving the icmp, we're extending the live range of it's inputs potentially.

Instead, this patch teaches RewriteStatepointsForGC to make the required adjustments before making the relocations explicit in the IR. This change really highlights the fact that RSForGC is a CodeGenPrep-like pass which is performing target specific lowering. In the long run, we may even want to combine the two though this would require a lot more smarts to be integrated into RSForGC first. We currently rely on being able to run a set of cleanup passes post rewriting because the IR RSForGC generates is pretty damn ugly.

Differential Revision: http://reviews.llvm.org/D11819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244821 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Allow the MI IR references to reference global values.
Alex Lorenz [Wed, 12 Aug 2015 21:27:16 +0000 (21:27 +0000)]
MIR Parser: Allow the MI IR references to reference global values.

This commit fixes a bug where MI parser couldn't resolve the named IR
references that referenced named global values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244817 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the fixed stack pseudo source values.
Alex Lorenz [Wed, 12 Aug 2015 21:23:17 +0000 (21:23 +0000)]
MIR Serialization: Serialize the fixed stack pseudo source values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244816 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNFC. Convert comments in MachineBasicBlock.cpp into new style.
Cong Hou [Wed, 12 Aug 2015 21:18:54 +0000 (21:18 +0000)]
NFC. Convert comments in MachineBasicBlock.cpp into new style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244815 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Move the parsing of fixed stack object indices into new method. NFC
Alex Lorenz [Wed, 12 Aug 2015 21:17:02 +0000 (21:17 +0000)]
MIR Parser: Move the parsing of fixed stack object indices into new method. NFC

This commit moves the code that parses the frame indices for the fixed stack
objects from the method 'parseFixedStackObjectOperand' to a new method named
'parseFixedStackFrameIndex', so that it can be reused when parsing fixed stack
pseudo source values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244814 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the jump table pseudo source values.
Alex Lorenz [Wed, 12 Aug 2015 21:11:08 +0000 (21:11 +0000)]
MIR Serialization: Serialize the jump table pseudo source values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244813 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove the object being used to move-initialize when calling the base class' constructo...
Aaron Ballman [Wed, 12 Aug 2015 21:10:41 +0000 (21:10 +0000)]
Move the object being used to move-initialize when calling the base class' constructor from the ctor-initializer. This should have no effect given the triviality of the class, but it allows for easier maintenance should the semantics of the base class change. NFC intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244812 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the GOT pseudo source values.
Alex Lorenz [Wed, 12 Aug 2015 21:00:22 +0000 (21:00 +0000)]
MIR Serialization: Serialize the GOT pseudo source values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244809 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RewriteStatepointsForGC] Handle extractelement fully in the base pointer algorithm
Philip Reames [Wed, 12 Aug 2015 21:00:20 +0000 (21:00 +0000)]
[RewriteStatepointsForGC] Handle extractelement fully in the base pointer algorithm

When rewriting the IR such that base pointers are available for every live pointer, we potentially need to duplicate instructions to propagate the base. The original code had only handled PHI and Select under the belief those were the only instructions which would need duplicated. When I added support for vector instructions, I'd added a collection of hacks for ExtractElement which caught most of the common cases. Of course, I then found the one test case my hacks couldn't cover. :)

This change removes all of the early hacks for extract element. By defining extractelement as a BDV (rather than trying to look through it), we can extend the rewriting algorithm to duplicate the extract as needed.  Note that a couple of peephole optimizations were left in for the moment, because while we now handle extractelement as a first class citizen, we're not yet handling insertelement.  That change will follow in the near future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244808 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the stack pseudo source values.
Alex Lorenz [Wed, 12 Aug 2015 20:44:16 +0000 (20:44 +0000)]
MIR Serialization: Serialize the stack pseudo source values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244806 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo; NFC
Sanjay Patel [Wed, 12 Aug 2015 20:36:18 +0000 (20:36 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244805 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate a comment; Emscripten no longer uses le32 and le64. NFC.
Dan Gohman [Wed, 12 Aug 2015 20:34:40 +0000 (20:34 +0000)]
Update a comment; Emscripten no longer uses le32 and le64. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244804 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the constant pool pseudo source values.
Alex Lorenz [Wed, 12 Aug 2015 20:33:26 +0000 (20:33 +0000)]
MIR Serialization: Serialize the constant pool pseudo source values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244803 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix missing space in libfuzzer's help text.
Lenny Maiorani [Wed, 12 Aug 2015 20:00:10 +0000 (20:00 +0000)]
Fix missing space in libfuzzer's help text.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244800 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDocs: keep copyright years up-to-date.
Hans Wennborg [Wed, 12 Aug 2015 18:27:23 +0000 (18:27 +0000)]
Docs: keep copyright years up-to-date.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244789 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Add missing static dependency edges from DSE and memdep to TLI.
Chandler Carruth [Wed, 12 Aug 2015 18:10:45 +0000 (18:10 +0000)]
[PM/AA] Add missing static dependency edges from DSE and memdep to TLI.

I forgot to add these in r244780 and r244778. Sorry about that.

Also order the static dependencies in a lexicographical order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244787 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Explicitly depend on TLI rather than getting it out of the
Chandler Carruth [Wed, 12 Aug 2015 18:06:08 +0000 (18:06 +0000)]
[PM/AA] Explicitly depend on TLI rather than getting it out of the
AliasAnalysis.

Same as the other commits, the TLI access from an alias analysis is
going away and isn't very clean -- it is better to explicitly mark the
dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244785 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Stop getting the TargetLibraryInfo out of the AliasAnalysis and
Chandler Carruth [Wed, 12 Aug 2015 18:01:44 +0000 (18:01 +0000)]
[PM/AA] Stop getting the TargetLibraryInfo out of the AliasAnalysis and
just depend on it directly.

This was particularly frustrating because there was a really wide
mixture of using a member variable and re-extracting it from the AA that
happened to be around. I think the result is much more clear.

I've also deleted all of the pointless null checks and used references
across the APIs where I could to make it explicit that this cannot be
null in a useful fashion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244780 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: floating-point comparisons
JF Bastien [Wed, 12 Aug 2015 17:53:29 +0000 (17:53 +0000)]
WebAssembly: floating-point comparisons

Summary:
D11924 implemented part of the floating-point comparisons, this patch implements the rest:
 * Tell ISelLowering that all booleans are either 0 or 1.
 * Expand the eq/ne/lt/le/gt/ge floating-point comparisons to the canonical ones (similar to what Mips32r6InstrInfo.td does).
 * Add tests for ord/uno.
 * Add tests for ueq/one/ult/ule/ugt/uge.
 * Fix existing comparison tests to remove the (res & 1) code, which setBooleanContents stops from generating.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11970

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244779 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Have memdep explicitly get and use TargetLibraryInfo rather than
Chandler Carruth [Wed, 12 Aug 2015 17:47:44 +0000 (17:47 +0000)]
[PM/AA] Have memdep explicitly get and use TargetLibraryInfo rather than
relying on sneaking it out of its AliasAnalysis.

This abuse of AA (to shuffle TLI around rather than explicitly depending
on it) is going away with my refactor of AA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244778 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse /Zc:inline when building with MSVC.
Rafael Espindola [Wed, 12 Aug 2015 17:09:25 +0000 (17:09 +0000)]
Use /Zc:inline when building with MSVC.

This reduces the total .obj size when building llvm from
496,690,342 to 219,334,936 bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244767 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCleaned up test. NFCI.
Simon Pilgrim [Wed, 12 Aug 2015 17:00:50 +0000 (17:00 +0000)]
Cleaned up test. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244765 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVer] Optionally allow using memchecks from LAA
Adam Nemet [Wed, 12 Aug 2015 16:51:19 +0000 (16:51 +0000)]
[LoopVer] Optionally allow using memchecks from LAA

r243382 changed the behavior to always require a set of memchecks to be
passed to LoopVer.  This change restores the prior behavior as an
alternative to the new behavior.  This allows the checks to be
implicitly taken from the LAA object.

Patch by Ashutosh Nema!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244763 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago80-cols; NFC
Sanjay Patel [Wed, 12 Aug 2015 15:12:25 +0000 (15:12 +0000)]
80-cols; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244755 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] Tweak a comment slightly
James Molloy [Wed, 12 Aug 2015 15:11:43 +0000 (15:11 +0000)]
[ValueTracking] Tweak a comment slightly

Hal asked for this change in D11146, but I missed it when I committed originally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244754 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo; NFC
Sanjay Patel [Wed, 12 Aug 2015 15:09:09 +0000 (15:09 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244753 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRedo "Make global aliases have symbol size equal to their type"
John Brawn [Wed, 12 Aug 2015 15:05:39 +0000 (15:05 +0000)]
Redo "Make global aliases have symbol size equal to their type"

r242520 was reverted in r244313 as the expected behaviour of the alias
attribute in C is that the alias has the same size as the aliasee. However
we can re-introduce adding the size on the alias when the aliasee does not,
from a source code or object perspective, exist as a discrete entity. This
happens when the aliasee is not a symbol, or when that symbol is private.

Differential Revision: http://reviews.llvm.org/D11943

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244752 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalMerge] Only emit aliases for internal linkage variables for non-Mach-O
John Brawn [Wed, 12 Aug 2015 13:36:48 +0000 (13:36 +0000)]
[GlobalMerge] Only emit aliases for internal linkage variables for non-Mach-O

On Mach-O emitting aliases for the variables that make up a MergedGlobals
variable can cause problems when linking with dead stripping enabled so don't
do that, except for external variables where we must emit an alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244748 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, DAHI...
Zoran Jovanovic [Wed, 12 Aug 2015 12:45:16 +0000 (12:45 +0000)]
[mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, DAHI, DATI, DEXT, DEXTM and DEXTU instructions
Differential Revision: http://reviews.llvm.org/D10923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244744 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Disable mul -> shl + lea combine when compiling for minsize
Michael Kuperstein [Wed, 12 Aug 2015 11:27:26 +0000 (11:27 +0000)]
[X86] Disable mul -> shl + lea combine when compiling for minsize

Differential Revision: http://reviews.llvm.org/D11904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244740 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Convert the last test using macho-dump under X86/ to llvm-readobj.
Davide Italiano [Wed, 12 Aug 2015 10:36:16 +0000 (10:36 +0000)]
[MC] Convert the last test using macho-dump under X86/ to llvm-readobj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244732 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Allow x86 call frame optimization to fold more loads into pushes
Michael Kuperstein [Wed, 12 Aug 2015 10:14:58 +0000 (10:14 +0000)]
[X86] Allow x86 call frame optimization to fold more loads into pushes

This abstracts away the test for "when can we fold across a MachineInstruction"
into the the MI interface, and changes call-frame optimization use the same test
the peephole optimizer users.

Differential Revision: http://reviews.llvm.org/D11945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244729 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix assert on dbg_value instructions
Matt Arsenault [Wed, 12 Aug 2015 09:04:44 +0000 (09:04 +0000)]
AMDGPU: Fix assert on dbg_value instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244728 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agounused variable warning fix.
Simon Pilgrim [Wed, 12 Aug 2015 08:23:36 +0000 (08:23 +0000)]
unused variable warning fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244725 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Move SSE/AVX vector blend folding to instcombiner
Simon Pilgrim [Wed, 12 Aug 2015 08:08:56 +0000 (08:08 +0000)]
[InstCombine] Move SSE/AVX vector blend folding to instcombiner

As discussed in D11886, this patch moves the SSE/AVX vector blend folding to instcombiner from PerformINTRINSIC_WO_CHAINCombine (which allows us to remove this completely).

InstCombiner already had partial support for this, I just had to add support for zero (ConstantAggregateZero) masks and also the case where both selection inputs were the same (allowing us to ignore the mask).

I also moved all the relevant combine tests into InstCombine/blend_x86.ll

Differential Revision: http://reviews.llvm.org/D11934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244723 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Remove unused constructor.
Craig Topper [Wed, 12 Aug 2015 06:43:10 +0000 (06:43 +0000)]
[TableGen] Remove unused constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244718 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86: hoist a condition into a variable (NFC)
Saleem Abdulrasool [Wed, 12 Aug 2015 02:01:36 +0000 (02:01 +0000)]
X86: hoist a condition into a variable (NFC)

The same value is used multiple times through the function.  Hoist the condition
into a variable.  This should fix a silly static analysis warning where the
conditions flip around.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244713 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add two flags, -tbm_depth and -tbm_width to control how the trace-based...
Kostya Serebryany [Wed, 12 Aug 2015 01:55:37 +0000 (01:55 +0000)]
[libFuzzer] add two flags, -tbm_depth and -tbm_width to control how the trace-based-mutations are applied

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244712 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add colons to the stats output to avoid confusion
Kostya Serebryany [Wed, 12 Aug 2015 01:04:27 +0000 (01:04 +0000)]
[libFuzzer] add colons to the stats output to avoid confusion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244708 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] use raw C IO to reduce the risk of a deadlock in a signal handler.
Kostya Serebryany [Wed, 12 Aug 2015 00:55:09 +0000 (00:55 +0000)]
[libFuzzer] use raw C IO to reduce the risk of a deadlock in a signal handler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244707 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for 256-bit vector FP mul/add
Sanjay Patel [Wed, 12 Aug 2015 00:29:10 +0000 (00:29 +0000)]
[x86] enable machine combiner reassociations for 256-bit vector FP mul/add

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopDist] Add test for missing coverage
Adam Nemet [Wed, 12 Aug 2015 00:21:59 +0000 (00:21 +0000)]
[LoopDist] Add test for missing coverage

Add a testcase to ensure that if we can't find bounds for a necessary
memcheck we don't distribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244703 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPseudoSourceValue: Transform the mips subclass to target independent subclasses
Alex Lorenz [Tue, 11 Aug 2015 23:23:17 +0000 (23:23 +0000)]
PseudoSourceValue: Transform the mips subclass to target independent subclasses

This commit transforms the mips-specific 'MipsCallEntry' subclass of the
'PseudoSourceValue' class into two, target-independent subclasses named
'GlobalValuePseudoSourceValue' and 'ExternalSymbolPseudoSourceValue'.

This change makes it easier to serialize the pseudo source values by removing
target-specific pseudo source values.

Reviewers: Akira Hatanaka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244698 91177308-0d34-0410-b5e6-96231b3b80d8