oota-llvm.git
8 years ago[LLVM-C] Add LLVM{IsConstantString,GetAsString,GetElementAsConstant}.
Peter Zotov [Sun, 3 Aug 2014 23:54:16 +0000 (23:54 +0000)]
[LLVM-C] Add LLVM{IsConstantString,GetAsString,GetElementAsConstant}.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214676 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAccount for possible leading '.' in label string.
Sanjay Patel [Sun, 3 Aug 2014 23:20:16 +0000 (23:20 +0000)]
Account for possible leading '.' in label string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214674 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Don't add nodes to the combined set (and prune subsequent
Chandler Carruth [Sun, 3 Aug 2014 23:10:59 +0000 (23:10 +0000)]
[x86] Don't add nodes to the combined set (and prune subsequent
combines) until they are legal.

Doing it the old way could, when the stars align *just* right, cause
a node to get into the combine set prior to being legalized. Then, when
the same node showed up as an operand to another node later on (but not
so much later on that it had been deleted as dead) we would fail to add
it back to the worklist thinking it had already been combined. This
would in turn cause it to not be legalized. Fortunately, we can also
walk the operands looking for uncombined (and thus potentially
un-legalized) nodes late. It will still ensure that we walk all operands
of all nodes and send all of them through both the legalizer without
changes and the combiner at least once. (Which was the original goal of
this).

I have a test case for this bug, but it is terribly brittle. For
example, it will stop finding the bug the moment I enable the new
shuffle lowering. I don't yet have any test case that reliably exercises
this bug, and it isn't clear that it will be possible to craft one. It
is entirely possible that with the new shuffle lowering the two forms of
doing this are precisely equivalent. That doesn't mean we shouldn't take
the more conservative approach of insisting on things in the combined
set having survived the legalizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214673 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoX86: silence warning (-Wparentheses)
Saleem Abdulrasool [Sun, 3 Aug 2014 23:00:39 +0000 (23:00 +0000)]
X86: silence warning (-Wparentheses)

GCC 4.8.2 points out the ambiguity in evaluation of the assertion condition:

lib/Target/X86/X86FloatingPoint.cpp:949:49: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
   assert(STReturns == 0 || isMask_32(STReturns) && N <= 2);

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214672 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: silence a warning
Saleem Abdulrasool [Sun, 3 Aug 2014 23:00:38 +0000 (23:00 +0000)]
CodeGen: silence a warning

GCC 4.8.2 objects to the tautological condition in the assert as the unsigned
value is guaranteed to be >= 0.  Simplify the assertion by dropping the
tautological condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214671 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix for PR20354 - Miscompile of fabs due to vectorization
Sanjay Patel [Sun, 3 Aug 2014 22:48:23 +0000 (22:48 +0000)]
fix for PR20354 - Miscompile of fabs due to vectorization

This is intended to be the minimal change needed to fix PR20354 ( http://llvm.org/bugs/show_bug.cgi?id=20354 ). The check for a vector operation was wrong; we need to check that the fabs itself is not a vector operation.

This patch will not generate the optimal code. A constant pool load and 'and' op will be generated instead of just returning a value that we can calculate in advance (as we do for the scalar case). I've put a 'TODO' comment for that here and expect to have that patch ready soon.

There is a very similar optimization that we can do in visitFNEG, so I've put another 'TODO' there and expect to have another patch for that too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214670 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMachineCombiner Pass for selecting faster instruction
Gerolf Hoflehner [Sun, 3 Aug 2014 22:03:40 +0000 (22:03 +0000)]
MachineCombiner Pass for selecting faster instruction
 sequence -  AArch64 target support

 This patch turns off madd/msub generation in the DAGCombiner and generates
 them in the MachineCombiner instead. It replaces the original code sequence
 with the combined sequence when it is beneficial to do so.

 When there is no machine model support it always generates the madd/msub
 instruction. This is true also when the objective is to optimize for code
 size: when the combined sequence is shorter is always chosen and does not
 get evaluated.

 When there is a machine model the combined instruction sequence
 is evaluated for critical path and resource length using machine
 trace metrics and the original code sequence is replaced when it is
 determined to be faster.

 rdar://16319955

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214669 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMachineCombiner Pass for selecting faster instruction
Gerolf Hoflehner [Sun, 3 Aug 2014 21:35:39 +0000 (21:35 +0000)]
MachineCombiner Pass for selecting faster instruction
 sequence -  target independent framework

 When the DAGcombiner selects instruction sequences
 it could increase the critical path or resource len.

 For example, on arm64 there are multiply-accumulate instructions (madd,
 msub). If e.g. the equivalent  multiply-add sequence is not on the
 crictial path it makes sense to select it instead of  the combined,
 single accumulate instruction (madd/msub). The reason is that the
 conversion from add+mul to the madd could lengthen the critical path
 by the latency of the multiply.

 But the DAGCombiner would always combine and select the madd/msub
 instruction.

 This patch uses machine trace metrics to estimate critical path length
 and resource length of an original instruction sequence vs a combined
 instruction sequence and picks the faster code based on its estimates.

 This patch only commits the target independent framework that evaluates
 and selects code sequences. The machine instruction combiner is turned
 off for all targets and expected to evolve over time by gradually
 handling DAGCombiner pattern in the target specific code.

 This framework lays the groundwork for fixing
 rdar://16319955

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214666 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMC: virtualise EmitWindowsUnwindTables
Saleem Abdulrasool [Sun, 3 Aug 2014 18:51:26 +0000 (18:51 +0000)]
MC: virtualise EmitWindowsUnwindTables

This makes EmitWindowsUnwindTables a virtual function and lowers the
implementation of the function to the X86WinCOFFStreamer.  This method is a
target specific operation.  This enables making the behaviour target dependent
by isolating it entirely to the target specific streamer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214664 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMC: rename Win64EHFrameInfo to WinEH::FrameInfo
Saleem Abdulrasool [Sun, 3 Aug 2014 18:51:17 +0000 (18:51 +0000)]
MC: rename Win64EHFrameInfo to WinEH::FrameInfo

The frame information stored in this structure is driven by the requirements for
Windows NT unwinding rather than Windows 64 specifically.  As a result, this
type can be shared across multiple architectures (ARM, AXP, MIPS, PPC, SH).
Rename this class in preparation for adding support for supporting unwinding
information for Windows on ARM.

Take the opportunity to constify the members as everything except the
ChainedParent is read-only.  This required some adjustment to the label
handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214663 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600/SI: Fix extra whitespace in asm str
Matt Arsenault [Sun, 3 Aug 2014 05:27:14 +0000 (05:27 +0000)]
R600/SI: Fix extra whitespace in asm str

This slipped in in r214467, so something like

V_MOV_B32_e32  v0, ... is now printed with 2 spaces
between the instruction name and first operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214660 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SimplifyCFG] fix accessing deleted PHINodes in switch-to-table conversion.
Manman Ren [Sat, 2 Aug 2014 23:41:54 +0000 (23:41 +0000)]
[SimplifyCFG] fix accessing deleted PHINodes in switch-to-table conversion.

When we have a covered lookup table, make sure we don't delete PHINodes that
are cached in PHIs.

rdar://17887153

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214642 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agotlbia support
Joerg Sonnenberger [Sat, 2 Aug 2014 20:16:29 +0000 (20:16 +0000)]
tlbia support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214640 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agomfdcr / mtdcr support
Joerg Sonnenberger [Sat, 2 Aug 2014 20:00:26 +0000 (20:00 +0000)]
mfdcr / mtdcr support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214639 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix bug 20513 - Crash in SLP Vectorizer
Erik Eckstein [Sat, 2 Aug 2014 19:39:42 +0000 (19:39 +0000)]
fix bug 20513 - Crash in SLP Vectorizer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214638 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate test to use a more modern AArch64 triple, as requested by Renato.
James Molloy [Sat, 2 Aug 2014 17:15:11 +0000 (17:15 +0000)]
Update test to use a more modern AArch64 triple, as requested by Renato.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214637 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDon't use additional arguments for dss and friends to satisfy DSS_Form,
Joerg Sonnenberger [Sat, 2 Aug 2014 15:09:41 +0000 (15:09 +0000)]
Don't use additional arguments for dss and friends to satisfy DSS_Form,
when let can do the same thing. Keep the 64bit variants as codegen-only.
While they have a different register class, the encoding is the same for
32bit and 64bit mode. Having both present would otherwise confuse the
disassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214636 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Teach DAGCombiner that converting two consecutive loads into a vector load...
James Molloy [Sat, 2 Aug 2014 14:51:24 +0000 (14:51 +0000)]
[AArch64] Teach DAGCombiner that converting two consecutive loads into a vector load is not a good transform when paired loads are available.

The combiner was creating Q-register loads and stores, which then had to be spilled because there are no callee-save Q registers!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214634 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Remove the FIXME that was implemented in r214628. Managed to
Chandler Carruth [Sat, 2 Aug 2014 11:34:23 +0000 (11:34 +0000)]
[x86] Remove the FIXME that was implemented in r214628. Managed to
forget to update the comment here... =/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214630 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Give this test a bare metal triple so it doesn't use the weird
Chandler Carruth [Sat, 2 Aug 2014 11:17:41 +0000 (11:17 +0000)]
[x86] Give this test a bare metal triple so it doesn't use the weird
Darwin x86 asm comment prefix designed to work around GAS on that
platform. That makes the comment-matching of the test much more stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214629 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Largely complete the use of PSHUFB in the new vector shuffle
Chandler Carruth [Sat, 2 Aug 2014 10:39:15 +0000 (10:39 +0000)]
[x86] Largely complete the use of PSHUFB in the new vector shuffle
lowering with a small addition to it and adding PSHUFB combining.

There is one obvious place in the new vector shuffle lowering where we
should form PSHUFBs directly: when without them we will unpack a vector
of i8s across two different registers and do a potentially 4-way blend
as i16s only to re-pack them into i8s afterward. This is the crazy
expensive fallback path for i8 shuffles and we can just directly use
pshufb here as it will always be cheaper (the unpack and pack are
two instructions so even a single shuffle between them hits our
three instruction limit for forming PSHUFB).

However, this doesn't generate very good code in many cases, and it
leaves a bunch of common patterns not using PSHUFB. So this patch also
adds support for extracting a shuffle mask from PSHUFB in the X86
lowering code, and uses it to handle PSHUFBs in the recursive shuffle
combining. This allows us to combine through them, combine multiple ones
together, and generally produce sufficiently high quality code.

Extracting the PSHUFB mask is annoyingly complex because it could be
either pre-legalization or post-legalization. At least this doesn't have
to deal with re-materialized constants. =] I've added decode routines to
handle the different patterns that show up at this level and we dispatch
through them as appropriate.

The two primary test cases are updated. For the v16 test case there is
still a lot of room for improvement. Since I was going through it
systematically I left behind a bunch of FIXME lines that I'm hoping to
turn into ALL lines by the end of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214628 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Switch to using the variable we extracted this operand into.
Chandler Carruth [Sat, 2 Aug 2014 10:29:36 +0000 (10:29 +0000)]
[x86] Switch to using the variable we extracted this operand into.

Spotted this missed refactoring by inspection when reading code, and it
doesn't changethe functionality at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214627 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Fix a few typos in my comments spotted in passing.
Chandler Carruth [Sat, 2 Aug 2014 10:29:34 +0000 (10:29 +0000)]
[x86] Fix a few typos in my comments spotted in passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214626 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Teach the target shuffle mask extraction to recognize unary forms
Chandler Carruth [Sat, 2 Aug 2014 10:27:38 +0000 (10:27 +0000)]
[x86] Teach the target shuffle mask extraction to recognize unary forms
of normally binary shuffle instructions like PUNPCKL and MOVLHPS.

This detects cases where a single register is used for both operands
making the shuffle behave in a unary way. We detect this and adjust the
mask to use the unary form which allows the existing DAG combine for
shuffle instructions to actually work at all.

As a consequence, this uncovered a number of obvious bugs in the
existing DAG combine which are fixed. It also now canonicalizes several
shuffles even with the existing lowering. These typically are trying to
match the shuffle to the domain of the input where before we only really
modeled them with the floating point variants. All of the cases which
change to an integer shuffle here have something in the integer domain, so
there are no more or fewer domain crosses here AFAICT. Technically, it
might be better to go from a GPR directly to the floating point domain,
but detecting floating point *outputs* despite integer inputs is a lot
more code and seems unlikely to be worthwhile in practice. If folks are
seeing domain-crossing regressions here though, let me know and I can
hack something up to fix it.

Also as a consequence, a bunch of missed opportunities to form pshufb
now can be formed. Notably, splats of i8s now form pshufb.
Interestingly, this improves the existing splat lowering too. We go from
3 instructions to 1. Yes, we may tie up a register, but it seems very
likely to be worth it, especially if splatting the 0th byte (the
common case) as then we can use a zeroed register as the mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214625 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Teach my pshufb comment printer to handle VPSHUFB forms as well as
Chandler Carruth [Sat, 2 Aug 2014 10:08:17 +0000 (10:08 +0000)]
[x86] Teach my pshufb comment printer to handle VPSHUFB forms as well as
PSHUFB forms. This will be important to update some AVX tests when I add
PSHUFB combining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214624 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SDAG] Refactor the code which deletes nodes in the DAG combiner to do
Chandler Carruth [Sat, 2 Aug 2014 10:02:07 +0000 (10:02 +0000)]
[SDAG] Refactor the code which deletes nodes in the DAG combiner to do
so using a single helper which adds operands back onto the worklist.

Several places didn't rigorously do this but a couple already did.
Factoring them together and doing it rigorously is important to delete
things recursively early on in the combiner and get a chance to see
accurate hasOneUse values. While no existing test cases change, an
upcoming patch to add DAG combining logic for PSHUFB requires this to
work correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214623 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix issues with ISD::FNEG and ISD::FMA SDNodes where they would not be constant-folded
Owen Anderson [Sat, 2 Aug 2014 08:45:33 +0000 (08:45 +0000)]
Fix issues with ISD::FNEG and ISD::FMA SDNodes where they would not be constant-folded
during DAGCombine in certain circumstances.  Unfortunately, the circumstances required
to trigger the issue seem to require a pretty specific interaction of DAGCombines,
and I haven't been able to find a testcase that reproduces on X86, ARM, or AArch64.
The functionality added here is replicated in essentially every other DAG combine,
so it seems pretty obviously correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214622 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Remove commented out code
Justin Bogner [Sat, 2 Aug 2014 06:47:07 +0000 (06:47 +0000)]
CodeGen: Remove commented out code

These two lines have been commented out for over 4 years. They aren't
helping anyone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214615 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly
Akira Hatanaka [Sat, 2 Aug 2014 05:40:40 +0000 (05:40 +0000)]
[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly
expanding pseudo LOAD_STATCK_GUARD using instructions that are normally used
in pic mode. This patch fixes the bug.

<rdar://problem/17886592>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214614 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MCJIT] Fix an overly-aggressive check in RuntimeDyldMachOARM.
Lang Hames [Sat, 2 Aug 2014 03:00:49 +0000 (03:00 +0000)]
[MCJIT] Fix an overly-aggressive check in RuntimeDyldMachOARM.

This should fix the MachO_ARM_PIC_relocations.s test failures on some 32-bit
testers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214613 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600: Cleanup fneg tests
Matt Arsenault [Sat, 2 Aug 2014 02:26:51 +0000 (02:26 +0000)]
R600: Cleanup fneg tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214612 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a small utility called bisect that enables commandline bisecting on a counter.
Michael Gottesman [Sat, 2 Aug 2014 01:39:08 +0000 (01:39 +0000)]
Add a small utility called bisect that enables commandline bisecting on a counter.

This is something that I have found to be very useful in my work and I
wanted to contribute it back to the community since several people in
the past have asked me for something along these lines. (Jakob, I know
this has been a while coming ; )]

The way you use this is you create a script that takes in as its first
argument a count. The script passes into LLVM the count via a command
line flag that disables a pass after LLVM has run after the pass has
run for count number of times. Then the script invokes a test of some
sort and indicates whether LLVM successfully compiled the test via the
scripts exit status. Then you invoke bisect as follows:

bisect --start=<start_num> --end=<end_num> ./script.sh "%(count)s"

And bisect will continually call ./script.sh with various counts using
the exit status to determine success and failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214610 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[lit] Add --show-xfail flag to LIT.
Eric Fiselier [Sat, 2 Aug 2014 01:29:52 +0000 (01:29 +0000)]
[lit] Add --show-xfail flag to LIT.

Summary:
This patch add a --show-xfail flag. If this flag is specified then each xfail test will be printed to output.
When it is not given xfail tests are ignored. Ignoring xfail tests is the current behavior.

This flag is meant to mirror the --show-unsupported flag that was recently added.

Reviewers: ddunbar, EricWF

Reviewed By: EricWF

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4750

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214609 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600/SI: Fix formatting.
Matt Arsenault [Sat, 2 Aug 2014 01:10:28 +0000 (01:10 +0000)]
R600/SI: Fix formatting.

Avoid weird line wrapping of BuildMI dest register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214608 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] Make some questionable tests not spew assembly to stdout, which
Chandler Carruth [Sat, 2 Aug 2014 00:50:10 +0000 (00:50 +0000)]
[x86] Make some questionable tests not spew assembly to stdout, which
makes a mess of the lit output when they ultimately fail.

The 2012-10-02-DAGCycle test is really frustrating because the *only*
explanation for what it is testing is a rdar link. I would really rather
that rdar links (which are not public or part of the open source
project) were not committed to the source code. Regardless, the actual
problem *must* be described as the rdar link is completely opaque. The
fact that this test didn't check for any particular output further
exacerbates the inability of any other developer to debug failures.

The mem-promote-integers test has nice comments and *seems* to be
a great test for our lowering... except that we don't actually check
that any of the generated code is correct or matches some pattern. We
just avoid crashing. It would be great to go back and populate this test
with the actual expectations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214605 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ASan] Use metadata to pass source-level information from Clang to ASan.
Alexey Samsonov [Sat, 2 Aug 2014 00:35:50 +0000 (00:35 +0000)]
[ASan] Use metadata to pass source-level information from Clang to ASan.

Instead of creating global variables for source locations and global names,
just create metadata nodes and strings. They will be transformed into actual
globals in the instrumentation pass (if necessary). This approach is more
flexible:
1) we don't have to ensure that our custom globals survive all the optimizations
2) if globals are discarded for some reason, we will simply ignore metadata for them
   and won't have to erase corresponding globals
3) metadata for source locations can be reused for other purposes: e.g. we may
   attach source location metadata to alloca instructions and provide better descriptions
   for stack variables in ASan error reports.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214604 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SDAG] Allow the legalizer to delete an illegally typed intermediate
Chandler Carruth [Sat, 2 Aug 2014 00:24:54 +0000 (00:24 +0000)]
[SDAG] Allow the legalizer to delete an illegally typed intermediate
introduced during legalization. This pattern is based on other patterns
in the legalizer that I changed in the same way. Now, the legalizer
eagerly collects its garbage when necessary so that we can survive
leaving such nodes around for it.

Instead, we add an assert to make sure the node will be correctly
handled by that layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214602 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SDAG] Let the DAG combiner take care of dead nodes rather than manually
Chandler Carruth [Sat, 2 Aug 2014 00:19:10 +0000 (00:19 +0000)]
[SDAG] Let the DAG combiner take care of dead nodes rather than manually
deleting them. This already seems to work, as no tests fail without
this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214601 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd diagnostics to the vectorizer cost model.
Tyler Nowicki [Sat, 2 Aug 2014 00:14:03 +0000 (00:14 +0000)]
Add diagnostics to the vectorizer cost model.

When the cost model determines vectorization is not possible/profitable these remarks print an analysis of that decision.

Note that in selectVectorizationFactor() we can assume that OptForSize and ForceVectorization are mutually exclusive.

Reviewed by Arnold Schwaighofer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214599 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoBitcodeTests: Fix LINK_COMPONENTS.
NAKAMURA Takumi [Sat, 2 Aug 2014 00:12:54 +0000 (00:12 +0000)]
BitcodeTests: Fix LINK_COMPONENTS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214598 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoverify-uselistorder: Reverse use-lists at every verification
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 23:49:41 +0000 (23:49 +0000)]
verify-uselistorder: Reverse use-lists at every verification

Updated `verify-uselistorder` to more than double the number of use-list
orders it checks.

  - Every time it verifies an order, it then reverses the order and
    verifies again.

  - It now verifies the initial order, before running any shuffles.

Changed the default to `-num-shuffles=1`, since this is already four
checks, and after r214584 shuffling is guaranteed to make a new order.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214596 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoverify-uselistorder: Add missing `static`
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 23:31:13 +0000 (23:31 +0000)]
verify-uselistorder: Add missing `static`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214595 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoIR: Add Value::reverseUseList()
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 23:28:49 +0000 (23:28 +0000)]
IR: Add Value::reverseUseList()

I'm going to use this to improve `verify-uselistorder`.  Part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214594 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoPartiallyInlineLibCalls: Check sqrt result type before transforming it.
Peter Collingbourne [Fri, 1 Aug 2014 23:21:21 +0000 (23:21 +0000)]
PartiallyInlineLibCalls: Check sqrt result type before transforming it.

Some configure scripts declare this with the wrong prototype, which can lead
to an assertion failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214593 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoverify-uselistorder: Move shuffleUseLists() out of lib/IR
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 23:03:36 +0000 (23:03 +0000)]
verify-uselistorder: Move shuffleUseLists() out of lib/IR

`shuffleUseLists()` is only used in `verify-uselistorder`, so move it
there to avoid bloating other executables.  As a drive-by, update some
of the header docs.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214592 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCleanup this test some more.
Adrian Prantl [Fri, 1 Aug 2014 23:01:32 +0000 (23:01 +0000)]
Cleanup this test some more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214591 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd the missing target triple to this testcase.
Adrian Prantl [Fri, 1 Aug 2014 23:01:30 +0000 (23:01 +0000)]
Add the missing target triple to this testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214590 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAttempt to increase the overall happiness of the MSCV-based buildbots.
Adrian Prantl [Fri, 1 Aug 2014 22:56:10 +0000 (22:56 +0000)]
Attempt to increase the overall happiness of the MSCV-based buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214588 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoverify-uselistorder: Make the verification logic easier to reuse
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 22:52:06 +0000 (22:52 +0000)]
verify-uselistorder: Make the verification logic easier to reuse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214587 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoInstrProf: Allow multiple functions with the same name
Justin Bogner [Fri, 1 Aug 2014 22:50:07 +0000 (22:50 +0000)]
InstrProf: Allow multiple functions with the same name

This updates the instrumentation based profiling format so that when
we have multiple functions with the same name (but different function
hashes) we keep all of them instead of rejecting the later ones.

There are a number of scenarios where this can come up where it's more
useful to keep multiple function profiles:

* Name collisions in unrelated libraries that are profiled together.
* Multiple "main" functions from multiple tools built against a common
  library.
* Combining profiles from different build configurations (ie, asserts
  and no-asserts)

The profile format now stores the number of counters between the hash
and the counts themselves, so that multiple sets of counts can be
stored. Since this is backwards incompatible, I've bumped the format
version and added some trivial logic to skip this when reading the old
format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214585 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUseListOrder: Guarantee that shuffles change use-list order
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 22:50:04 +0000 (22:50 +0000)]
UseListOrder: Guarantee that shuffles change use-list order

Change shuffleUseLists() always to change use-list order by rejecting
orders that have no changes.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214584 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUseListOrder: Fix blockaddress use-list order
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 22:27:19 +0000 (22:27 +0000)]
UseListOrder: Fix blockaddress use-list order

`parseBitcodeFile()` uses the generic `getLazyBitcodeFile()` function as
a helper.  Since `parseBitcodeFile()` isn't actually lazy -- it calls
`MaterializeAllPermanently()` -- bypass the unnecessary call to
`materializeForwardReferencedFunctions()` by extracting out a common
helper function.  This removes the last of the use-list churn caused by
blockaddresses.

This highlights that we can't reproduce use-list order of globals and
constants when parsing lazily -- but that's necessarily out of scope.
When we're parsing lazily, we never have all the functions in memory, so
the use-lists of globals (and constants that reference globals) are
always incomplete.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214581 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] Simplify X87 stackifier pass.
Akira Hatanaka [Fri, 1 Aug 2014 22:19:41 +0000 (22:19 +0000)]
[X86] Simplify X87 stackifier pass.

Stop using ST registers for function returns and inline-asm instructions and use
FP registers instead. This allows removing a large amount of code in the
stackifier pass that was needed to track register liveness and handle copies
between ST and FP registers and function calls returning floating point values.

It also fixes a bug which manifests when an ST register defined by an
inline-asm instruction was live across another inline-asm instruction, as shown
in the following sequence of machine instructions:

1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5>
2. INLINEASM <es:fldcw $0>
3. %FP0<def> = COPY %ST0

<rdar://problem/16952634>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214580 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel...
NAKAMURA Takumi [Fri, 1 Aug 2014 22:15:38 +0000 (22:15 +0000)]
llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214578 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDebug info: Infrastructure to support debug locations for fragmented
Adrian Prantl [Fri, 1 Aug 2014 22:11:58 +0000 (22:11 +0000)]
Debug info: Infrastructure to support debug locations for fragmented
variables (for example, by-value struct arguments passed in registers, or
large integer values split across several smaller registers).
On the IR level, this adds a new type of complex address operation OpPiece
to DIVariable that describes size and offset of a variable fragment.
On the DWARF emitter level, all pieces describing the same variable are
collected, sorted and emitted as DWARF expressions using the DW_OP_piece
and DW_OP_bit_piece operators.

http://reviews.llvm.org/D3373
rdar://problem/15928306

What this patch doesn't do / Future work:
- This patch only adds the backend machinery to make this work, patches
  that change SROA and SelectionDAG's type legalizer to actually create
  such debug info will follow. (http://reviews.llvm.org/D2680)
- Making the DIVariable complex expressions into an argument of dbg.value
  will reduce the memory footprint of the debug metadata.
- The sorting/uniquing of pieces should be moved into DebugLocEntry,
  to facilitate the merging of multi-piece entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214576 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SDAG] MorphNodeTo recursively deletes dead operands of the old
Chandler Carruth [Fri, 1 Aug 2014 22:09:43 +0000 (22:09 +0000)]
[SDAG] MorphNodeTo recursively deletes dead operands of the old
fromulation of the node, which isn't really the desired behavior from
within the combiner or legalizer, but is necessary within ISel. I've
added a hopefully helpful comment and fixed the only two places where
this took place.

Yet another step toward the combiner and legalizer not needing to use
update listeners with virtual calls to manage the worklists behind
legalization and combining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214574 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp"
Tom Stellard [Fri, 1 Aug 2014 21:55:50 +0000 (21:55 +0000)]
Revert "R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp"

This reverts commit r214566.

I did not mean to commit this yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214572 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMS inline asm: Hide symbol to attempt to fix test failure on darwin
Reid Kleckner [Fri, 1 Aug 2014 21:54:37 +0000 (21:54 +0000)]
MS inline asm: Hide symbol to attempt to fix test failure on darwin

If the symbol comes from an external DSO, it apparently requires
indirection through a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214571 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoBitcodeReader: Change mechanics of BlockAddress forward references, NFC
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:51:52 +0000 (21:51 +0000)]
BitcodeReader: Change mechanics of BlockAddress forward references, NFC

Now that we can reliably handle forward references to `BlockAddress`
(r214563), change the mechanics to simplify predicting use-list order.

Previously, we created dummy `GlobalVariable`s to represent block
addresses.  After every function was materialized, we'd go through any
forward references to its blocks and RAUW them with a proper
`BlockAddress` constant.  This causes some (potentially a lot of)
unnecessary use-list churn, since any constant expression that it's a
part of will need to be rematerialized as well.

Instead, pre-construct a `BasicBlock` immediately -- without attaching
it to its (empty) `Function` -- and use that to construct a
`BlockAddress`.  This constant will not have to be regenerated.  When
the function body is parsed, hook this pre-constructed basic block up
in the right place using `BasicBlock::insertInto()`.

Both before and after this change, the IR is temporarily in an invalid
state that gets resolved when `materializeForwardReferencedFunctions()`
gets called.

This is a prep commit that's part of PR5680, but the only functionality
change is the reduction of churn in the constant pool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214570 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600/SI: Remove leftover debugging code
Tom Stellard [Fri, 1 Aug 2014 21:51:05 +0000 (21:51 +0000)]
R600/SI: Remove leftover debugging code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214569 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp
Tom Stellard [Fri, 1 Aug 2014 21:50:47 +0000 (21:50 +0000)]
R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp

SI doesn't use REGISTER_LOAD anymore, but it was still hitting this code
path for 8-bit and 16-bit private loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214566 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agodocs: Strongly recommend setting rpath when using a local GCC toolchain
Reid Kleckner [Fri, 1 Aug 2014 21:40:53 +0000 (21:40 +0000)]
docs: Strongly recommend setting rpath when using a local GCC toolchain

Users keep emailing us about the difficulties of getting LD_LIBRARY_PATH
into their environment, which should be completely unecessary. Try to
strengthen the rpath recommentation by putting in an example cmake
invocation.

Speaking of which, we might want to make CMake the recommended build
system in GettingStarted.html.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214565 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoIR: Add BasicBlock::insertInto()
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:22:04 +0000 (21:22 +0000)]
IR: Add BasicBlock::insertInto()

Although unlinked `BasicBlock`s can be created, there's currently no way
to insert them into `Function`s after the fact.  In particular,
`moveAfter()` and `moveBefore()` require that the basic block is already
linked.

Extract the logic for initially linking a `BasicBlock` out of the
constructor and into a member function that can be used for lazy
insertion.

  - Asserts that the basic block is currently unlinked.
  - Matches the logic of the constructor.
  - Changed the constructor to use it since the logic matches.

This is needed in a follow-up commit for PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214563 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[dfsan] Correctly handle loads and stores of zero size.
Peter Collingbourne [Fri, 1 Aug 2014 21:18:18 +0000 (21:18 +0000)]
[dfsan] Correctly handle loads and stores of zero size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214561 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a non-const subtarget returning function to the target machine
Eric Christopher [Fri, 1 Aug 2014 21:18:01 +0000 (21:18 +0000)]
Add a non-const subtarget returning function to the target machine
so that we can use it to get the old-style JIT out of the subtarget.

This code should be removed when the old-style JIT is removed
(imminently).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214560 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoBitcodeReader: Fix some BlockAddress forward reference corner cases
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:11:34 +0000 (21:11 +0000)]
BitcodeReader: Fix some BlockAddress forward reference corner cases

`BlockAddress`es are interesting in that they can reference basic blocks
from *outside* the block's function.  Since basic blocks are not global
values, this presents particular challenges for lazy parsing.

One corner case was found in PR11677 and fixed in r147425.  In that
case, a global variable references a block address.  It's necessary to
load the relevant function to resolve the forward reference before doing
anything with the module.

By inspection, I found (and have fixed here) two other cases:

  - An instruction from one function references a block address from
    another function, and only the first function is lazily loaded.

    I fixed this the same way as PR11677: by eagerly loading the
    referenced function.

  - A function whose block address is taken is dematerialized, leaving
    invalid references to it.

    I fixed this by refusing to dematerialize functions whose block
    addresses are taken (if you have to load it, you can't unload it).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214559 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTry to fix configure+make after r214556
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:06:59 +0000 (21:06 +0000)]
Try to fix configure+make after r214556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214558 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRewrite BitReaderTest, NFC
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:01:04 +0000 (21:01 +0000)]
Rewrite BitReaderTest, NFC

Rewrite the single unit test in `BitReaderTest` so that it's easier to
add more tests.

  - Parse from an assembly string rather than using API.
  - Use more helper functions.
  - Use a separate context for the module on the other side.

Aside from relying on the assembly parser, there's no functionality
change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214556 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMS inline asm: Use memory constraints for functions instead of registers
Reid Kleckner [Fri, 1 Aug 2014 20:21:24 +0000 (20:21 +0000)]
MS inline asm: Use memory constraints for functions instead of registers

This is consistent with how we parse them in a standalone .s file, and
inline assembly shouldn't differ.

This fixes errors about requiring more registers than available in
cases like this:
  void f();
  void __declspec(naked) g() {
    __asm pusha
    __asm call f
    __asm popa
    __asm ret
  }

There are no registers available to pass the address of 'f' into the asm
blob.  The asm should now directly call 'f'.

Tests will land in Clang shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214550 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-profdata: Replace redundant tests with more targeted ones
Justin Bogner [Fri, 1 Aug 2014 19:59:48 +0000 (19:59 +0000)]
llvm-profdata: Replace redundant tests with more targeted ones

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214548 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SDAG] Begin simplifying the way in which the legalizer deletes nodes.
Chandler Carruth [Fri, 1 Aug 2014 19:49:59 +0000 (19:49 +0000)]
[SDAG] Begin simplifying the way in which the legalizer deletes nodes.

This lifts the (very few) places the legalizer would delete dead nodes
into the outer loop around the legalizer. This is significantly simpler
because it doesn't require the legalizer itself to manage the iterator
validity, and it doesn't require the legalizer to be a DAG update
listener in order to remove things from the legalized set. It also makes
the interface much less contrived for the case of the legalizer running
inside the last phase of DAG combining.

I'm working on centralizing the deletion of nodes during both legalizing
and combining as much as possible. My hope is to remove the need for DAG
update listeners from the combiner next, which would remove a costly
virtual dispatch chain on every deletion. This in turn should allow us
to more aggressively delete DAG nodes during combining which will in
turn allow us to combine more aggressively by exposing the actual nodes
which have single users to the combine phases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214546 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[FastISel][AArch64] Fold offset into the memory operation.
Juergen Ributzka [Fri, 1 Aug 2014 19:40:16 +0000 (19:40 +0000)]
[FastISel][AArch64] Fold offset into the memory operation.

Fold simple offsets into the memory operation:
  add x0, x0, #8
  ldr x0, [x0]
-->
  ldr x0, [x0, #8]

Fixes <rdar://problem/17887945>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214545 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoInclude Archive.h
Rafael Espindola [Fri, 1 Aug 2014 19:28:15 +0000 (19:28 +0000)]
Include Archive.h

MSVC was complaining about Archive being an incomplete type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214542 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix building with in-tree libc++abi on FreeBSD
Viktor Kutuzov [Fri, 1 Aug 2014 19:23:15 +0000 (19:23 +0000)]
Fix building with in-tree libc++abi on FreeBSD
Differential Revision: http://reviews.llvm.org/D4743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214541 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMove virtual method out of line.
Rafael Espindola [Fri, 1 Aug 2014 18:49:24 +0000 (18:49 +0000)]
Move virtual method out of line.

Should fix the MSVC build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214539 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd support for StackMap section for ELF/Linux systems
Philip Reames [Fri, 1 Aug 2014 18:47:09 +0000 (18:47 +0000)]
Add support for StackMap section for ELF/Linux systems

This patch adds code to emits the StackMap section on ELF systems. This section is required to support llvm.experimental.stackmap and llvm.experimental.patchpoint intrinsics.

Reviewers: ributzka, echristo

Differential Revision: http://reviews.llvm.org/D4574

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214538 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[FastISel][AArch64] Add branch weights.
Juergen Ributzka [Fri, 1 Aug 2014 18:39:24 +0000 (18:39 +0000)]
[FastISel][AArch64] Add branch weights.

Add branch weights to branch instructions, so that the following passes can
optimize based on it (i.e. basic block ordering).

Fixes <rdar://problem/17887137>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214537 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse object::Archive::create instead of new object::Archive.
Rafael Espindola [Fri, 1 Aug 2014 18:31:17 +0000 (18:31 +0000)]
Use object::Archive::create instead of new object::Archive.

Also fix the error handling. No testcaes, issue found by inspection.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214535 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoExplicitly report runtime stack realignment in StackMap section
Philip Reames [Fri, 1 Aug 2014 18:26:27 +0000 (18:26 +0000)]
Explicitly report runtime stack realignment in StackMap section

This change adds code to explicitly mark a function which requires runtime stack realignment as not having a fixed frame size in the StackMap section. As it happens, this is not actually a functional change. The size that would be reported without the check is also "-1", but as far as I can tell, that's an accident. The code change makes this explicit.

Note: There's a separate bug in handling of stackmaps and patchpoints in functions which need dynamic frame realignment. The current code assumes that offsets can be calculated from RBP, but realigned frames must use RSP. (There's a variable gap between RBP and the spill slots.) This change set does not address that issue.

Reviewers: atrick, ributzka

Differential Revision: http://reviews.llvm.org/D4572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214534 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReplace comment about ownership with std::unique_ptr.
Rafael Espindola [Fri, 1 Aug 2014 18:09:32 +0000 (18:09 +0000)]
Replace comment about ownership with std::unique_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214533 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[FastISel][ARM] Do not emit stores for undef arguments.
Juergen Ributzka [Fri, 1 Aug 2014 18:04:14 +0000 (18:04 +0000)]
[FastISel][ARM] Do not emit stores for undef arguments.

This is a followup patch for r214366, which added the same behavior to the
AArch64 and X86 FastISel code. This fix reproduces the already existing
behavior of SelectionDAG in FastISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214531 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse range loop.
Rafael Espindola [Fri, 1 Aug 2014 18:04:14 +0000 (18:04 +0000)]
Use range loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214530 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd missing breaks to AArch64InstrInfo::isGPRCopy
Renato Golin [Fri, 1 Aug 2014 17:27:31 +0000 (17:27 +0000)]
Add missing breaks to AArch64InstrInfo::isGPRCopy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214528 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600: Cleanup test
Matt Arsenault [Fri, 1 Aug 2014 17:00:29 +0000 (17:00 +0000)]
R600: Cleanup test

Remove -CHECKs, use multiple prefixes, name values,
also test the @llvm.fabs version

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214525 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMake getNamedOperandIdx readonly
Matt Arsenault [Fri, 1 Aug 2014 17:00:27 +0000 (17:00 +0000)]
Make getNamedOperandIdx readonly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214524 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoR600/SI: Don't display GDS bit for read2
Matt Arsenault [Fri, 1 Aug 2014 17:00:26 +0000 (17:00 +0000)]
R600/SI: Don't display GDS bit for read2

This isn't displayed for any other instructions anymore,
and isn't ever used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214523 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Fix test from r214518 in an attempt to appease buildbots.
Chad Rosier [Fri, 1 Aug 2014 15:30:41 +0000 (15:30 +0000)]
[AArch64] Fix test from r214518 in an attempt to appease buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214521 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove lto_codegen_set_attr.
Rafael Espindola [Fri, 1 Aug 2014 14:57:05 +0000 (14:57 +0000)]
Remove lto_codegen_set_attr.

It was never exported, so no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214519 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Generate tbz/tbnz when comparing against zero.
Chad Rosier [Fri, 1 Aug 2014 14:48:56 +0000 (14:48 +0000)]
[AArch64] Generate tbz/tbnz when comparing against zero.

The tbz/tbnz checks the sign bit to convert

op w1, w1, w10
cmp w1, #0
b.lt .LBB0_0

to

op w1, w1, w10
tbnz w1, #31, .LBB0_0

Differential Revision: http://reviews.llvm.org/D4440

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214518 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PowerPC] PR20280 - Slots for byval parameters are not immutable
Ulrich Weigand [Fri, 1 Aug 2014 14:35:58 +0000 (14:35 +0000)]
[PowerPC] PR20280 - Slots for byval parameters are not immutable

Found by inspection while looking at PR20280: code would mark slots
in the parameter save area where a byval parameter is passed as
"immutable".  This is not correct since code is allowed to modify
byval parameters in place in the parameter save area.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214517 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove some calls to std::move.
Rafael Espindola [Fri, 1 Aug 2014 14:31:55 +0000 (14:31 +0000)]
Remove some calls to std::move.

Instead of moving out the data in a ErrorOr<std::unique_ptr<Foo>>, get
a reference to it.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214516 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[pr20127] Check for leading \1 in the Twine version of getNameWithPrefix.
Rafael Espindola [Fri, 1 Aug 2014 14:16:40 +0000 (14:16 +0000)]
[pr20127] Check for leading \1 in the Twine version of getNameWithPrefix.

No functionality change, but will simplify an upcoming patch that uses the
Twine version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214515 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSimplify the code a bit with std::unique_ptr.
Rafael Espindola [Fri, 1 Aug 2014 14:11:14 +0000 (14:11 +0000)]
Simplify the code a bit with std::unique_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214514 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-objdump: implement printing for MachO __compact_unwind info.
Tim Northover [Fri, 1 Aug 2014 13:07:19 +0000 (13:07 +0000)]
llvm-objdump: implement printing for MachO __compact_unwind info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214509 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAllow only disassembling of M-class MSR masks that the assembler knows how to assembl...
James Molloy [Fri, 1 Aug 2014 12:42:11 +0000 (12:42 +0000)]
Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back.

Note: The current code in DecodeMSRMask() rejects the unpredictable A/R MSR mask '0000' with Fail. The code in the patch follows this style and rejects unpredictable M-class MSR masks also with Fail (instead of SoftFail). If SoftFail is preferred in this case then additional changes to ARMInstPrinter (to print non-symbolic masks) and ARMAsmParser (to parse non-symbolic masks) will be needed.

Patch by Petr Pavlu!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214505 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoImprove some const-correctness to remove a -Wcast-qual warning. No functional changes...
Aaron Ballman [Fri, 1 Aug 2014 12:34:58 +0000 (12:34 +0000)]
Improve some const-correctness to remove a -Wcast-qual warning. No functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214503 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRB/LDRSB instruc...
Tilmann Scheller [Fri, 1 Aug 2014 12:08:04 +0000 (12:08 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRB/LDRSB instructions.

The ARM ARM prohibits LDRB/LDRSB instructions with writeback into the destination register. With this commit this constraint is now enforced and we stop assembling LDRH/LDRSH instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214500 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRH/LDRSH instruc...
Tilmann Scheller [Fri, 1 Aug 2014 11:33:47 +0000 (11:33 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRH/LDRSH instructions.

The ARM ARM prohibits LDRH/LDRSH instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling LDRH/LDRSH instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214499 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDR instructions.
Tilmann Scheller [Fri, 1 Aug 2014 11:08:51 +0000 (11:08 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDR instructions.

The ARM ARM prohibits LDR instructions with writeback into the destination register. With this commit this constraint is now enforced and we stop assembling LDR instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214498 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSLPVectorizer: fix build problem in Release configuration
Erik Eckstein [Fri, 1 Aug 2014 09:47:38 +0000 (09:47 +0000)]
SLPVectorizer: fix build problem in Release configuration

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214496 91177308-0d34-0410-b5e6-96231b3b80d8