oota-llvm.git
7 years agoAvoid caching the MachineFunction, we don't use it outside of
Eric Christopher [Wed, 15 Oct 2014 21:06:25 +0000 (21:06 +0000)]
Avoid caching the MachineFunction, we don't use it outside of
runOnMachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219847 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWrong attribute. LLVM_ATTRIBUTE_UNUSED not LLVM_ATTRIBUTE_USED
Sid Manning [Wed, 15 Oct 2014 20:41:17 +0000 (20:41 +0000)]
Wrong attribute.  LLVM_ATTRIBUTE_UNUSED not LLVM_ATTRIBUTE_USED

This original fix for the build break was correct.  LLVM_ATTRIBUTE_USED
removes the warning message because it keeps the function in the object
file.  LLVM_ATTRIBUTE_UNUSED indicates that it may or may not be used
depending on build settings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219846 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Move NumOperands from User to Value, NFC
Duncan P. N. Exon Smith [Wed, 15 Oct 2014 20:39:05 +0000 (20:39 +0000)]
IR: Move NumOperands from User to Value, NFC

Store `User::NumOperands` (and `MDNode::NumOperands`) in `Value`.

On 64-bit host architectures, this reduces `sizeof(User)` and all
subclasses by 8, and has no effect on `sizeof(Value)` (or, incidentally,
on `sizeof(MDNode)`).

On 32-bit host architectures, this increases `sizeof(Value)` by 4.
However, it has no effect on `sizeof(User)` and `sizeof(MDNode)`, so the
only concrete subclasses of `Value` that actually see the increase are
`BasicBlock`, `Argument`, `InlineAsm`, and `MDString`.  Moreover, I'll
be shocked and confused if this causes a tangible memory regression.

This has no functionality change (other than memory footprint).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219845 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Cleanup comments for Value, User, and MDNode
Duncan P. N. Exon Smith [Wed, 15 Oct 2014 20:28:31 +0000 (20:28 +0000)]
IR: Cleanup comments for Value, User, and MDNode

A follow-up commit will modify the memory-layout of `Value`, `User`, and
`MDNode`.  First fix the comments to be doxygen-friendly (and to follow
the coding standards).

  - Use "\brief" instead of "repeatedName -".
  - Add a brief intro where it was missing.
  - Remove duplicated comments from source files (and a couple of
    noisy/trivial comments altogether).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219844 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWrong attribute. LLVM_ATTRIBUTE_USED not LLVM_ATTRIBUTE_UNUSED
Sid Manning [Wed, 15 Oct 2014 19:32:52 +0000 (19:32 +0000)]
Wrong attribute. LLVM_ATTRIBUTE_USED not LLVM_ATTRIBUTE_UNUSED

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219837 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow forward references to section symbols.
Rafael Espindola [Wed, 15 Oct 2014 19:30:18 +0000 (19:30 +0000)]
Allow forward references to section symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219835 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTeach ScalarEvolution to sharpen range information.
Sanjoy Das [Wed, 15 Oct 2014 19:25:28 +0000 (19:25 +0000)]
Teach ScalarEvolution to sharpen range information.

If x is known to have the range [a, b) in a loop predicated by (icmp
ne x, a), its range can be sharpened to [a + 1, b).  Get
ScalarEvolution and hence IndVars to exploit this fact.

This change triggers an optimization to widen-loop-comp.ll, so it had
to be edited to get it to pass.

phabricator: http://reviews.llvm.org/D5639

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219834 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd LLVM_ATTRIBUTE_UNUSED to function currently just used in an assert
Sid Manning [Wed, 15 Oct 2014 19:24:14 +0000 (19:24 +0000)]
Add LLVM_ATTRIBUTE_UNUSED to function currently just used in an assert

Fixes break when -Wunused-function is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219833 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Narrow switch instructions using known bits.
Akira Hatanaka [Wed, 15 Oct 2014 19:05:50 +0000 (19:05 +0000)]
InstCombine: Narrow switch instructions using known bits.

Truncate the operands of a switch instruction to a narrower type if the upper
bits are known to be all ones or zeros.

rdar://problem/17720004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219832 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply "[FastISel][AArch64] Add custom lowering for GEPs."
Juergen Ributzka [Wed, 15 Oct 2014 18:58:07 +0000 (18:58 +0000)]
Reapply "[FastISel][AArch64] Add custom lowering for GEPs."

This is mostly a copy of the existing FastISel GEP code, but we have to
duplicate it for AArch64, because otherwise we would bail out even for simple
cases. This is because the standard fastEmit functions don't cover MUL at all
and ADD is lowered very inefficientily.

The original commit had a bug in the add emit logic, which has been fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219831 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][AArch64] Factor out add with immediate emission into a helper function...
Juergen Ributzka [Wed, 15 Oct 2014 18:58:02 +0000 (18:58 +0000)]
[FastISel][AArch64] Factor out add with immediate emission into a helper function. NFC.

Simplify add with immediate emission by factoring it out into a helper function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219830 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCorrectly handle references to section symbols.
Rafael Espindola [Wed, 15 Oct 2014 18:55:30 +0000 (18:55 +0000)]
Correctly handle references to section symbols.

When processing assembly like

.long .text

we were creating a new undefined symbol .text. GAS on the other hand would
handle that as a reference to the .text section.

This patch implements that by creating the section symbols earlier so that
they are visible during asm parsing.

The patch also updates llvm-readobj to print the symbol number in the relocation
dump so that the test can differentiate between two sections with the same name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219829 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEnable the instruction printer in HexagonMCTargetDesc
Sid Manning [Wed, 15 Oct 2014 18:27:40 +0000 (18:27 +0000)]
Enable the instruction printer in HexagonMCTargetDesc

This adds the MCInstPrinter to the LLVMHexagonDesc library and removes
the dependency LLVMHexagonAsmPrinter had on LLVMHexagonDesc. This is
a prerequisite needed by the disassembler.

Phabricator Revision: http://reviews.llvm.org/D5734

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219826 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Also try to use 0 base for misaligned 8-byte DS loads.
Matt Arsenault [Wed, 15 Oct 2014 18:06:43 +0000 (18:06 +0000)]
R600/SI: Also try to use 0 base for misaligned 8-byte DS loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219823 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Fix miscompiles when BFE has multiple uses
Matt Arsenault [Wed, 15 Oct 2014 17:58:34 +0000 (17:58 +0000)]
R600: Fix miscompiles when BFE has multiple uses

SimplifyDemandedBits would break the other uses of the operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219819 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agocorrect const-ness with auto and dyn_cast
Sanjay Patel [Wed, 15 Oct 2014 17:45:13 +0000 (17:45 +0000)]
correct const-ness with auto and dyn_cast

1. Use const with autos.
2. Don't bother with explicit const in cast ops because they do it automagically.

Thanks, David B. / Aaron B. / Reid K.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219817 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLPVectorize] Basic ephemeral-value awareness
Hal Finkel [Wed, 15 Oct 2014 17:35:01 +0000 (17:35 +0000)]
[SLPVectorize] Basic ephemeral-value awareness

The SLP vectorizer should not vectorize ephemeral values. These are used to
express information to the optimizer, and vectorizing them does not lead to
faster code (because the ephemeral values are dropped prior to code generation,
vectorized or not), and obscures the information the instructions are
attempting to communicate (the logic that interprets the arguments to
@llvm.assume generically does not understand vectorized conditions).

Also, uses by ephemeral values are free (because they, and the necessary
extractelement instructions, will be dropped prior to code generation).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219816 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTreat the WorkSet used to find ephemeral values as double-ended
Hal Finkel [Wed, 15 Oct 2014 17:34:48 +0000 (17:34 +0000)]
Treat the WorkSet used to find ephemeral values as double-ended

We need to make sure that we visit all operands of an instruction before moving
deeper in the operand graph. We had been pushing operands onto the back of the work
set, and popping them off the back as well, meaning that we might visit an
instruction before visiting all of its uses that sit in between it and the call
to @llvm.assume.

To provide an explicit example, given the following:
  %q0 = extractelement <4 x float> %rd, i32 0
  %q1 = extractelement <4 x float> %rd, i32 1
  %q2 = extractelement <4 x float> %rd, i32 2
  %q3 = extractelement <4 x float> %rd, i32 3
  %q4 = fadd float %q0, %q1
  %q5 = fadd float %q2, %q3
  %q6 = fadd float %q4, %q5
  %qi = fcmp olt float %q6, %q5
  call void @llvm.assume(i1 %qi)

%q5 is used by both %qi and %q6. When we visit %qi, it will be marked as
ephemeral, and we'll queue %q6 and %q5. %q6 will be marked as ephemeral and
we'll queue %q4 and %q5. Under the old system, we'd then visit %q4, which
would become ephemeral, %q1 and then %q0, which would become ephemeral as
well, and now we have a problem. We'd visit %rd, but it would not be marked as
ephemeral because we've not yet visited %q2 and %q3 (because we've not yet
visited %q5).

This will be covered by a test case in a follow-up commit that enables
ephemeral-value awareness in the SLP vectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219815 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Make bundle alignment mode setting idempotent and support nested bundles
Derek Schuff [Wed, 15 Oct 2014 17:10:04 +0000 (17:10 +0000)]
[MC] Make bundle alignment mode setting idempotent and support nested bundles

Summary:
Currently an error is thrown if bundle alignment mode is set more than once
per module (either via the API or the .bundle_align_mode directive). This
change allows setting it multiple times as long as the alignment doesn't
change.

Also nested bundle_lock groups are currently not allowed. This change allows
them, with the effect that the group stays open until all nests are exited,
and if any of the bundle_lock directives has the align_to_end flag, the
group becomes align_to_end.

These changes make the bundle aligment simpler to use in the compiler, and
also better match the corresponding support in GNU as.

Reviewers: jvoung, eliben

Differential Revision: http://reviews.llvm.org/D5801

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219811 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Make comments "brief"-er, NFC
Duncan P. N. Exon Smith [Wed, 15 Oct 2014 17:01:28 +0000 (17:01 +0000)]
DI: Make comments "brief"-er, NFC

Follow-up to r219801.  Post-commit review pointed out that all comments
require a `\brief` description [1], so I converted many and recrafted a
few to be briefer or to include a brief intro.  (If I'm going to clean
them up, I should do it right!)

[1]: http://llvm.org/docs/CodingStandards.html#doxygen-use-in-documentation-comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219808 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse 'auto' for easier reading; no functional change intended.
Sanjay Patel [Wed, 15 Oct 2014 16:21:37 +0000 (16:21 +0000)]
Use 'auto' for easier reading; no functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219804 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove function names from comments; NFC
Sanjay Patel [Wed, 15 Oct 2014 16:20:45 +0000 (16:20 +0000)]
remove function names from comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219803 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Cleanup comments, NFC
Duncan P. N. Exon Smith [Wed, 15 Oct 2014 16:15:15 +0000 (16:15 +0000)]
DI: Cleanup comments, NFC

A number of comment cleanups:

  - Remove duplicated function and class names from comments.

  - Remove duplicated comments from source file (some of which were
    out-of-sync).

  - Move any unduplicated comments from source file to header.

  - Remove some noisy comments entirely (e.g., a comment for
    `DIDescriptor::print()` saying "print descriptor" just gets in the
    way of reading the code).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219801 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify handling of --noexecstack by using getNonexecutableStackSection.
Rafael Espindola [Wed, 15 Oct 2014 16:12:52 +0000 (16:12 +0000)]
Simplify handling of --noexecstack by using getNonexecutableStackSection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219799 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDI: Use a `DenseMap` instead of named metadata, NFC
Duncan P. N. Exon Smith [Wed, 15 Oct 2014 16:11:41 +0000 (16:11 +0000)]
DI: Use a `DenseMap` instead of named metadata, NFC

Remove a strange round-trip through named metadata to assign preserved
local variables to their subprograms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219798 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove getNonexecutableStackSection up to the base ELF class.
Rafael Espindola [Wed, 15 Oct 2014 15:44:16 +0000 (15:44 +0000)]
Move getNonexecutableStackSection up to the base ELF class.

The .note.GNU-stack section is not SystemZ/X86 specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219796 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Use existing variable
Matt Arsenault [Wed, 15 Oct 2014 05:07:00 +0000 (05:07 +0000)]
R600: Use existing variable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219778 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Remove outdated comment
Matt Arsenault [Wed, 15 Oct 2014 05:06:57 +0000 (05:06 +0000)]
R600: Remove outdated comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219777 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[FastISel][AArch64] Add custom lowering for GEPs."
Juergen Ributzka [Wed, 15 Oct 2014 04:55:48 +0000 (04:55 +0000)]
Revert "[FastISel][AArch64] Add custom lowering for GEPs."

This breaks our internal build bots. Reverting it to get the bots green again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219776 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MachineSink] Use the real post dominator tree
Jingyue Wu [Wed, 15 Oct 2014 03:27:43 +0000 (03:27 +0000)]
[MachineSink] Use the real post dominator tree

Summary:
Fixes a FIXME in MachineSinking. Instead of using the simple heuristics in
isPostDominatedBy, use the real MachinePostDominatorTree and MachineLoopInfo.
The old heuristics caused instructions to sink unnecessarily, and might create
register pressure.

This is the second try of the fix. The first one (D4814) caused a performance
regression due to failing to sink instructions out of loops (PR21115). This
patch fixes PR21115 by sinking an instruction from a deeper loop to a shallower
one regardless of whether the target block post-dominates the source.

Thanks Alexey Volkov for reporting PR21115!

Test Plan:
Added a NVPTX codegen test to verify that our change prevents the backend from
over-sinking. It also shows the unnecessary register pressure caused by
over-sinking.

Added an X86 test to verify we can sink instructions out of loops regardless of
the dominance relationship. This test is reduced from Alexey's test in PR21115.

Updated an affected test in X86.

Also ran SPEC CINT2006 and llvm-test-suite for compilation time and runtime
performance. Results are attached separately in the review thread.

Reviewers: Jiangning, resistor, hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, bruno, volkalexey, llvm-commits, meheff, eliben, jholewinski

Differential Revision: http://reviews.llvm.org/D5633

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219773 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: drop check for triple that's no longer used.
Tim Northover [Wed, 15 Oct 2014 01:05:01 +0000 (01:05 +0000)]
ARM: drop check for triple that's no longer used.

Early attempts to support AAPCS bare metal MachO targets based the decision on
the CPU being compiled for. This was not a particularly great idea and we've
got a better option now, but this check remained.

No functional change for any target we care about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219767 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused variable.
Eric Christopher [Wed, 15 Oct 2014 00:09:07 +0000 (00:09 +0000)]
Remove unused variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219750 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNo need to cache this unused variable.
Eric Christopher [Tue, 14 Oct 2014 23:58:51 +0000 (23:58 +0000)]
No need to cache this unused variable.

Patch by Ehsan Akhgari.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219749 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Wrong CC access in CSINC-conditional branch sequence
Gerolf Hoflehner [Tue, 14 Oct 2014 23:55:00 +0000 (23:55 +0000)]
[AArch64] Wrong CC access in CSINC-conditional branch sequence

This is a follow up to commit r219742. It removes the CCInMI variable
and accesses the CC in CSCINC directly. In the case of a conditional
branch accessing the CC with CCInMI was wrong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219748 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-objdump] Update error message and add test case for mach-o file with bad librar...
Nick Kledzik [Tue, 14 Oct 2014 23:29:38 +0000 (23:29 +0000)]
[llvm-objdump] Update error message and add test case for mach-o file with bad library ordinals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219746 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AAarch64] Optimize CSINC-branch sequence
Gerolf Hoflehner [Tue, 14 Oct 2014 23:07:53 +0000 (23:07 +0000)]
[AAarch64] Optimize CSINC-branch sequence

Peephole optimization that generates a single conditional branch
for csinc-branch sequences like in the examples below. This is
possible when the csinc sets or clears a register based on a condition
code and the branch checks that register. Also the condition
code may not be modified between the csinc and the original branch.

Examples:

1. Convert csinc w9, wzr, wzr, <CC>;tbnz w9, #0, 0x44
   to b.<invCC>

2. Convert csinc w9, wzr, wzr, <CC>; tbz w9, #0, 0x44
   to b.<CC>

rdar://problem/18506500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219742 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVectorize] Ignore @llvm.assume for cost estimates and legality
Hal Finkel [Tue, 14 Oct 2014 22:59:49 +0000 (22:59 +0000)]
[LoopVectorize] Ignore @llvm.assume for cost estimates and legality

A few minor changes to prevent @llvm.assume from interfering with loop
vectorization. First, treat @llvm.assume like the lifetime intrinsics, which
are scalarized (but don't otherwise interfere with the legality checking).
Second, ignore the cost of ephemeral instructions in the loop (these will go
away anyway during CodeGen).

Alignment assumptions and other uses of @llvm.assume can often end up inside of
loops that should be vectorized (this is not uncommon for assumptions generated
by __attribute__((align_value(n))), for example).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219741 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC, COFF: Make bigobj test compatible with python3
David Majnemer [Tue, 14 Oct 2014 22:35:11 +0000 (22:35 +0000)]
MC, COFF: Make bigobj test compatible with python3

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219739 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] pslldq/psrldq shuffle mask decodes
Simon Pilgrim [Tue, 14 Oct 2014 22:31:34 +0000 (22:31 +0000)]
[X86][SSE] pslldq/psrldq shuffle mask decodes

Patch to provide shuffle decodes and asm comments for the sse pslldq/psrldq SSE2/AVX2 byte shift instructions.

Differential Revision: http://reviews.llvm.org/D5598

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219738 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC: Rewrite bigobj test in python
David Majnemer [Tue, 14 Oct 2014 22:26:49 +0000 (22:26 +0000)]
MC: Rewrite bigobj test in python

This makes the test easier to work with.  No functionality change
intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219737 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: remove ARM/Thumb distinction for preferred alignment.
Tim Northover [Tue, 14 Oct 2014 22:12:17 +0000 (22:12 +0000)]
ARM: remove ARM/Thumb distinction for preferred alignment.

Thumb1 has legitimate reasons for preferring 32-bit alignment of types
i1/i8/i16, since the 16-bit encoding of "add rD, sp, #imm" requires #imm to be
a multiple of 4. However, this is a trade-off betweem code size and RAM usage;
the DataLayout string is not the best place to represent it even if desired.

So this patch removes the extra Thumb requirements, hopefully making ARM and
Thumb completely compatible in this respect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219734 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: allow misaligned local variables in Thumb1 mode.
Tim Northover [Tue, 14 Oct 2014 22:12:14 +0000 (22:12 +0000)]
ARM: allow misaligned local variables in Thumb1 mode.

There's no hard requirement on LLVM to align local variable to 32-bits, so the
Thumb1 frame handling needs to be able to deal with variables that are only
naturally aligned without falling over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219733 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a test for writing COFF BigObj
David Majnemer [Tue, 14 Oct 2014 21:47:53 +0000 (21:47 +0000)]
Add a test for writing COFF BigObj

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219729 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][AArch64] Add custom lowering for GEPs.
Juergen Ributzka [Tue, 14 Oct 2014 21:41:23 +0000 (21:41 +0000)]
[FastISel][AArch64] Add custom lowering for GEPs.

This is mostly a copy of the existing FastISel GEP code, but on AArch64 we bail
out even for simple cases, because the standard fastEmit functions don't cover
MUL and ADD is lowered inefficientily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219726 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86 asm] allow fwait alias in both At&t and Intel modes (PR21208)
Hans Wennborg [Tue, 14 Oct 2014 21:41:17 +0000 (21:41 +0000)]
[x86 asm] allow fwait alias in both At&t and Intel modes (PR21208)

Differential Revision: http://reviews.llvm.org/D5741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219725 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: set preferred aggregate alignment to 32 universally.
Tim Northover [Tue, 14 Oct 2014 20:57:26 +0000 (20:57 +0000)]
ARM: set preferred aggregate alignment to 32 universally.

Before, ARM and Thumb mode code had different preferred alignments, which could
lead to some rather unexpected results. There's justification for reducing it
from the default 64-bits (wasted space), but I don't think there is for going
below 32-bits.

There's no actual ABI change here, just to reassure people.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219719 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CFL-AA] CFL-AA should not assert on an va_arg instruction
Hal Finkel [Tue, 14 Oct 2014 20:51:26 +0000 (20:51 +0000)]
[CFL-AA] CFL-AA should not assert on an va_arg instruction

The CFL-AA implementation was missing a visit* routine for va_arg instructions,
causing it to assert when run on a function that had one. For now, handle these
in a conservative way.

Fixes PR20954.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219718 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoOptimize away fabs() calls when input is squared (known positive).
Sanjay Patel [Tue, 14 Oct 2014 20:43:11 +0000 (20:43 +0000)]
Optimize away fabs() calls when input is squared (known positive).

Eliminate library calls and intrinsic calls to fabs when the input
is a squared value.

Note that no unsafe-math / fast-math assumptions are needed for
this optimization.

Differential Revision: http://reviews.llvm.org/D5777

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219717 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][AArch64] Fix sign-/zero-extend folding when SelectionDAG is involved.
Juergen Ributzka [Tue, 14 Oct 2014 20:36:02 +0000 (20:36 +0000)]
[FastISel][AArch64] Fix sign-/zero-extend folding when SelectionDAG is involved.

Sign-/zero-extend folding depended on the load and the integer extend to be
both selected by FastISel. This cannot always be garantueed and SelectionDAG
might interfer. This commit adds additonal checks to load and integer extend
lowering to catch this.

Related to rdar://problem/18495928.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219716 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Don't miscompile X % ((Pow2 << A) >>u B)
David Majnemer [Tue, 14 Oct 2014 20:28:40 +0000 (20:28 +0000)]
InstCombine: Don't miscompile X % ((Pow2 << A) >>u B)

We assumed that A must be greater than B because the right hand side of
a remainder operator must be nonzero.

However, it is possible for A to be less than B if Pow2 is a power of
two greater than 1.

Take for example:
i32 %A = 0
i32 %B = 31
i32 Pow2 = 2147483648

((Pow2 << 0) >>u 31) is non-zero but A is less than B.

This fixes PR21274.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219713 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply "R600: Add new intrinsic to read work dimensions"
Jan Vesely [Tue, 14 Oct 2014 20:05:26 +0000 (20:05 +0000)]
Reapply "R600: Add new intrinsic to read work dimensions"

This effectively reverts revert 219707. After fixing the test to work with
new function name format and renamed intrinsic.

Reviewed-by: Tom Stellard <tom@stellard.net>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219710 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "r216914 - Revert: [APFloat] Fixed a bug in method 'fusedMultiplyAdd'"
Hal Finkel [Tue, 14 Oct 2014 19:23:07 +0000 (19:23 +0000)]
Revert "r216914 - Revert: [APFloat] Fixed a bug in method 'fusedMultiplyAdd'"

Reapply r216913, a fix for PR20832 by Andrea Di Biagio. The commit was reverted
because of buildbot failures, and credit goes to Ulrich Weigand for isolating
the underlying issue (which can be confirmed by Valgrind, which does helpfully
light up like the fourth of July). Uli explained the problem with the original
patch as:

  It seems the problem is calling multiplySignificand with an addend of category
  fcZero; that is not expected by this routine.  Note that for fcZero, the
  significand parts are simply uninitialized, but the code in (or rather, called
  from) multiplySignificand will unconditionally access them -- in effect using
  uninitialized contents.

This version avoids using a category == fcZero addend within
multiplySignificand, which avoids this problem (the Valgrind output is also now
clean).

Original commit message:

[APFloat] Fixed a bug in method 'fusedMultiplyAdd'.

When folding a fused multiply-add builtin call, make sure that we propagate the
correct result in the case where the addend is zero, and the two other operands
are finite non-zero.

Example:
  define double @test() {
    %1 = call double @llvm.fma.f64(double 7.0, double 8.0, double 0.0)
    ret double %1
  }

Before this patch, the instruction simplifier wrongly folded the builtin call
in function @test to constant 'double 7.0'.
With this patch, method 'fusedMultiplyAdd' correctly evaluates the multiply and
propagates the expected result (i.e. 56.0).

Added test fold-builtin-fma.ll with the reproducible from PR20832 plus extra
test cases to verify the behavior of method 'fusedMultiplyAdd' in the presence
of NaN/Inf operands.

This fixes PR20832.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219708 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "R600: Add new intrinsic to read work dimensions"
Rafael Espindola [Tue, 14 Oct 2014 18:58:04 +0000 (18:58 +0000)]
Revert "R600: Add new intrinsic to read work dimensions"

This reverts commit r219705.

CodeGen/R600/work-item-intrinsics.ll was failing on linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219707 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused member variable.
Rafael Espindola [Tue, 14 Oct 2014 18:53:16 +0000 (18:53 +0000)]
Remove unused member variable.

Fixes pr20904.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219706 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Add new intrinsic to read work dimensions
Jan Vesely [Tue, 14 Oct 2014 18:52:07 +0000 (18:52 +0000)]
R600: Add new intrinsic to read work dimensions

v2: Add SI lowering
    Add test

v3: Place work dimensions after the kernel arguments.
v4: Calculate offset while lowering arguments
v5: rebase
v6: change prefix to AMDGPU

Reviewed-by: Tom Stellard <tom@stellard.net>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: FMA is VecALU only instruction
Jan Vesely [Tue, 14 Oct 2014 18:52:04 +0000 (18:52 +0000)]
R600: FMA is VecALU only instruction

Reviewed-by: Tom Stellard <tom@stellard.net>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219704 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFinish getting Mips fast-isel to match up with AArch64 fast-isel
Reed Kotler [Tue, 14 Oct 2014 18:27:58 +0000 (18:27 +0000)]
Finish getting Mips fast-isel to match up with AArch64 fast-isel

Summary:
In order to facilitate use of common code, checking by reviewers of other fast-isel ports, and hopefully to eventually move most of Mips and other fast-isel ports into target independent code, I've tried to get the two implementations to line up.

There is no functional code change. Just methods moved in the file to be in the same order as in AArch64.

Test Plan: No functional change.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, aemerson, rfuhler

Differential Revision: http://reviews.llvm.org/D5692

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219703 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugInfo: Ensure that all debug location scope chains from instructions within a...
David Blaikie [Tue, 14 Oct 2014 18:22:52 +0000 (18:22 +0000)]
DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself.

Let me tell you a tale...

Originally committed in r211723 after discovering a nasty case of weird
scoping due to inlining, this was reverted in r211724 after it fired in
ASan/compiler-rt.

(minor diversion where I accidentally committed/reverted again in
r211871/r211873)

After further testing and fixing bugs in ArgumentPromotion (r211872) and
Inlining (r212065) it was recommitted in r212085. Reverted in r212089
after the sanitizer buildbots still showed problems.

Fixed another bug in ArgumentPromotion (r212128) found by this
assertion.

Recommitted in r212205, reverted in r212226 after it crashed some more
on sanitizer buildbots.

Fix clang some more in r212761.

Recommitted in r212776, reverted in r212793. ASan failures.
Recommitted in r213391, reverted in r213432, trying to reproduce flakey
ASan build failure.

Fixed bugs in r213805 (ArgPromo + DebugInfo), r213952
(LiveDebugVariables strips dbg_value intrinsics in functions not
described by debug info).

Recommitted in r214761, reverted in r214999, flakey failure on Windows
buildbot.

Fixed DeadArgElimination + DebugInfo bug in r219210.

Recommitted in r219215, reverted in r219512, failure on ObjC++ atomic
properties in the test-suite on Darwin.

Fixed ObjC++ atomic properties issue in Clang in r219690.

[This commit is provided 'as is' with no hope that this is the last time
I commit this change either expressed or implied]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219702 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove method that is identical to the base class one.
Rafael Espindola [Tue, 14 Oct 2014 17:38:38 +0000 (17:38 +0000)]
Remove method that is identical to the base class one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219700 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Use DS offsets for constant addresses
Matt Arsenault [Tue, 14 Oct 2014 17:21:19 +0000 (17:21 +0000)]
R600/SI: Use DS offsets for constant addresses

Use 0 as the base address for a constant address, so if
we have a constant address we can save moves and form
read2/write2s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219698 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Fix stuff... again."
David Blaikie [Tue, 14 Oct 2014 17:13:09 +0000 (17:13 +0000)]
Revert "Fix stuff... again."

Accidental commit.

This reverts commit r219693.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219695 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert some parts of r196288 that were confusing and untested.
David Blaikie [Tue, 14 Oct 2014 17:12:02 +0000 (17:12 +0000)]
Revert some parts of r196288 that were confusing and untested.

If we figure out why they should be here, let's add some testing of some
kind so we can better demonstrate why it's needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219694 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix stuff... again.
David Blaikie [Tue, 14 Oct 2014 17:11:59 +0000 (17:11 +0000)]
Fix stuff... again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219693 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Check for @llvm.assume dominating the edge branch
Hal Finkel [Tue, 14 Oct 2014 16:04:49 +0000 (16:04 +0000)]
[LVI] Check for @llvm.assume dominating the edge branch

When LazyValueInfo uses @llvm.assume intrinsics to provide edge-value
constraints, we should check for intrinsics that dominate the edge's branch,
not just any potential context instructions. An assumption that dominates the
edge's branch represents a truth on that edge. This is specifically useful, for
example, if multiple predecessors assume a pointer to be nonnull, allowing us
to simplify a later null comparison.

The test case, and an initial patch, were provided by Philip Reames. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219688 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r219638, (r219640 and r219676), "Removing the static destructor from ManagedSt...
NAKAMURA Takumi [Tue, 14 Oct 2014 15:58:16 +0000 (15:58 +0000)]
Revert r219638, (r219640 and r219676), "Removing the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex."

It caused hang-up on msc17 builder, probably deadlock.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219687 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX512] Extended avx512_binop_rm to DQ/VL subsets.
Robert Khasanov [Tue, 14 Oct 2014 15:13:56 +0000 (15:13 +0000)]
[AVX512] Extended avx512_binop_rm to DQ/VL subsets.
Added encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219686 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX512] Extended avx512_binop_rm to BW/VL subsets.
Robert Khasanov [Tue, 14 Oct 2014 14:36:19 +0000 (14:36 +0000)]
[AVX512] Extended avx512_binop_rm to BW/VL subsets.
Added encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219685 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround
Bradley Smith [Tue, 14 Oct 2014 14:02:41 +0000 (14:02 +0000)]
[AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219684 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-symbolizer] Minor typedef cleanup. NFC.
Alexander Potapenko [Tue, 14 Oct 2014 13:40:44 +0000 (13:40 +0000)]
[llvm-symbolizer] Minor typedef cleanup. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219682 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThreading.h: Use \tparam for template parameters. [-Wdocumentation]
NAKAMURA Takumi [Tue, 14 Oct 2014 09:34:16 +0000 (09:34 +0000)]
Threading.h: Use \tparam for template parameters. [-Wdocumentation]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219676 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGrab the subtarget info off of the MachineFunction rather than
Eric Christopher [Tue, 14 Oct 2014 08:44:19 +0000 (08:44 +0000)]
Grab the subtarget info off of the MachineFunction rather than
indirecting through the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219674 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse the triple to figure out if this is a darwin target, not
Eric Christopher [Tue, 14 Oct 2014 08:25:26 +0000 (08:25 +0000)]
Use the triple to figure out if this is a darwin target, not
the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219673 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unnecessary TargetMachine.h includes.
Eric Christopher [Tue, 14 Oct 2014 07:22:08 +0000 (07:22 +0000)]
Remove unnecessary TargetMachine.h includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219672 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGrab the subtarget and subtarget dependent variables off of
Eric Christopher [Tue, 14 Oct 2014 07:22:00 +0000 (07:22 +0000)]
Grab the subtarget and subtarget dependent variables off of
MachineFunction rather than TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219671 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGrab the subtarget and subtarget dependent variables off of
Eric Christopher [Tue, 14 Oct 2014 07:17:23 +0000 (07:17 +0000)]
Grab the subtarget and subtarget dependent variables off of
MachineFunction rather than TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219670 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstead of the TargetMachine cache the MachineFunction
Eric Christopher [Tue, 14 Oct 2014 07:17:20 +0000 (07:17 +0000)]
Instead of the TargetMachine cache the MachineFunction
and TargetRegisterInfo in the peephole optimizer. This
makes it easier to grab subtarget dependent variables off
of the MachineFunction rather than the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219669 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAccess subtarget specific variables off of the MachineFunction's
Eric Christopher [Tue, 14 Oct 2014 07:00:33 +0000 (07:00 +0000)]
Access subtarget specific variables off of the MachineFunction's
cached subtarget and not the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219668 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd lld to the parallel set of directories since it doesn't depend
Eric Christopher [Tue, 14 Oct 2014 06:56:28 +0000 (06:56 +0000)]
Add lld to the parallel set of directories since it doesn't depend
on any of the other tools directories.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219667 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAccess the subtarget off of the MachineFunction via the DAG
Eric Christopher [Tue, 14 Oct 2014 06:56:25 +0000 (06:56 +0000)]
Access the subtarget off of the MachineFunction via the DAG
scheduler or via the SelectionDAG if available. Otherwise
grab the subtarget off of the MachineFunction by going up
the parent chain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219666 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64]Select wide immediate offset into [Base+XReg] addressing mode
Hao Liu [Tue, 14 Oct 2014 06:50:36 +0000 (06:50 +0000)]
[AArch64]Select wide immediate offset into [Base+XReg] addressing mode
e.g Currently we'll generate following instructions if the immediate is too wide:
    MOV  X0, WideImmediate
    ADD  X1, BaseReg, X0
    LDR  X2, [X1, 0]

    Using [Base+XReg] addressing mode can save one ADD as following:
    MOV  X0, WideImmediate
    LDR  X2, [BaseReg, X0]

    Differential Revision: http://reviews.llvm.org/D5477

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219665 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the use and member variable of the TargetMachine from
Eric Christopher [Tue, 14 Oct 2014 06:26:57 +0000 (06:26 +0000)]
Remove the use and member variable of the TargetMachine from
MachineLICM as we can get the same data off of the MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219663 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoHave MachineInstrBundle use the MachineFunction for subtarget
Eric Christopher [Tue, 14 Oct 2014 06:26:55 +0000 (06:26 +0000)]
Have MachineInstrBundle use the MachineFunction for subtarget
access rather than the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219662 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAccess the subtarget off of the MachineFunction rather than
Eric Christopher [Tue, 14 Oct 2014 06:26:53 +0000 (06:26 +0000)]
Access the subtarget off of the MachineFunction rather than
through the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219661 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSwitch to select optimization for two-case switches
Marcello Maggioni [Tue, 14 Oct 2014 01:58:26 +0000 (01:58 +0000)]
Switch to select optimization for two-case switches

This is the same optimization of r219233 with modifications to support PHIs with multiple incoming edges from the same block
and a test to check that this condition is handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219656 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't include DFAPacketizer in TargetInstrInfo, there's no reason.
Eric Christopher [Tue, 14 Oct 2014 01:13:53 +0000 (01:13 +0000)]
Don't include DFAPacketizer in TargetInstrInfo, there's no reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219653 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInclude map into the A15SDOptimizer rather than pick it up
Eric Christopher [Tue, 14 Oct 2014 01:13:51 +0000 (01:13 +0000)]
Include map into the A15SDOptimizer rather than pick it up
transitively from the DFAPacketizer via TargetInstrInfo.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219652 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove the TargetMachine from DFAPacketizer since it was only
Eric Christopher [Tue, 14 Oct 2014 01:03:16 +0000 (01:03 +0000)]
Remove the TargetMachine from DFAPacketizer since it was only
being used to grab subtarget specific things that we can grab
from the MachineFunction anyhow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219650 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIntroduce Go coding standards for LLVM.
Peter Collingbourne [Tue, 14 Oct 2014 00:40:53 +0000 (00:40 +0000)]
Introduce Go coding standards for LLVM.

Rather than define our own standards, we adopt a set of best practices that
are already in use by the Go community.

Differential Revision: http://reviews.llvm.org/D5761

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219646 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix formatting; NFC
Sanjay Patel [Tue, 14 Oct 2014 00:33:23 +0000 (00:33 +0000)]
fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219645 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd some optional passes around the vectorizer to both better prepare
Chandler Carruth [Tue, 14 Oct 2014 00:31:29 +0000 (00:31 +0000)]
Add some optional passes around the vectorizer to both better prepare
the IR going into it and to clean up the IR produced by the vectorizers.

Note that these are *off by default* right now while folks collect data
on whether the performance tradeoff is reasonable.

In a build of the 'opt' binary, I see about 2% compile time regression
due to this change on average. This is in my mind essentially the worst
expected case: very little of the opt binary is going to *benefit* from
these extra passes.

I've seen several benchmarks improve in performance my small amounts due
to running these passes, and there are certain (rare) cases where these
passes make a huge difference by either enabling the vectorizer at all
or by hoisting runtime checks out of the outer loop. My primary
motivation is to prevent people from seeing runtime check overhead in
benchmarks where the existing passes and optimizers would be able to
eliminate that.

I've chosen the sequence of passes based on the kinds of things that
seem likely to be relevant for the code at each stage: rotaing loops for
the vectorizer, finding correlated values, loop invariants, and
unswitching opportunities from any runtime checks, and cleaning up
commonalities exposed by the SLP vectorizer.

I'll be pinging existing threads where some of these issues have come up
and will start new threads to get folks to benchmark and collect data on
whether this is the right tradeoff or we should do something else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219644 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIntroduce LLVMWriteBitcodeToMemoryBuffer C API function.
Peter Collingbourne [Tue, 14 Oct 2014 00:30:59 +0000 (00:30 +0000)]
Introduce LLVMWriteBitcodeToMemoryBuffer C API function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219643 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdating documentation as per Chandler's feedback.
Chris Bieneman [Mon, 13 Oct 2014 23:03:45 +0000 (23:03 +0000)]
Updating documentation as per Chandler's feedback.

This goes with the earlier commit to remove the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex.

Summary: This is part of the ongoing work to remove static constructors and destructors.

Reviewers: chandlerc, rnk

Reviewed By: rnk

Subscribers: rnk, llvm-commits

Differential Revision: http://reviews.llvm.org/D5473

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219640 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Fix miscompile in X % -Y -> X % Y transform
David Majnemer [Mon, 13 Oct 2014 22:37:51 +0000 (22:37 +0000)]
InstCombine: Fix miscompile in X % -Y -> X % Y transform

We assumed that negation operations of the form (0 - %Z) resulted in a
negative number.  This isn't true if %Z was originally negative.
Substituting the negative number into the remainder operation may result
in undefined behavior because the dividend might be INT_MIN.

This fixes PR21256.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219639 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemoving the static destructor from ManagedStatic.cpp by controlling the allocation...
Chris Bieneman [Mon, 13 Oct 2014 22:37:25 +0000 (22:37 +0000)]
Removing the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex.

This patch adds a new llvm_call_once function which is used by the ManagedStatic implementation to safely initialize a global to avoid static construction and destruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219638 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMigrate another set of getSubtargetImpl away.
Eric Christopher [Mon, 13 Oct 2014 21:57:44 +0000 (21:57 +0000)]
Migrate another set of getSubtargetImpl away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219636 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused debug info constants.
Peter Collingbourne [Mon, 13 Oct 2014 21:50:30 +0000 (21:50 +0000)]
Remove unused debug info constants.

These became unused in r219010.

Differential Revision: http://reviews.llvm.org/D5760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219635 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstCombine: Don't miscompile (x lshr C1) udiv C2
David Majnemer [Mon, 13 Oct 2014 21:48:30 +0000 (21:48 +0000)]
InstCombine: Don't miscompile (x lshr C1) udiv C2

We have a transform that changes:
  (x lshr C1) udiv C2
into:
  x udiv (C2 << C1)

However, it is unsafe to do so if C2 << C1 discards any of C2's bits.

This fixes PR21255.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219634 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake first of several changes to bring up to AArch64 fast-isel style
Reed Kotler [Mon, 13 Oct 2014 21:46:41 +0000 (21:46 +0000)]
Make first of several changes to bring up to AArch64 fast-isel style

Summary:
Make Mips fast-isel track the form of AArch64 where practical.
This makes it easier for people to review the code, to borrow similar code, and to see how to eventually move a lot of this
 target code for fast-isels into target independent code.

These are just cosmetic changes. Should be no functional difference.

Test Plan:
make check
test-suite for 4 flavors mips32 r1/r2 , -O0/-O2

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: aemerson, llvm-commits, rfuhler

Differential Revision: http://reviews.llvm.org/D5595

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219633 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate the example of using a command-line option custom parser to
Paul Robinson [Mon, 13 Oct 2014 21:11:22 +0000 (21:11 +0000)]
Update the example of using a command-line option custom parser to
match the current implementation.

Patch by Douglas Yung!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219631 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd an assertion about the integrity of the iterator.
Adrian Prantl [Mon, 13 Oct 2014 20:44:58 +0000 (20:44 +0000)]
Add an assertion about the integrity of the iterator.
Broken parent scope pointers in inlined DIVariables can cause
ensureAbstractVariableIsCreated to insert new abstract scopes, thus
invalidating the iterator in this loop and leading to hard-to-debug
crashes. Useful when manually reducing IR for testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219628 91177308-0d34-0410-b5e6-96231b3b80d8