oota-llvm.git
10 years agoadd support for ocaml 3.12
Nuno Lopes [Sun, 2 Sep 2012 14:42:56 +0000 (14:42 +0000)]
add support for ocaml 3.12

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163096 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoreplace a couple of single-line comments with /* */ to fix the build of stuff dependi...
Nuno Lopes [Sun, 2 Sep 2012 14:19:21 +0000 (14:19 +0000)]
replace a couple of single-line comments with /* */ to fix the build of stuff depending on the C headers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163095 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix a typo.
Nadav Rotem [Sun, 2 Sep 2012 12:21:50 +0000 (12:21 +0000)]
Fix a typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163094 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoNot all targets have efficient ISel code generation for select instructions.
Nadav Rotem [Sun, 2 Sep 2012 12:10:19 +0000 (12:10 +0000)]
Not all targets have efficient ISel code generation for select instructions.
For example, the ARM target does not have efficient ISel handling for vector
selects with scalar conditions. This patch adds a TLI hook which allows the
different targets to report which selects are supported well and which selects
should be converted to CF duting codegen prepare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163093 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLoopRotation: Make the brute force DomTree update more brute force.
Benjamin Kramer [Sun, 2 Sep 2012 11:57:22 +0000 (11:57 +0000)]
LoopRotation: Make the brute force DomTree update more brute force.

We update until we hit a fixpoint. This is probably slow but also
slightly simplifies the code. It should also fix the occasional
invalid domtrees observed when building with expensive checking.

I couldn't find a case where this had a measurable slowdown, but
if someone finds a pathological case where it does we may have
to find a cleverer way of updating dominators here.

Thanks to Duncan for the test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163091 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRename ANDROIDEABI to Android.
Logan Chien [Sun, 2 Sep 2012 09:29:46 +0000 (09:29 +0000)]
Rename ANDROIDEABI to Android.

Most of the code guarded with ANDROIDEABI are not
ARM-specific, and having no relation with arm-eabi.
Thus, it will be more natural to call this
environment "Android" instead of "ANDROIDEABI".

Note: We are not using ANDROID because several projects
are using "-DANDROID" as the conditional compilation
flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163087 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoGenerate better select code by allowing the target to use scalar select, and not...
Nadav Rotem [Sun, 2 Sep 2012 08:20:07 +0000 (08:20 +0000)]
Generate better select code by allowing the target to use scalar select, and not sign-extend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163086 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoOnly legalise a VSELECT in to bitwise operations if the vector mask bool is zeros...
Pete Cooper [Sat, 1 Sep 2012 22:27:48 +0000 (22:27 +0000)]
Only legalise a VSELECT in to bitwise operations if the vector mask bool is zeros or all ones.  A vector bool with just ones isn't suitable for masking with.

No test case unfortunately as i couldn't find a target which fit all
the conditions needed to hit this code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163075 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPR13689: Check for backtrace(3) in the cmake build.
Benjamin Kramer [Sat, 1 Sep 2012 20:50:18 +0000 (20:50 +0000)]
PR13689: Check for backtrace(3) in the cmake build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163074 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLimit domain conversion to cases where it won't break dep chains.
Tim Northover [Sat, 1 Sep 2012 18:07:29 +0000 (18:07 +0000)]
Limit domain conversion to cases where it won't break dep chains.

NEON domain conversion was too heavy-handed with its widened
registers, which could have stripped existing instructions of their
dependency, leaving them vulnerable to scheduling errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163070 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "Take account of boolean vector contents when promoting a build vector from...
Pete Cooper [Sat, 1 Sep 2012 17:37:55 +0000 (17:37 +0000)]
Revert "Take account of boolean vector contents when promoting a build vector from i1 to some other type.  rdar://problem/12210060"

This reverts commit 5dd9e214fb92847e947f9edab170f9b4e52b908f.

Thanks to Duncan for explaining how this should have been done.

Conflicts:

test/CodeGen/X86/vec_select.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163064 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix Thumb2 fixup kind in the integrated-as.
Logan Chien [Sat, 1 Sep 2012 15:06:36 +0000 (15:06 +0000)]
Fix Thumb2 fixup kind in the integrated-as.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163063 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd ARM ELF support to llvm-objdump.
Logan Chien [Sat, 1 Sep 2012 14:58:11 +0000 (14:58 +0000)]
Add ARM ELF support to llvm-objdump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163062 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCode cleanup: tools/opt/opt.cpp
Logan Chien [Sat, 1 Sep 2012 14:43:30 +0000 (14:43 +0000)]
Code cleanup: tools/opt/opt.cpp

Remove unused local variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163061 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix typo.
Logan Chien [Sat, 1 Sep 2012 12:11:41 +0000 (12:11 +0000)]
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163059 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLoopRotation: Check some invariants of the dominator updating code.
Benjamin Kramer [Sat, 1 Sep 2012 12:04:51 +0000 (12:04 +0000)]
LoopRotation: Check some invariants of the dominator updating code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163058 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTypos
Craig Topper [Sat, 1 Sep 2012 06:33:50 +0000 (06:33 +0000)]
Typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163053 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTeach DAG combine a number of tricks to simplify FMA expressions in fast-math mode.
Owen Anderson [Sat, 1 Sep 2012 06:04:27 +0000 (06:04 +0000)]
Teach DAG combine a number of tricks to simplify FMA expressions in fast-math mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163051 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix typo
Michael Liao [Sat, 1 Sep 2012 04:09:16 +0000 (04:09 +0000)]
Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163049 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm/test/CodeGen/X86/fp-fast.ll: Suppress FMA4 on AMD Bulldozer host, corresponding...
NAKAMURA Takumi [Sat, 1 Sep 2012 00:26:28 +0000 (00:26 +0000)]
llvm/test/CodeGen/X86/fp-fast.ll: Suppress FMA4 on AMD Bulldozer host, corresponding to r162999.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163041 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix Atom bots for r163036.
Manman Ren [Sat, 1 Sep 2012 00:17:06 +0000 (00:17 +0000)]
Fix Atom bots for r163036.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163040 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSelectionDAG: when constructing VZEXT_LOAD from other loads, make sure its
Manman Ren [Fri, 31 Aug 2012 23:16:57 +0000 (23:16 +0000)]
SelectionDAG: when constructing VZEXT_LOAD from other loads, make sure its
output chain is correctly setup.

As an example, if the original load must happen before later stores, we need
to make sure the constructed VZEXT_LOAD is constrained to be before the stores.

rdar://11457792

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163036 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMark FMA4 instructions as commutable and add them to the folding tables.
Craig Topper [Fri, 31 Aug 2012 23:10:34 +0000 (23:10 +0000)]
Mark FMA4 instructions as commutable and add them to the folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163035 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake sure to build libpthread to check for HAVE_PTHREAD_MUTEX_LOCK.
Eric Christopher [Fri, 31 Aug 2012 22:39:14 +0000 (22:39 +0000)]
Make sure to build libpthread to check for HAVE_PTHREAD_MUTEX_LOCK.

Patch by Brad Smith!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163033 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove an unused argument. The MCInst opcode is set in the ConvertToMCInst()
Chad Rosier [Fri, 31 Aug 2012 22:12:31 +0000 (22:12 +0000)]
Remove an unused argument.  The MCInst opcode is set in the ConvertToMCInst()
function nowadays.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163030 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd selection of RegOp2MemOpTable3 to canFoldMemoryOperand
Craig Topper [Fri, 31 Aug 2012 22:12:16 +0000 (22:12 +0000)]
Add selection of RegOp2MemOpTable3 to canFoldMemoryOperand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163029 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd MachineInstr::tieOperands, remove setIsTied().
Jakob Stoklund Olesen [Fri, 31 Aug 2012 20:50:53 +0000 (20:50 +0000)]
Add MachineInstr::tieOperands, remove setIsTied().

Manage tied operands entirely internally to MachineInstr. This makes it
possible to change the representation of tied operands, as I will do
shortly.

The constraint that tied uses and defs must be in the same order was too
restrictive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163021 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix PR12359
Michael Liao [Fri, 31 Aug 2012 20:12:31 +0000 (20:12 +0000)]
Fix PR12359

- In addition to undefined, if V2 is zero vector, skip 2nd PSHUFB and POR as
  well as PSHUFB will zero elements with negative indices.

  Patch by Sriram Murali <sriram.murali@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163018 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoThe instruction DINS may be transformed into DINSU or DEXTM depending
Jack Carter [Fri, 31 Aug 2012 18:06:48 +0000 (18:06 +0000)]
The instruction DINS may be transformed into DINSU or DEXTM depending
on the size of the extraction and its position in the 64 bit word.

This patch allows support of the dext transformations with mips64 direct
object output.

0 <= msb < 32 0 <= lsb < 32 0 <= pos < 32 1 <= size <= 32
DINS
The field is entirely contained in the right-most word of the doubleword

32 <= msb < 64 0 <= lsb < 32 0 <= pos < 32 2 <= size <= 64
DINSM
The field straddles the words of the doubleword

32 <= msb < 64 32 <= lsb < 64 32 <= pos < 64 1 <= size <= 32
DINSU
The field is entirely contained in the left-most word of the doubleword

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163010 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMove the GCOVFormat enums into their own namespace per the LLVM coding standard.
Bill Wendling [Fri, 31 Aug 2012 17:31:28 +0000 (17:31 +0000)]
Move the GCOVFormat enums into their own namespace per the LLVM coding standard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163008 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a comment to explain what's really going on.
Chad Rosier [Fri, 31 Aug 2012 17:24:10 +0000 (17:24 +0000)]
Add a comment to explain what's really going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163005 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoThe ConvertToMCInst() function can't fail, so remove the now dead Match_ConversionFai...
Chad Rosier [Fri, 31 Aug 2012 16:41:07 +0000 (16:41 +0000)]
The ConvertToMCInst() function can't fail, so remove the now dead Match_ConversionFail enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163002 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMark FMA3 instructions as commutable so that the operands to the multiply part can...
Craig Topper [Fri, 31 Aug 2012 16:31:13 +0000 (16:31 +0000)]
Mark FMA3 instructions as commutable so that the operands to the multiply part can be commuted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163001 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUse CloneMachineInstr to make a new MI in commuteInstruction to make the code toleran...
Craig Topper [Fri, 31 Aug 2012 16:30:05 +0000 (16:30 +0000)]
Use CloneMachineInstr to make a new MI in commuteInstruction to make the code tolerant of instructions with more than two input operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163000 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd support for converting llvm.fma to fma4 instructions.
Craig Topper [Fri, 31 Aug 2012 15:40:30 +0000 (15:40 +0000)]
Add support for converting llvm.fma to fma4 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162999 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDon't enforce ordered inline asm operands.
Jakob Stoklund Olesen [Fri, 31 Aug 2012 15:34:59 +0000 (15:34 +0000)]
Don't enforce ordered inline asm operands.

I was too optimistic, inline asm can have tied operands that don't
follow the def order.

Fixes PR13742.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162998 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoClean up ProfileDataLoader a bit.
Benjamin Kramer [Fri, 31 Aug 2012 12:43:07 +0000 (12:43 +0000)]
Clean up ProfileDataLoader a bit.

- Overloading operator<< for raw_ostream and pointers is dangerous, it alters
  the behavior of code that includes the header.
- Remove unused ID.
- Use LLVM's byte swapping helpers instead of a hand-coded.
- Make ReadProfilingData work directly on a pointer.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162992 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm/test/CodeGen/X86/vec_select.ll: Fix failure on xmm-less hosts, to add -mattr...
NAKAMURA Takumi [Fri, 31 Aug 2012 10:02:22 +0000 (10:02 +0000)]
llvm/test/CodeGen/X86/vec_select.ll: Fix failure on xmm-less hosts, to add -mattr=+sse2.

FIXME: Should this be tested with both +avx and -avx,+sse2?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162983 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCleanups due to feedback. No functionality change. Patch by Alistair.
Bill Wendling [Fri, 31 Aug 2012 05:18:31 +0000 (05:18 +0000)]
Cleanups due to feedback. No functionality change. Patch by Alistair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162979 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoClean up AddedComplexity further after adding UseSSEx
Michael Liao [Fri, 31 Aug 2012 03:01:35 +0000 (03:01 +0000)]
Clean up AddedComplexity further after adding UseSSEx

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162973 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix a couple of typos in EmitAtomic.
Jakob Stoklund Olesen [Fri, 31 Aug 2012 02:08:34 +0000 (02:08 +0000)]
Fix a couple of typos in EmitAtomic.

Thumb2 instructions are mostly constrained to rGPR, not tGPR which is
for Thumb1.

rdar://problem/12203728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162968 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoX86: Fix encoding of 'movd %xmm0, %rax'
Jim Grosbach [Fri, 31 Aug 2012 00:30:30 +0000 (00:30 +0000)]
X86: Fix encoding of 'movd %xmm0, %rax'

The assembly string for the VMOVPQIto64rr instruction incorrectly lacked the 'v'
prefix, resulting in mis-assembly of the vanilla movd instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162963 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWith the fix in r162954/162955 every cvt function returns true. Thus, have
Chad Rosier [Fri, 31 Aug 2012 00:03:31 +0000 (00:03 +0000)]
With the fix in r162954/162955 every cvt function returns true.  Thus, have
the ConvertToMCInst() return void, rather then a bool.  Update all the cvt
functions as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162961 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTake account of boolean vector contents when promoting a build vector from i1 to...
Pete Cooper [Thu, 30 Aug 2012 23:58:52 +0000 (23:58 +0000)]
Take account of boolean vector contents when promoting a build vector from i1 to some other type.  rdar://problem/12210060

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162960 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTry to make this test more generic to unbreak buildbots.
Owen Anderson [Thu, 30 Aug 2012 23:51:20 +0000 (23:51 +0000)]
Try to make this test more generic to unbreak buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162958 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTeach the DAG combiner to turn chains of FADDs (x+x+x+x+...) into FMULs by constants...
Owen Anderson [Thu, 30 Aug 2012 23:35:16 +0000 (23:35 +0000)]
Teach the DAG combiner to turn chains of FADDs (x+x+x+x+...) into FMULs by constants.  This is only enabled in unsafe FP math mode, since it does not preserve rounding effects for all such constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162956 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix for r162954. Return the Error.
Chad Rosier [Thu, 30 Aug 2012 23:22:05 +0000 (23:22 +0000)]
Fix for r162954.  Return the Error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162955 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMove a check to the validateInstruction() function where it more properly belongs.
Chad Rosier [Thu, 30 Aug 2012 23:20:38 +0000 (23:20 +0000)]
Move a check to the validateInstruction() function where it more properly belongs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162954 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[llvm] Updated the test fold-vector-select so that we test the vector selects exhaust...
Michael Gottesman [Thu, 30 Aug 2012 23:11:49 +0000 (23:11 +0000)]
[llvm] Updated the test fold-vector-select so that we test the vector selects exhaustively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162953 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTypo.
Chad Rosier [Thu, 30 Aug 2012 23:00:00 +0000 (23:00 +0000)]
Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162952 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWhitespace.
Chad Rosier [Thu, 30 Aug 2012 21:47:00 +0000 (21:47 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162946 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWhitespace.
Chad Rosier [Thu, 30 Aug 2012 21:46:00 +0000 (21:46 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162945 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoHoist a check to eliminate obvious mismatches as early as possible. Also, fix
Chad Rosier [Thu, 30 Aug 2012 21:43:05 +0000 (21:43 +0000)]
Hoist a check to eliminate obvious mismatches as early as possible.  Also, fix
an 80-column violation in the generated code.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162944 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCurrently targets that do not support selects with scalar conditions and vector opera...
Nadav Rotem [Thu, 30 Aug 2012 19:17:29 +0000 (19:17 +0000)]
Currently targets that do not support selects with scalar conditions and vector operands - scalarize the code. ARM is such a target
because it does not support CMOV of vectors. To implement this efficientlyi, we broadcast the condition bit and use a sequence of NAND-OR
to select between the two operands. This is the same sequence we use for targets that don't have vector BLENDs (like SSE2).

rdar://12201387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162926 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[ms-inline asm] Add a new function, GetMCInstOperandNum, to the
Chad Rosier [Thu, 30 Aug 2012 17:59:25 +0000 (17:59 +0000)]
[ms-inline asm] Add a new function, GetMCInstOperandNum, to the
AsmMatcherEmitter.  This function maps inline assembly operands to MCInst
operands.

For example, '__asm mov j, eax' is represented by the follow MCInst:

<MCInst 1460 <MCOperand Reg:0> <MCOperand Imm:1> <MCOperand Reg:0>
             <MCOperand Expr:(j)> <MCOperand Reg:0> <MCOperand Reg:43>>

The first 5 MCInst operands are a result of j matching as a memory operand
consisting of a BaseReg (Reg:0), MemScale (Imm:1), MemIndexReg(Reg:0),
Expr (Expr:(j), and a MemSegReg (Reg:0).  The 6th MCInst operand represents
the eax register (Reg:43).

This translation is necessary to determine the Input and Output Exprs.  If a
single asm operand maps to multiple MCInst operands, the index of the first
MCInst operand is returned.  Ideally, it would return the operand we really
care out (i.e., the Expr:(j) in this case), but I haven't found an easy way
of doing this yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162920 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoIntroduce 'UseSSEx' to force SSE legacy encoding
Michael Liao [Thu, 30 Aug 2012 16:54:46 +0000 (16:54 +0000)]
Introduce 'UseSSEx' to force SSE legacy encoding

- Add 'UseSSEx' to force SSE legacy insn not being selected when AVX is
  enabled.

  As the penalty of inter-mixing SSE and AVX instructions, we need
  prevent SSE legacy insn from being generated except explicitly
  specified through some intrinsics. For patterns supported by both
  SSE and AVX, so far, we force AVX insn will be tried first relying on
  AddedComplexity or position in td file. It's error-prone and
  introduces bugs accidentally.

  'UseSSEx' is disabled when AVX is turned on. For SSE insns inherited
  by AVX, we need this predicate to force VEX encoding or SSE legacy
  encoding only.

  For insns not inherited by AVX, we still use the previous predicates,
  i.e. 'HasSSEx'. So far, these insns fall into the following
  categories:
  * SSE insns with MMX operands
  * SSE insns with GPR/MEM operands only (xFENCE, PREFETCH, CLFLUSH,
    CRC, and etc.)
  * SSE4A insns.
  * MMX insns.
  * x87 insns added by SSE.

2 test cases are modified:

 - test/CodeGen/X86/fast-isel-x86-64.ll
   AVX code generation is different from SSE one. 'vcvtsi2sdq' cannot be
   selected by fast-isel due to complicated pattern and fast-isel
   fallback to materialize it from constant pool.

 - test/CodeGen/X86/widen_load-1.ll
   AVX code generation is different from SSE one after fixing SSE/AVX
   inter-mixing. Exec-domain fixing prefers 'vmovapd' instead of
   'vmovaps'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162919 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoADTTests: [CMake] Exclude DenseMapTest.cpp and SmallVectorTest.cpp on MSVC9 due to...
NAKAMURA Takumi [Thu, 30 Aug 2012 16:22:32 +0000 (16:22 +0000)]
ADTTests: [CMake] Exclude DenseMapTest.cpp and SmallVectorTest.cpp on MSVC9 due to its bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162918 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoApply "/Og-" also to MSC15(aka VS9) on VMCore/Function.cpp.
NAKAMURA Takumi [Thu, 30 Aug 2012 16:22:26 +0000 (16:22 +0000)]
Apply "/Og-" also to MSC15(aka VS9) on VMCore/Function.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162917 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPPCISelLowering.cpp: Fix r162725.
NAKAMURA Takumi [Thu, 30 Aug 2012 15:52:29 +0000 (15:52 +0000)]
PPCISelLowering.cpp: Fix r162725.

[Tobias von Koch] What's happening here is that the CR6SET/CR6UNSET is breaking the chain of register copies glued to the function call (BL_SVR4 node). The scheduler then moves other instructions in between those and the function call, which isn't good!

Right. That's the case where there is no chain of register copies before the call, so InFlag == 0... Attached is a new revision of the patch which should fix this for good.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162916 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPPCISelLowering.cpp: Whitespace.
NAKAMURA Takumi [Thu, 30 Aug 2012 15:52:23 +0000 (15:52 +0000)]
PPCISelLowering.cpp: Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162915 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotest
Michael Ilseman [Thu, 30 Aug 2012 15:45:16 +0000 (15:45 +0000)]
test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162914 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix test case.
Benjamin Kramer [Thu, 30 Aug 2012 15:42:45 +0000 (15:42 +0000)]
Fix test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162913 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLoopRotate: Also rotate loops with multiple exits.
Benjamin Kramer [Thu, 30 Aug 2012 15:39:42 +0000 (15:39 +0000)]
LoopRotate: Also rotate loops with multiple exits.

The old PHI updating code in loop-rotate was replaced with SSAUpdater a while
ago, it has no problems with comples PHIs. What had to be fixed is detecting
whether a loop was already rotated and updating dominators when multiple exits
were present.

This change increases overall code size a bit, mostly due to additional loop
unrolling opportunities. Passes test-suite and selfhost with -verify-dom-info.
Fixes PR7447.

Thanks to Andy for the input on the domtree updating code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162912 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoInstCombine: Fix comment to reflect the code.
Benjamin Kramer [Thu, 30 Aug 2012 15:07:40 +0000 (15:07 +0000)]
InstCombine: Fix comment to reflect the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162911 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDon't use MCInstrDesc flags for implicit operands.
Jakob Stoklund Olesen [Thu, 30 Aug 2012 14:39:06 +0000 (14:39 +0000)]
Don't use MCInstrDesc flags for implicit operands.

When a MachineInstr is constructed, its implicit operands are added
first, then the explicit operands are inserted before the implicits.

MCInstrDesc has oprand flags like early clobber and operand ties that
apply to the explicit operands.

Don't look at those flags when the implicit operands are first added in
the explicit operands's positions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162910 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWhitespace
Alexey Samsonov [Thu, 30 Aug 2012 13:47:13 +0000 (13:47 +0000)]
Whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162907 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoIt is illegal to transform (sdiv (ashr X c1) c2) -> (sdiv x (2^c1 * c2)),
Nadav Rotem [Thu, 30 Aug 2012 11:23:20 +0000 (11:23 +0000)]
It is illegal to transform (sdiv (ashr X c1) c2)  -> (sdiv x (2^c1 * c2)),
because C always rounds towards zero.

Thanks Dirk and Ben.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162899 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd support for moving pure S-register to NEON pipeline if desired
Tim Northover [Thu, 30 Aug 2012 10:17:45 +0000 (10:17 +0000)]
Add support for moving pure S-register to NEON pipeline if desired

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162898 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoremove old docs
Nadav Rotem [Thu, 30 Aug 2012 09:23:13 +0000 (09:23 +0000)]
remove old docs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162896 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRefactor fetching file/line info from DWARFContext to simplify the
Alexey Samsonov [Thu, 30 Aug 2012 07:49:50 +0000 (07:49 +0000)]
Refactor fetching file/line info from DWARFContext to simplify the
code and allow better code reuse. Make the code a bit more conforming
to LLVM code style.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162895 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd FMA to switch statement in VectorLegalizer::LegalizeOp so that it can be expanded...
Craig Topper [Thu, 30 Aug 2012 07:34:22 +0000 (07:34 +0000)]
Add FMA to switch statement in VectorLegalizer::LegalizeOp so that it can be expanded when it isn't legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162894 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd support for FMA to WidenVectorResult.
Craig Topper [Thu, 30 Aug 2012 07:13:41 +0000 (07:13 +0000)]
Add support for FMA to WidenVectorResult.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162893 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoOnly perform DAG combine on FMAs of legal types.
Craig Topper [Thu, 30 Aug 2012 06:56:15 +0000 (06:56 +0000)]
Only perform DAG combine on FMAs of legal types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162892 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPass by pointer and not std::string.
Bill Wendling [Thu, 30 Aug 2012 01:32:31 +0000 (01:32 +0000)]
Pass by pointer and not std::string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162888 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoShould put test case under test/ExecutionEngine/MCJIT/
Michael Liao [Thu, 30 Aug 2012 00:43:57 +0000 (00:43 +0000)]
Should put test case under test/ExecutionEngine/MCJIT/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162885 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r162855 in favor of changing clang to emit the absolute coverage file path.
Bill Wendling [Thu, 30 Aug 2012 00:34:21 +0000 (00:34 +0000)]
Revert r162855 in favor of changing clang to emit the absolute coverage file path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162883 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix HashString's Bernstein hash to use unsigned chars, as is usually done.
Will Dietz [Thu, 30 Aug 2012 00:30:21 +0000 (00:30 +0000)]
Fix HashString's Bernstein hash to use unsigned chars, as is usually done.

Changes the hash result for strings containing characters
with values >= 128, such as UTF8 strings (not normal ASCII).

Changed mostly so we match other implementations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162882 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix PR13727
Michael Liao [Thu, 30 Aug 2012 00:30:16 +0000 (00:30 +0000)]
Fix PR13727

- The root cause is that target constant materialization in X86 fast-isel
  creates a PC-rel addressing which may overflow 32-bit range in non-Small code
  model if .rodata section is allocated too far away from code segment in
  MCJIT, which uses Large code model so far.
- Follow the similar logic to fix non-Small code model in fast-isel by skipping
  non-Small code model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162881 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a bit of documentation to copyPhysReg.
Jakob Stoklund Olesen [Wed, 29 Aug 2012 23:52:55 +0000 (23:52 +0000)]
Add a bit of documentation to copyPhysReg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162879 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoVerify the order of tied operands in inline asm.
Jakob Stoklund Olesen [Wed, 29 Aug 2012 23:52:52 +0000 (23:52 +0000)]
Verify the order of tied operands in inline asm.

When there are multiple tied use-def pairs on an inline asm instruction,
the tied uses must appear in the same order as the defs.

It is possible to write an LLVM IR inline asm instruction that breaks
this constraint, but there is no reason for a front end to emit the
operands out of order.

The gnu inline asm syntax specifies tied operands as a single read/write
constraint "+r", so ouf of order operands are not possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162878 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoExplicitly cast an expression to bool before handing it off to __builtin_expect.
Benjamin Kramer [Wed, 29 Aug 2012 23:28:45 +0000 (23:28 +0000)]
Explicitly cast an expression to bool before handing it off to __builtin_expect.

Avoids surprises when someone uses LLVM_(UN)LIKELY with an integer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162877 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd some __builtin_expect magic to StringMap.
Benjamin Kramer [Wed, 29 Aug 2012 22:57:04 +0000 (22:57 +0000)]
Add some __builtin_expect magic to StringMap.

Tombstones and full hash collisions are rare, mark the "empty"
and "no collision" paths as likely. The bug in simplifycfg
that prevented the hints from being picked during selfhost
up was fixed recently :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162874 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReplace the BUILTIN_EXPECT macro with a less horrible LLVM_LIKELY/LLVM_UNLIKELY inter...
Benjamin Kramer [Wed, 29 Aug 2012 22:57:00 +0000 (22:57 +0000)]
Replace the BUILTIN_EXPECT macro with a less horrible LLVM_LIKELY/LLVM_UNLIKELY interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162873 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAllow targets to specify a minimum supported NOP size when performing NOP padding...
Owen Anderson [Wed, 29 Aug 2012 22:18:56 +0000 (22:18 +0000)]
Allow targets to specify a minimum supported NOP size when performing NOP padding.  If the desired padding is smaller than the supported NOP size,
we will enlarge the padding to make it work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162870 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSet the isTied flags when building INLINEASM MachineInstrs.
Jakob Stoklund Olesen [Wed, 29 Aug 2012 22:02:00 +0000 (22:02 +0000)]
Set the isTied flags when building INLINEASM MachineInstrs.

For normal instructions, isTied() is set automatically by addOperand(),
based on MCInstrDesc, but inline asm has tied operands outside the
descriptor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162869 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPreserve branch profile metadata during switch formation.
Andrew Trick [Wed, 29 Aug 2012 21:46:38 +0000 (21:46 +0000)]
Preserve branch profile metadata during switch formation.

Patch by Michael Ilseman!
This fixes SimplifyCFGOpt::FoldValueComparisonIntoPredecessors to preserve metata when folding conditional branches into switches.

void foo(int x) {
  if (x == 0)
    bar(1);
  else if (__builtin_expect(x == 10, 1))
    bar(2);
  else if (x == 20)
    bar(3);
}

CFG:

B0
|  \
|   X0
B10
|  \
|   X10
B20
|  \
E   X20

Merge B0-B10:
w(B0-X0) = w(B0-X0)*sum-weights(B10) = w(B0-X0) * (w(B10-X10) + w(B10-B20))
w(B0-X10) = w(B0-B10) * w(B10-X10)
w(B0-B20) = w(B0-B10) * w(B10-B20)

B0 __
| \  \
| X10 X0
B20
|  \
E  X20

Merge B0-B20:
w(B0-X0) = w(B0-X0) * sum-weights(B20) = w(B0-X0) * (w(B20-E) + w(B20-X20))
w(B0-X10) = w(B0-X10) * sum-weights(B20) = ...
w(B0-X20) = w(B0-B20) * w(B20-X20)
w(B0-E) = w(B0-B20) * w(B20-E)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162868 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agowhitespace
Andrew Trick [Wed, 29 Aug 2012 21:46:36 +0000 (21:46 +0000)]
whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162867 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRename hasVolatileMemoryRef() to hasOrderedMemoryRef().
Jakob Stoklund Olesen [Wed, 29 Aug 2012 21:19:21 +0000 (21:19 +0000)]
Rename hasVolatileMemoryRef() to hasOrderedMemoryRef().

Ordered memory operations are more constrained than volatile loads and
stores because they must be ordered with respect to all other memory
operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162861 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd MachineMemOperand::isUnordered().
Jakob Stoklund Olesen [Wed, 29 Aug 2012 21:08:52 +0000 (21:08 +0000)]
Add MachineMemOperand::isUnordered().

This means the same as LoadInst/StoreInst::isUnordered(), and implies
!isVolatile().

Atomic loads and stored are also ordered, and this is the right method
to check if it is safe to reorder memory operations. Ordered atomics
can't be reordered wrt normal loads and stores, which is a stronger
constraint than volatile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162859 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDon't move normal loads across volatile/atomic loads.
Jakob Stoklund Olesen [Wed, 29 Aug 2012 20:48:45 +0000 (20:48 +0000)]
Don't move normal loads across volatile/atomic loads.

It is technically allowed to move a normal load across a volatile load,
but probably not a good idea.

It is not allowed to move a load across an atomic load with
Ordering > Monotonic, and we model those with MOVolatile as well.

I recently removed the mayStore flag from atomic load instructions, so
they don't need a pseudo-opcode. This patch makes up for the difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162857 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agofix C++ comment in C header
Michael Liao [Wed, 29 Aug 2012 20:32:13 +0000 (20:32 +0000)]
fix C++ comment in C header

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162856 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUse the full path to output the .gcda file.
Bill Wendling [Wed, 29 Aug 2012 20:30:44 +0000 (20:30 +0000)]
Use the full path to output the .gcda file.

This lets the user run the program from a different directory and still have the
.gcda files show up in the correct place.
<rdar://problem/12179524>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162855 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReserve space for the mandatory traceback fields on PPC64.
Hal Finkel [Wed, 29 Aug 2012 20:22:24 +0000 (20:22 +0000)]
Reserve space for the mandatory traceback fields on PPC64.

We need to reserve space for the mandatory traceback fields,
though leaving them as zero is appropriate for now.

Although the ABI calls for these fields to be filled in fully, no
compiler on Linux currently does this, and GDB does not read these
fields.  GDB uses the first word of zeroes during exception handling to
find the end of the function and the size field, allowing it to compute
the beginning of the function.  DWARF information is used for everything
else.  We need the extra 8 bytes of pad so the size field is found in
the right place.

As a comparison, GCC fills in a few of the fields -- language, number
of saved registers -- but ignores the rest.  IBM's proprietary OSes do
make use of the full traceback table facility.

Patch by Bill Schmidt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162854 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUse ArrayRef instead of SmallVector when passing vector into function.
Bill Wendling [Wed, 29 Aug 2012 18:45:41 +0000 (18:45 +0000)]
Use ArrayRef instead of SmallVector when passing vector into function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162851 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoVerify the consistency of inline asm operands.
Jakob Stoklund Olesen [Wed, 29 Aug 2012 18:11:05 +0000 (18:11 +0000)]
Verify the consistency of inline asm operands.

The operands on an INLINEASM machine instruction are divided into groups
headed by immediate flag operands. Verify this structure.

Extract verifyTiedOperands(), and only call it for non-inlineasm
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162849 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoClean this up slightly, doesn't really fall through.
Eric Christopher [Wed, 29 Aug 2012 17:59:32 +0000 (17:59 +0000)]
Clean this up slightly, doesn't really fall through.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162848 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRefactor setExecutionDomain to be clearer about what it's doing and more robust.
Tim Northover [Wed, 29 Aug 2012 16:36:07 +0000 (16:36 +0000)]
Refactor setExecutionDomain to be clearer about what it's doing and more robust.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162844 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake helper function static.
Benjamin Kramer [Wed, 29 Aug 2012 16:17:01 +0000 (16:17 +0000)]
Make helper function static.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162843 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake MemoryBuiltins aware of TargetLibraryInfo.
Benjamin Kramer [Wed, 29 Aug 2012 15:32:21 +0000 (15:32 +0000)]
Make MemoryBuiltins aware of TargetLibraryInfo.

This disables malloc-specific optimization when -fno-builtin (or -ffreestanding)
is specified. This has been a problem for a long time but became more severe
with the recent memory builtin improvements.

Since the memory builtin functions are used everywhere, this required passing
TLI in many places. This means that functions that now have an optional TLI
argument, like RecursivelyDeleteTriviallyDeadFunctions, won't remove dead
mallocs anymore if the TLI argument is missing. I've updated most passes to do
the right thing.

Fixes PR13694 and probably others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162841 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoConvert FMA4 patterns to use target specific nodes instead of intrinsics to align...
Craig Topper [Wed, 29 Aug 2012 07:18:25 +0000 (07:18 +0000)]
Convert FMA4 patterns to use target specific nodes instead of intrinsics to align with FMA3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162829 91177308-0d34-0410-b5e6-96231b3b80d8