oota-llvm.git
6 years ago[SCEV] Add and use SCEVConstant::getAPInt; NFCI
Sanjoy Das [Thu, 17 Dec 2015 20:28:46 +0000 (20:28 +0000)]
[SCEV] Add and use SCEVConstant::getAPInt; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255921 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Adding "\n" to debug output. NFC.
Weiming Zhao [Thu, 17 Dec 2015 19:53:41 +0000 (19:53 +0000)]
[InstCombine] Adding "\n" to debug output. NFC.

Summary:
[InstCombine] Adding '\n' to debug output. NFC.

Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>

Reviewers: apazos, majnemer, weimingz

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15403

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255920 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoHardcode the target in this testcase — it depends on the ABI.
Adrian Prantl [Thu, 17 Dec 2015 19:33:56 +0000 (19:33 +0000)]
Hardcode the target in this testcase — it depends on the ABI.
This fixes a failure on Windows buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255919 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[EarlyCSE] DSE of atomic unordered stores
Philip Reames [Thu, 17 Dec 2015 18:50:50 +0000 (18:50 +0000)]
[EarlyCSE] DSE of atomic unordered stores

The rules for removing trivially dead stores are a lot less complicated than loads. Since we know the later store post dominates the former and the former dominates the later, unless the former has side effects other than the actual store, we can remove it. One slightly surprising thing is that we can freely remove atomic stores, even if the later one isn't atomic. There's no guarantee the atomic one was every visible.

For the moment, we don't handle DSE of ordered atomic stores. We could extend the same chain of reasoning to them, but the catch is we'd then have to model the ordering effect without a store instruction. Since our fences are a stronger than our operation orderings, simple using a fence isn't an obvious win. This arguable calls for a refinement in our fence specification, but that's (much) later work.

Differential Revision: http://reviews.llvm.org/D15352

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255914 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agomake this test less whitespace-sensitive.
Adrian Prantl [Thu, 17 Dec 2015 18:34:37 +0000 (18:34 +0000)]
make this test less whitespace-sensitive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255913 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRewrite test to use llvm-dwarfdump instead of checking for asm comments.
Adrian Prantl [Thu, 17 Dec 2015 18:25:51 +0000 (18:25 +0000)]
Rewrite test to use llvm-dwarfdump instead of checking for asm comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255912 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Metadata linking for imported functions
Teresa Johnson [Thu, 17 Dec 2015 17:14:09 +0000 (17:14 +0000)]
[ThinLTO] Metadata linking for imported functions

Summary:
Second patch split out from http://reviews.llvm.org/D14752.

Maps metadata as a post-pass from each module when importing complete,
suturing up final metadata to the temporary metadata left on the
imported instructions.

This entails saving the mapping from bitcode value id to temporary
metadata in the importing pass, and from bitcode value id to final
metadata during the metadata linking postpass.

Depends on D14825.

Reviewers: dexonsmith, joker.eph

Subscribers: davidxl, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D14838

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255909 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/SI: Reserve appropriate number of sgprs for flat scratch init.
Tom Stellard [Thu, 17 Dec 2015 17:05:09 +0000 (17:05 +0000)]
AMDGPU/SI: Reserve appropriate number of  sgprs for flat scratch init.

Reviewers: tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15583

Patch by: Changpeng Fang

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255908 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Fix off-by-one in SIRegisterInfo::eliminateFrameIndex
Nicolai Haehnle [Thu, 17 Dec 2015 16:46:42 +0000 (16:46 +0000)]
AMDGPU: Fix off-by-one in SIRegisterInfo::eliminateFrameIndex

Summary:
The method insertNOPs expected the number of wait states to be passed as
parameter, while eliminateFrameIndex passed the immediate argument for the
S_NOP, leading to an off-by-one error. Rename the method to make the
meaning of its parameter clearer. The number of 4 / 5 wait states (which
is what the method has always _tried_ to do according to the comment) is
correct according to the hardware docs.

I stumbled upon this while trying to track down the cause of
https://bugs.freedesktop.org/show_bug.cgi?id=93264. While clearly needed,
this patch unfortunately does not fix that bug...

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255906 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r254592 (virtual dtor in SCEVPredicate).
Andy Gibbs [Thu, 17 Dec 2015 16:43:53 +0000 (16:43 +0000)]
Revert r254592 (virtual dtor in SCEVPredicate).

Clang has better diagnostics in this case.  It is not necessary therefore
to change the destructor to avoid what is effectively an invalid warning
in gcc.  Instead, better handle the warning flags given to the compiler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255905 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMark a couple ModuleLinker member functions as const (NFC)
Teresa Johnson [Thu, 17 Dec 2015 16:34:53 +0000 (16:34 +0000)]
Mark a couple ModuleLinker member functions as const (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255903 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAvoid explicit relocation sorting most of the time.
Rafael Espindola [Thu, 17 Dec 2015 16:22:06 +0000 (16:22 +0000)]
Avoid explicit relocation sorting most of the time.

These days relocations are created and stored in a deterministic way.
The order they are created is also suitable for the .o file, so we don't
need an explicit sort.

The last remaining exception is MIPS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255902 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[AArch64] Enable PostRAScheduler for AArch64 generic build"
Rafael Espindola [Thu, 17 Dec 2015 15:12:26 +0000 (15:12 +0000)]
Revert "[AArch64] Enable PostRAScheduler for AArch64 generic build"

This reverts commit r255896. It broke the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255899 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAlways sort by offset first. NFC.
Rafael Espindola [Thu, 17 Dec 2015 15:08:24 +0000 (15:08 +0000)]
Always sort by offset first. NFC.

Every target changing sortRelocs was first calling the parent
implementation. Just run that first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255898 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix unused variable warning in release builds. NFC.
Diego Novillo [Thu, 17 Dec 2015 14:58:34 +0000 (14:58 +0000)]
Fix unused variable warning in release builds. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255897 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Enable PostRAScheduler for AArch64 generic build
MinSeong Kim [Thu, 17 Dec 2015 14:51:22 +0000 (14:51 +0000)]
[AArch64] Enable PostRAScheduler for AArch64 generic build

This patch enables PostRAScheduler specifically for AArch64 generic build,
which is beneficial from the performance perspective.
Speedups up to 2 to 7% for some benchmarks on A57 and A53 are observed.
Also benchmarks from LLVM test-suite did not regress.

Differential Revision: http://reviews.llvm.org/D15557

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255896 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Add DAG combine for extract extend pattern
Matthew Simpson [Thu, 17 Dec 2015 14:30:55 +0000 (14:30 +0000)]
[AArch64] Add DAG combine for extract extend pattern

This patch adds a DAG combine for (any_extend (extract_vector_elt v, i)) ->
(extract_vector_elt v, i). The combine enables us to better match some SMOV
patterns.

Differential Revision: http://reviews.llvm.org/D15515

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255895 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSimplify. NFC.
Rafael Espindola [Thu, 17 Dec 2015 14:19:52 +0000 (14:19 +0000)]
Simplify. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255894 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDOTGraphTraits: Allow the decision to show a graph to consider the analysis
Tobias Grosser [Thu, 17 Dec 2015 12:48:25 +0000 (12:48 +0000)]
DOTGraphTraits: Allow the decision to show a graph to consider the analysis

The method processFunction() is called to decide if a graph should be shown for
a certain function. To allow DOTGraphTraitViewers to take this decision based
on the analysis results for the given function, we forward a reference to the
analysis result. This will be used by Polly to only visualize functions where
interesting loop regions have been detected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255889 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemoved empty directory.
Alexander Kornienko [Thu, 17 Dec 2015 12:19:05 +0000 (12:19 +0000)]
Removed empty directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255888 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add option for enabling LEA optimization pass, by Andrey Turetsky
Alexey Bataev [Thu, 17 Dec 2015 07:34:39 +0000 (07:34 +0000)]
[X86] Add option for enabling LEA optimization pass, by Andrey Turetsky
Add option to enable/disable LEA optimization pass. By default the pass is disabled.
Differential Revision: http://reviews.llvm.org/D15573

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255881 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Convert WebAssemblyTargetObjectFile to TargetLoweringObjectFileELF
Dan Gohman [Thu, 17 Dec 2015 04:55:44 +0000 (04:55 +0000)]
[WebAssembly] Convert WebAssemblyTargetObjectFile to TargetLoweringObjectFileELF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255877 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAArch64: Simplify emitEpilogue() and related code; NFC
Matthias Braun [Thu, 17 Dec 2015 03:18:47 +0000 (03:18 +0000)]
AArch64: Simplify emitEpilogue() and related code; NFC

This is in preparation to an upcoming patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255872 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objdump] Use report_fatal_error() for a more uniform error handling.
Davide Italiano [Thu, 17 Dec 2015 01:59:50 +0000 (01:59 +0000)]
[llvm-objdump] Use report_fatal_error() for a more uniform error handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255871 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Experimental ELF writer support
Dan Gohman [Thu, 17 Dec 2015 01:39:00 +0000 (01:39 +0000)]
[WebAssembly] Experimental ELF writer support

This creates the initial infrastructure for writing ELF output files. It
doesn't yet have any implementation for encoding instructions.

Differential Revision: http://reviews.llvm.org/D15555

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255869 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix PR25838.
Cong Hou [Thu, 17 Dec 2015 01:29:08 +0000 (01:29 +0000)]
Fix PR25838.

This is a quick fix to PR25838. The issue comes from the restriction that we
cannot normalize probabilities containing both known and unknown ones. A patch
that removes this restriction is under the review now:

http://reviews.llvm.org/D15548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255867 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] InstrPGO and coverage code refactoring (NFC)
Xinliang David Li [Thu, 17 Dec 2015 00:53:37 +0000 (00:53 +0000)]
[PGO] InstrPGO and coverage code refactoring (NFC)

Introduce a new class InstrProfSymtab to abstract
the PGO symbol table for prof and coverage reader.
The symtab is is to lookup function's PGO name
using function keys. The first user of the class
is CoverageMapping Reader. More will follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255862 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoWebAssembly: update expected torture test failures
JF Bastien [Thu, 17 Dec 2015 00:12:06 +0000 (00:12 +0000)]
WebAssembly: update expected torture test failures

We now have 240 expected failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255858 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse std::unique_ptr. NFC.
Rafael Espindola [Wed, 16 Dec 2015 23:49:14 +0000 (23:49 +0000)]
Use std::unique_ptr. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255852 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix legalization of shift operators on large integer types.
Dan Gohman [Wed, 16 Dec 2015 23:25:51 +0000 (23:25 +0000)]
[WebAssembly] Fix legalization of shift operators on large integer types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255847 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Implement eliminateCallFramePseudo
Derek Schuff [Wed, 16 Dec 2015 23:21:30 +0000 (23:21 +0000)]
[WebAssembly] Implement eliminateCallFramePseudo

Summary:
Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN
pseudo-instructions. Add a test calling a vararg function which causes non-0
adjustments. This revealed an issue with RegisterCoalescer wherein it
eliminates a COPY from SP32 to a vreg but failes to update the live ranges
of EXPR_STACK, causing a machineinstr verifier failure (so this test
is commented out).

Also add a dynamic alloca test, which causes a callseq_end dag node with
a 0 (instead of undef) second argument to be generated. We currently fail to
select that, so adjust the ADJCALLSTACKUP tablegen code to handle it.

Differential Revision: http://reviews.llvm.org/D15587

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255844 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoChange linkInModule to take a std::unique_ptr.
Rafael Espindola [Wed, 16 Dec 2015 23:16:33 +0000 (23:16 +0000)]
Change linkInModule to take a std::unique_ptr.

Passing in a std::unique_ptr should help find errors when the module
is used after being linked into another module.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255842 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix funciton->function typo.
Eric Christopher [Wed, 16 Dec 2015 23:10:53 +0000 (23:10 +0000)]
Fix funciton->function typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255841 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDrop an unnecessary use of writev.
Rafael Espindola [Wed, 16 Dec 2015 22:59:06 +0000 (22:59 +0000)]
Drop an unnecessary use of writev.

It looks like the code this patch deletes is based on a misunderstanding of
what guarantees writev provides. In particular, writev with 1 iovec is
not "more atomic" than a write.

Testing on OS X shows that both write and writev from multiple processes
can be intermixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255837 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Simplify some TRI/TII getters. NFC.
Ahmed Bougacha [Wed, 16 Dec 2015 22:54:06 +0000 (22:54 +0000)]
[AArch64] Simplify some TRI/TII getters. NFC.

We don't need static_casts when we use the right Subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255836 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMove llvm/test/DebugInfo/live-debug-values.ll into X86, due to target triple.
NAKAMURA Takumi [Wed, 16 Dec 2015 22:44:10 +0000 (22:44 +0000)]
Move llvm/test/DebugInfo/live-debug-values.ll into X86, due to target triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255834 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSimplify memory management with std::unique_ptr.
Rafael Espindola [Wed, 16 Dec 2015 22:28:34 +0000 (22:28 +0000)]
Simplify memory management with std::unique_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255831 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CodeGen] Make MachineInstrBuilder::copyImplicitOps const. NFC.
Ahmed Bougacha [Wed, 16 Dec 2015 22:15:30 +0000 (22:15 +0000)]
[CodeGen] Make MachineInstrBuilder::copyImplicitOps const. NFC.

This matches the other MIB methods, none of which modify the builder.
Without this, we can't chain copyImplicitOps.
Also reformat the few users, in PPCEarlyReturn.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255828 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Handle and report overflow during profile merge for all types of data
Nathan Slingerland [Wed, 16 Dec 2015 21:45:43 +0000 (21:45 +0000)]
[PGO] Handle and report overflow during profile merge for all types of data

Summary: Surface counter overflow when merging profile data. Merging still occurs on overflow but counts saturate to the maximum representable value. Overflow is reported to the user.

Reviewers: davidxl, dnovillo, silvas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D15547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255825 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse LLVM style variable name (NFC)
Teresa Johnson [Wed, 16 Dec 2015 21:37:48 +0000 (21:37 +0000)]
Use LLVM style variable name (NFC)

Fixes variable name from r255779.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255824 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCXX_FAST_TLS calling convention: performance improvement for AArch64.
Manman Ren [Wed, 16 Dec 2015 21:04:19 +0000 (21:04 +0000)]
CXX_FAST_TLS calling convention: performance improvement for AArch64.

The access function has a short entry and a short exit, the initialization
block is only run the first time. To improve the performance, we want to
have a short frame at the entry and exit.

We explicitly handle most of the CSRs via copies. Only the CSRs that are not
handled via copies will be in CSR_SaveList.

Frame lowering and prologue/epilogue insertion will generate a short frame
in the entry and exit according to CSR_SaveList. The majority of the CSRs will
be handled by register allcoator. Register allocator will try to spill and
reload them in the initialization block.

We add CSRsViaCopy, it will be explicitly handled during lowering.

1> we first set FunctionLoweringInfo->SplitCSR if conditions are met (the target
   supports it for the given machine function and the function has only return
   exits). We also call TLI->initializeSplitCSR to perform initialization.
2> we call TLI->insertCopiesSplitCSR to insert copies from CSRsViaCopy to
   virtual registers at beginning of the entry block and copies from virtual
   registers to CSRsViaCopy at beginning of the exit blocks.
3> we also need to make sure the explicit copies will not be eliminated.

The target independent portion was committed as r255353.
rdar://problem/23557469

Differential Revision: http://reviews.llvm.org/D15341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255821 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Update e_flags in the ELF definitions
Krzysztof Parzyszek [Wed, 16 Dec 2015 20:57:07 +0000 (20:57 +0000)]
[Hexagon] Update e_flags in the ELF definitions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255820 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCXX_FAST_TLS calling convention: target independent portion.
Manman Ren [Wed, 16 Dec 2015 20:45:48 +0000 (20:45 +0000)]
CXX_FAST_TLS calling convention: target independent portion.

Update supportSplitCSR's interface to take machine function instead of the
calling convention.

Review comments for http://reviews.llvm.org/D15341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255818 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove now-unused include
Derek Schuff [Wed, 16 Dec 2015 20:43:10 +0000 (20:43 +0000)]
Remove now-unused include

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255817 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoIterate over phys regs instead
Derek Schuff [Wed, 16 Dec 2015 20:43:08 +0000 (20:43 +0000)]
Iterate over phys regs instead

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255816 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Print an extra local decl when the user stack pointer is used
Derek Schuff [Wed, 16 Dec 2015 20:43:06 +0000 (20:43 +0000)]
[WebAssembly] Print an extra local decl when the user stack pointer is used

Differential Revision: http://reviews.llvm.org/D15546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255815 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago [Hexagon] Misc fixes to r255807
Krzysztof Parzyszek [Wed, 16 Dec 2015 20:07:04 +0000 (20:07 +0000)]
 [Hexagon] Misc fixes to r255807

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255811 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSet debugger tuning from TargetOptions (NFC)
Paul Robinson [Wed, 16 Dec 2015 19:58:30 +0000 (19:58 +0000)]
Set debugger tuning from TargetOptions (NFC)

Differential Revision: http://reviews.llvm.org/D15427

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255810 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Update the Hexagon packetizer
Krzysztof Parzyszek [Wed, 16 Dec 2015 19:36:12 +0000 (19:36 +0000)]
[Hexagon] Update the Hexagon packetizer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255807 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[ARM] Add ARMv8.2-A FP16 scalar instructions"
Reid Kleckner [Wed, 16 Dec 2015 19:21:03 +0000 (19:21 +0000)]
Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions"

This reverts commit r255762.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255806 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix the CFG Stackifier to handle unoptimized branches
Dan Gohman [Wed, 16 Dec 2015 19:06:41 +0000 (19:06 +0000)]
[WebAssembly] Fix the CFG Stackifier to handle unoptimized branches

If a branch both branches to and falls through to the same block, treat it as
an explicit branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255803 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLPM: Make callers of LPM.deleteLoopFromQueue update LoopInfo directly. NFC
Justin Bogner [Wed, 16 Dec 2015 18:40:20 +0000 (18:40 +0000)]
LPM: Make callers of LPM.deleteLoopFromQueue update LoopInfo directly. NFC

As of r255720, the loop pass manager will DTRT when passes update the
loop info for removed loops, so they no longer need to reach into
LPPassManager APIs to do this kind of transformation. This change very
nearly removes the need for the LPPassManager to even be passed into
loop passes - the only remaining pass that uses the LPM argument is
LoopUnswitch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255797 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Override getCFInstrCost
Matt Arsenault [Wed, 16 Dec 2015 18:37:19 +0000 (18:37 +0000)]
AMDGPU: Override getCFInstrCost

The default cost was 0 with the assumption that it is predictable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255796 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMachineScheduler: Add a target hook for deciding which RegPressure sets to
Tom Stellard [Wed, 16 Dec 2015 18:31:01 +0000 (18:31 +0000)]
MachineScheduler: Add a target hook for deciding which RegPressure sets to
increase

Summary:
This patch adds a function called getRegPressureSetScore() to
TargetRegisterInfo.  The MachineScheduler uses this when comparing
instruction that increase the register pressure of different sets
to determine which set is safer to increase.

This hook is useful for GPU targets where the number of registers in the
class is not the best metric for determing which presser set is safer to
increase.

Future work may include adding more parameters to this function, like
for example, the current pressure level of the set or the amount that
the pressure will be increased/decreased.

Reviewers: qcolombet, escha, arsenm, atrick, MatzeB

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14806

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255795 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CMake] Adding llvm-profdata to the list of tools clang needs.
Chris Bieneman [Wed, 16 Dec 2015 18:30:36 +0000 (18:30 +0000)]
[CMake] Adding llvm-profdata to the list of tools clang needs.

Bootstrapping clang to generate PGO data (patches coming soon), requires llvm-profdata targets to be generated before clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255794 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReland "[llvm-readobj] Simplify usage of -codeview flag"
Reid Kleckner [Wed, 16 Dec 2015 18:28:12 +0000 (18:28 +0000)]
Reland "[llvm-readobj] Simplify usage of -codeview flag"

Relands r255790 with fixed tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255793 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLPVectorizer] Ensure dominated reduction values.
Charlie Turner [Wed, 16 Dec 2015 18:23:44 +0000 (18:23 +0000)]
[SLPVectorizer] Ensure dominated reduction values.

When considering incoming values as part of a reduction phi, ensure the
incoming value is dominated by said phi.

Failing to ensure this property causes miscompiles.

Fixes PR25787.

Many thanks to Mattias Eriksson for reporting, reducing and analyzing the
problem for me.

Differential Revision: http://reviews.llvm.org/D15580

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255792 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[llvm-readobj] Simplify usage of -codeview flag"
Reid Kleckner [Wed, 16 Dec 2015 18:19:34 +0000 (18:19 +0000)]
Revert "[llvm-readobj] Simplify usage of -codeview flag"

This reverts commit r255790.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255791 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Simplify usage of -codeview flag
Reid Kleckner [Wed, 16 Dec 2015 18:18:39 +0000 (18:18 +0000)]
[llvm-readobj] Simplify usage of -codeview flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255790 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoGenerate a clang CompilationDatabase when running CMake
Benjamin Kramer [Wed, 16 Dec 2015 18:17:45 +0000 (18:17 +0000)]
Generate a clang CompilationDatabase when running CMake

This generates a compile_commands.json file, which tells tools like
YouCompleteMe and clang_complete exactly how to build each source file.

Patch by Justin Lebar!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255789 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Use the new offset syntax for memory operands in inline asm.
Dan Gohman [Wed, 16 Dec 2015 18:14:49 +0000 (18:14 +0000)]
[WebAssembly] Use the new offset syntax for memory operands in inline asm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255788 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SystemZ] Sort relocs to avoid code corruption by linker optimization
Ulrich Weigand [Wed, 16 Dec 2015 18:12:40 +0000 (18:12 +0000)]
[SystemZ] Sort relocs to avoid code corruption by linker optimization

The SystemZ linkers provide an optimization to transform a general-
or local-dynamic TLS sequence into an initial-exec sequence if possible.
Do do that, the compiler generates a function call to __tls_get_offset,
which is a brasl instruction annotated with *two* relocations:

- a R_390_PLT32DBL to install __tls_get_offset as branch target
- a R_390_TLS_GDCALL / R_390_TLS_LDCALL to inform the linker that
  the TLS optimization should be performed if possible

If the optimization is performed, the brasl is replaced by an ld load
instruction.

However, *both* relocs are processed independently by the linker.
Therefore it is crucial that the R_390_PLT32DBL is processed *first*
(installing the branch target for the brasl) and the R_390_TLS_GDCALL
is processed *second* (replacing the whole brasl with an ld).

If the relocs are swapped, the linker will first replace the brasl
with an ld, and *then* install the __tls_get_offset branch target
offset.  Since ld has a different layout than brasl, this may even
result in a completely different (or invalid) instruction; in any
case, the resulting code is corrupted.

Unfortunately, the way the MC common code sorts relocations causes
these two to *always* end up the wrong way around, resulting in
wrong code generation by the linker and crashes.

This patch overrides the sortRelocs routine to detect this particular
pair of relocs and enforce the required order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255787 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SystemZ] Fix assertion failure in adjustSubwordCmp
Ulrich Weigand [Wed, 16 Dec 2015 18:04:06 +0000 (18:04 +0000)]
[SystemZ] Fix assertion failure in adjustSubwordCmp

When comparing a zero-extended value against a constant small enough to
be in range of the inner type, it doesn't matter whether a signed or
unsigned compare operation (for the outer type) is being used.  This is
why the code in adjustSubwordCmp had this assertion:

    assert(C.ICmpType == SystemZICMP::Any &&
           "Signedness shouldn't matter here.");

assuming the the caller had already detected that fact.  However, it
turns out that there cases, in particular with always-true or always-
false conditions that have not been eliminated when compiling at -O0,
where this is not true.

Instead of failing an assertion if C.ICmpType is not SystemZICMP::Any
here, we can simply *set* it safely to SystemZICMP::Any, however.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255786 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Make memcpy lowering thread-safe
Tobias Edler von Koch [Wed, 16 Dec 2015 17:29:37 +0000 (17:29 +0000)]
[Hexagon] Make memcpy lowering thread-safe

This removes an unpleasant hack involving a global variable for special
lowering of certain memcpy calls. These are now lowered as intended in
EmitTargetCodeForMemcpy in the same way that other targets do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255785 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Update horizontal reduction test cases.
Charlie Turner [Wed, 16 Dec 2015 17:22:24 +0000 (17:22 +0000)]
[NFC] Update horizontal reduction test cases.

These testcases no longer need to specify -slp-vectorize-hor, since it was
enabled by default in r252733.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255783 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Support more kinds of inline asm operands
Dan Gohman [Wed, 16 Dec 2015 17:15:17 +0000 (17:15 +0000)]
[WebAssembly] Support more kinds of inline asm operands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255782 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoInstall runtime dlls in the INSTALL_DIR/bin directory. NFC
Sumanth Gundapaneni [Wed, 16 Dec 2015 17:07:15 +0000 (17:07 +0000)]
Install runtime dlls in the INSTALL_DIR/bin directory. NFC

One of the earlier patches updated the cmake rule to install the
runtime dlls in INSTALL_DIR/lib which is not correct. This patch
updates the rule to install CMake's RUNTIME in bin directory
Differential Revision: http://reviews.llvm.org/D15505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255781 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Packetizer] Add a check whether an instruction should be packetized now
Krzysztof Parzyszek [Wed, 16 Dec 2015 16:38:16 +0000 (16:38 +0000)]
[Packetizer] Add a check whether an instruction should be packetized now

Add a function VLIWPacketizerList::shouldAddToPacket, which will allow
specific implementations to decide if it is profitable to add given
instruction to the current packet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255780 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd RAII wrapper for gold plugin file management
Teresa Johnson [Wed, 16 Dec 2015 16:34:06 +0000 (16:34 +0000)]
Add RAII wrapper for gold plugin file management

Suggested in review of r255256.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255779 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd InaccessibleMemOnly and inaccessibleMemOrArgMemOnly attributes
Vaivaswatha Nagaraj [Wed, 16 Dec 2015 16:16:19 +0000 (16:16 +0000)]
Add InaccessibleMemOnly and inaccessibleMemOrArgMemOnly attributes

Summary:
This patch introduces two new function attributes

InaccessibleMemOnly: This attribute indicates that the function may only access memory that is not accessible by the program/IR being compiled. This is a weaker form of ReadNone.
inaccessibleMemOrArgMemOnly: This attribute indicates that the function may only access memory that is either not accessible by the program/IR being compiled, or is pointed to by its pointer arguments. This is a weaker form of  ArgMemOnly

Test cases have been updated. This revision uses this (https://github.com/llvm-mirror/llvm/commit/d001932f3a8aa1ebd1555162fdce365f011bc292) as reference.

Reviewers: jmolloy, hfinkel

Subscribers: reames, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D15499

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255778 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SimplifyCFG] Don't create unnecessary PHIs
James Molloy [Wed, 16 Dec 2015 14:12:44 +0000 (14:12 +0000)]
[SimplifyCFG] Don't create unnecessary PHIs

In conditional store merging, we were creating PHIs when we didn't
need to. If the value to be predicated isn't defined in the block
we're predicating, then it doesn't need a PHI at all (because we only
deal with triangles and diamonds, any value not in the predicated BB
must dominate the predicated BB).

This fixes a large code size increase in some benchmarks in a popular embedded benchmark suite.

Now with a fix (and fixed tests) for the conformance issue seen in Chromium.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255767 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Add ARMv8.2-A FP16 vector instructions
Oliver Stannard [Wed, 16 Dec 2015 12:37:39 +0000 (12:37 +0000)]
[ARM] Add ARMv8.2-A FP16 vector instructions

ARMv8.2-A adds 16-bit floating point versions of all existing SIMD
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.

Note that VFP without SIMD is not a valid combination for any version of
ARMv8-A, but I have ensured that these instructions all depend on both
FeatureNEON and FeatureFullFP16 for consistency.

Differential Revision: http://reviews.llvm.org/D15039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255764 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Add ARMv8.2-A FP16 scalar instructions
Oliver Stannard [Wed, 16 Dec 2015 11:35:44 +0000 (11:35 +0000)]
[ARM] Add ARMv8.2-A FP16 scalar instructions

ARMv8.2-A adds 16-bit floating point versions of all existing VFP
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.

The assembly for these instructions uses S registers (AArch32 does not
have H registers), but the instructions have ".f16" type specifiers
rather than ".f32" or ".f64". The top 16 bits of each source register
are ignored, and the top 16 bits of the destination register are set to
zero.

These instructions are mostly the same as the 32- and 64-bit versions,
but they use coprocessor 9 rather than 10 and 11.

Two new instructions, VMOVX and VINS, have been added to allow packing
and extracting two 16-bit floats stored in the top and bottom halves of
an S register.

New fixup kinds have been added for the PC-relative load and store
instructions, but no ELF relocations have been added as they have a
range of 512 bytes.

Differential Revision: http://reviews.llvm.org/D15038

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255762 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Improve shift combining
Michael Kuperstein [Wed, 16 Dec 2015 11:22:37 +0000 (11:22 +0000)]
[X86] Improve shift combining

This folds (ashr (shl a, [56,48,32,24,16]), SarConst)
into       (shl, (sext (a), [56,48,32,24,16] - SarConst))
or into    (lshr, (sext (a), SarConst - [56,48,32,24,16]))
depending on sign of (SarConst - [56,48,32,24,16])

sexts in X86 are MOVs.
The MOVs have the same code size as above SHIFTs (only SHIFT by 1 has lower code size).
However the MOVs have 2 advantages to SHIFTs on x86:
1. MOVs can write to a register that differs from source.
2. MOVs accept memory operands.

This fixes PR24373.

Patch by: evgeny.v.stupachenko@intel.com
Differential Revision: http://reviews.llvm.org/D13161

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255761 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SectionMemoryManager] Make better use of virtual memory
Keno Fischer [Wed, 16 Dec 2015 11:13:23 +0000 (11:13 +0000)]
[SectionMemoryManager] Make better use of virtual memory

Summary: On Windows, the allocation granularity can be significantly
larger than a page (64K), so with many small objects, just clearing
the FreeMem list rapidly leaks quite a bit of virtual memory space
(if not rss). Fix that by only removing those parts of the FreeMem
blocks that overlap pages for which we are applying memory permissions,
rather than dropping the FreeMem blocks entirely.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D15202

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255760 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRecommit LiveDebugValues pass after fixing a couple of minor issues.
Vikram TV [Wed, 16 Dec 2015 11:09:48 +0000 (11:09 +0000)]
Recommit LiveDebugValues pass after fixing a couple of minor issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255759 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove FileCheck from test case token_landingpad.ll.
Chen Li [Wed, 16 Dec 2015 06:27:09 +0000 (06:27 +0000)]
Remove FileCheck from test case token_landingpad.ll.
The test case only needs to make sure it does not crash LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255755 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMinor change to TailDuplication.cpp to turn on normalization when removing successor
Cong Hou [Wed, 16 Dec 2015 06:03:30 +0000 (06:03 +0000)]
Minor change to TailDuplication.cpp to turn on normalization when removing successor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255752 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMinor cleanup of Attribute code. NFC.
George Burgess IV [Wed, 16 Dec 2015 05:21:02 +0000 (05:21 +0000)]
Minor cleanup of Attribute code. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255751 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFixed test case in rL255749: [SelectionDAGBuilder] Adds support for landingpads of...
Chen Li [Wed, 16 Dec 2015 05:05:18 +0000 (05:05 +0000)]
Fixed test case in rL255749: [SelectionDAGBuilder] Adds support for landingpads of token type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255750 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAGBuilder] Adds support for landingpads of token type
Chen Li [Wed, 16 Dec 2015 04:48:42 +0000 (04:48 +0000)]
[SelectionDAGBuilder] Adds support for landingpads of token type

Summary: This patch adds a check in visitLandingPad to see if landingpad's result type is token type. If so, do not create DAG nodes for its exception pointer and selector value. This patch enables the back end to handle landingpads of token type.

Reviewers: JosephTremoulet, majnemer, rnk

Subscribers: sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D15405

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255749 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFuzzer: Fix library dependencies.
Peter Collingbourne [Wed, 16 Dec 2015 02:14:57 +0000 (02:14 +0000)]
Fuzzer: Fix library dependencies.

Newer versions of libstdc++ (4.9+), as well as libc++, depend directly on
libpthread from the standard library headers, so libfuzzer needs to declare
a standard library dependency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255745 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSpeculative fix for windows build
Philip Reames [Wed, 16 Dec 2015 01:24:05 +0000 (01:24 +0000)]
Speculative fix for windows build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255743 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[EarlyCSE] DSE of stores which write back loaded values
Philip Reames [Wed, 16 Dec 2015 01:01:30 +0000 (01:01 +0000)]
[EarlyCSE] DSE of stores which write back loaded values

Extend EarlyCSE with an additional style of dead store elimination. If we write back a value just read from that memory location, we can eliminate the store under the assumption that the value hasn't changed.

I'm implementing this mostly because I noticed the omission when looking at the code. It seemed strange to have InstCombine have a peephole which was more powerful than EarlyCSE. :)

Differential Revision: http://reviews.llvm.org/D15397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255739 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[IR] Add support for floating pointer atomic loads and stores
Philip Reames [Wed, 16 Dec 2015 00:49:36 +0000 (00:49 +0000)]
[IR] Add support for floating pointer atomic loads and stores

This patch allows atomic loads and stores of floating point to be specified in the IR and adds an adapter to allow them to be lowered via existing backend support for bitcast-to-equivalent-integer idiom.

Previously, the only way to specify a atomic float operation was to bitcast the pointer to a i32, load the value as an i32, then bitcast to a float. At it's most basic, this patch simply moves this expansion step to the point we start lowering to the backend.

This patch does not add canonicalization rules to convert the bitcast idioms to the appropriate atomic loads. I plan to do that in the future, but for now, let's simply add the support. I'd like to get instruction selection working through at least one backend (x86-64) without the bitcast conversion before canonicalizing into this form.

Similarly, I haven't yet added the target hooks to opt out of the lowering step I added to AtomicExpand. I figured it would more sense to add those once at least one backend (x86) was ready to actually opt out.

As you can see from the included tests, the generated code quality is not great. I plan on submitting some patches to fix this, but help from others along that line would be very welcome. I'm not super familiar with the backend and my ramp up time may be material.

Differential Revision: http://reviews.llvm.org/D15471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255737 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[sancov] blacklist support.
Mike Aizatsky [Wed, 16 Dec 2015 00:31:48 +0000 (00:31 +0000)]
[sancov] blacklist support.

Summary:
Using the blacklist the user can filter own unwanted functions
from all outputs. By default blacklist contains "fun:__sancov*" line.

Differential Revision: http://reviews.llvm.org/D15364

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255732 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix typo in r255720
Justin Bogner [Wed, 16 Dec 2015 00:17:34 +0000 (00:17 +0000)]
Fix typo in r255720

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255724 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTest commit: fixed spelling error in comment.
Wolfgang Pieb [Wed, 16 Dec 2015 00:08:18 +0000 (00:08 +0000)]
Test commit: fixed spelling error in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255721 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLPM: Simplify how passes mark loops for deletion. NFC
Justin Bogner [Wed, 16 Dec 2015 00:01:02 +0000 (00:01 +0000)]
LPM: Simplify how passes mark loops for deletion. NFC

When a pass removes a loop it currently has to reach up into the
LPPassManager's internals to update the state of the iteration over
loops. This reverse dependency results in a pretty awkward interplay
of the LPPassManager and its Passes.

Here, we change this to instead keep track of when a loop has become
"unlooped" in the Loop objects themselves, then the LPPassManager can
check this and manipulate its own state directly. This opens the door
to allow most of the loop passes to work without a backreference to
the LPPassManager.

I've kept passes calling the LPPassManager::deleteLoopFromQueue API
now so I could put an assert in to prove that this is NFC, but a later
pass will update passes just to preserve the LoopInfo directly and
stop referencing the LPPassManager completely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255720 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove one of the void casts used to suppress unused variable warning.
Richard Trieu [Tue, 15 Dec 2015 23:47:17 +0000 (23:47 +0000)]
Remove one of the void casts used to suppress unused variable warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255709 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUn-XFAIL JIT EH tests under [am]san.
Peter Collingbourne [Tue, 15 Dec 2015 23:46:21 +0000 (23:46 +0000)]
Un-XFAIL JIT EH tests under [am]san.

These tests started passing after libcxxabi's r255559, which fixed a problem
relating to how libcxxabi links its EH library. The test failures were
caused by an issue with libc++, not the sanitizers (confirmed by building a
pre-r255559 revision with libc++/libc++abi and without sanitizers), so they
should never have been XFAILed under the sanitizers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255708 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WinEH] Make llvm.x86.seh.recoverfp work on x64
Reid Kleckner [Tue, 15 Dec 2015 23:40:58 +0000 (23:40 +0000)]
[WinEH] Make llvm.x86.seh.recoverfp work on x64

It adjusts from RSP-after-prologue to RBP, which is what SEH filters
need to do before they can use llvm.localrecover.

Fixes SEH filter captures, which were broken in r250088.

Issue reported by Alex Crichton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255707 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSuppress unused variable warning in the no-asserts build.
Evgeniy Stepanov [Tue, 15 Dec 2015 23:30:29 +0000 (23:30 +0000)]
Suppress unused variable warning in the no-asserts build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255706 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCast variable to void to resolve unused variable warning in non-asserts builds.
Richard Trieu [Tue, 15 Dec 2015 23:25:34 +0000 (23:25 +0000)]
Cast variable to void to resolve unused variable warning in non-asserts builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255704 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix "Not having LAHF/SAHF" assert.
Hans Wennborg [Tue, 15 Dec 2015 23:21:46 +0000 (23:21 +0000)]
Fix "Not having LAHF/SAHF" assert.

It wants to assert that the subtarget is 64-bit, not the register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255703 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/SI: Set the code object work group segment size when targeting HSA
Tom Stellard [Tue, 15 Dec 2015 23:15:25 +0000 (23:15 +0000)]
AMDGPU/SI: Set the code object work group segment size when targeting HSA

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15493

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255702 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objdump/MachODump] Shrink code a little bit. NFC.
Davide Italiano [Tue, 15 Dec 2015 23:14:21 +0000 (23:14 +0000)]
[llvm-objdump/MachODump] Shrink code a little bit. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255701 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] inline calls to fmaxf / llvm.maxnum.f32 using maxss (PR24475)
Sanjay Patel [Tue, 15 Dec 2015 23:11:43 +0000 (23:11 +0000)]
[x86] inline calls to fmaxf / llvm.maxnum.f32 using maxss (PR24475)

This patch improves on the suggested codegen from PR24475:
https://llvm.org/bugs/show_bug.cgi?id=24475

but only for the fmaxf() case to start, so we can sort out any bugs before
extending to fmin, f64, and vectors.

The fmax / maxnum definitions provide us flexibility for signed zeros, so the
only thing we have to worry about in this replacement sequence is NaN handling.

Note 1: It may be better to implement this as lowerFMAXNUM(), but that exposes
a problem: SelectionDAGBuilder::visitSelect() transforms compare/select
instructions into FMAXNUM nodes if we declare FMAXNUM legal or custom. Perhaps
that should be checking for NaN inputs or global unsafe-math before transforming?
As it stands, that bypasses a big set of optimizations that the x86 backend
already has in PerformSELECTCombine().

Note 2: The v2f32 test reveals another bug; the vector is extended to v4f32, so
we have completely unnecessary operations happening on undef elements of the
vector.

Differential Revision: http://reviews.llvm.org/D15294

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255700 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Sparc] Tweak r255668: Use llvm_unreachable.
James Y Knight [Tue, 15 Dec 2015 23:07:16 +0000 (23:07 +0000)]
[Sparc] Tweak r255668: Use llvm_unreachable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255698 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCross-DSO control flow integrity (LLVM part).
Evgeniy Stepanov [Tue, 15 Dec 2015 23:00:08 +0000 (23:00 +0000)]
Cross-DSO control flow integrity (LLVM part).

An LTO pass that generates a __cfi_check() function that validates a
call based on a hash of the call-site-known type and the target
pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255693 91177308-0d34-0410-b5e6-96231b3b80d8