6 years ago[TwoAddressInstructionPass] When looking for a 3 addr conversion after commuting...
Craig Topper [Tue, 6 Oct 2015 05:39:59 +0000 (05:39 +0000)]
[TwoAddressInstructionPass] When looking for a 3 addr conversion after commuting, make sure regB has been updated to take into account the commute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249378 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[bpf] Avoid extra pointer arithmetic for stack access
Alexei Starovoitov [Tue, 6 Oct 2015 04:00:53 +0000 (04:00 +0000)]
[bpf] Avoid extra pointer arithmetic for stack access

For the program like below
struct key_t {
  int pid;
  char name[16];
extern void test1(char *);
int test() {
  struct key_t key = {};
  return 0;
For key.name, the llc/bpf may generate the below code:
  R1 = R10  // R10 is the frame pointer
  R1 += -24 // framepointer adjustment
  R1 |= 4   // R1 is then used as the first parameter of test1
OR operation is not recognized by in-kernel verifier.

This patch introduces an intermediate FI_ri instruction and
generates the following code that can be properly verified:
  R1 = R10
  R1 += -20

Patch by Yonghong Song <yhs@plumgrid.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249371 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Teach constant hoisting that ANDs with 64-bit immediates in the range 0x8000000...
Craig Topper [Tue, 6 Oct 2015 02:50:24 +0000 (02:50 +0000)]
[X86] Teach constant hoisting that ANDs with 64-bit immediates in the range 0x80000000-0xffffffff can be handled cheaply and don't need to be hoisted.

Most importantly, this keeps constant hoisting from preventing instruction selections ability to turn an AND with 0xffffffff into a move into a 32-bit subregister.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249370 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary AddComplexity directive. The instruction is already wrapped...
Craig Topper [Tue, 6 Oct 2015 02:50:21 +0000 (02:50 +0000)]
[X86] Remove unnecessary AddComplexity directive. The instruction is already wrapped in the equivalent earlier. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249369 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Switch to a more traditional assembly syntax
Dan Gohman [Tue, 6 Oct 2015 00:27:55 +0000 (00:27 +0000)]
[WebAssembly] Switch to a more traditional assembly syntax

This new syntax is built around putting each instruction on its own line
in a "mnemonic op, op, op" like syntax. It also uses conventional data
section directives like ".byte" and so on rather than requiring everything
to be in hierarchical S-expression format. This is a more natural syntax
for a ".s" file format from the perspective of LLVM MC and related tools,
while remaining easy to translate into other forms as needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249364 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agodsymutil: Don't prune forward declarations inside of an imported TAG_module
Adrian Prantl [Mon, 5 Oct 2015 23:11:20 +0000 (23:11 +0000)]
dsymutil: Don't prune forward declarations inside of an imported TAG_module
if there exists not definition for the type.
For this to work, we need to clone the imported modules before building
the decl context chains of the DIEs in the non-skeleton CUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249362 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove helper classes into an anonymous namespace. NFC.
Benjamin Kramer [Mon, 5 Oct 2015 21:20:26 +0000 (21:20 +0000)]
Move helper classes into an anonymous namespace. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove AutoFDO profile handling for GCC's LIPO. NFC.
Diego Novillo [Mon, 5 Oct 2015 21:08:05 +0000 (21:08 +0000)]
Remove AutoFDO profile handling for GCC's LIPO. NFC.

Given the work we are doing on ThinLTO, we will never need to support
module groups and working sets in GCC's implementation of LIPO. These
are currently dead code, and will continue to be so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Update CATCHRET's operand to match its successor
David Majnemer [Mon, 5 Oct 2015 20:09:16 +0000 (20:09 +0000)]
[WinEH] Update CATCHRET's operand to match its successor

The CATCHRET operand did not match the MachineFunction's CFG.  This
mismatch happened because FrameLowering created a new MachineBasicBlock
and updated the CFG but forgot to update the CATCHRET operand.

Let's make sure this doesn't happen again by strengthing the funclet
membership analysis: it can now reason about the membership of all basic
blocks, not just those inside of funclets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249344 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify code. No functionality change.
Jakub Staszak [Mon, 5 Oct 2015 18:53:30 +0000 (18:53 +0000)]
Simplify code. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249335 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReleaseNotes: note the new Windows version requirement
Hans Wennborg [Mon, 5 Oct 2015 18:38:49 +0000 (18:38 +0000)]
ReleaseNotes: note the new Windows version requirement

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249332 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[msan] Correct a typo in poison stack pattern command line description.
Evgeniy Stepanov [Mon, 5 Oct 2015 18:01:17 +0000 (18:01 +0000)]
[msan] Correct a typo in poison stack pattern command line description.

Patch by Jon Eyolfson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Add a helper for creating aliases for the _e32 instructions
Tom Stellard [Mon, 5 Oct 2015 17:57:39 +0000 (17:57 +0000)]
AMDGPU/SI: Add a helper for creating aliases for the _e32 instructions

We are currently only using these aliases for VOPC instructions,
but this helper will make it easier to use them everywhere.

These aliases allow for the automatic matching of instructions
with forced 32-bit encoding.  Eventually, we should be able to remove
the custom C++ logic we have for this in the assembler.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13396

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249330 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMergeFunctions: Clear GlobalNumbers ValueMap
Arnold Schwaighofer [Mon, 5 Oct 2015 17:26:36 +0000 (17:26 +0000)]
MergeFunctions: Clear GlobalNumbers ValueMap

Otherwise, the map will observe changes as long as MergeFunctions is alive. This
is bad because follow-up passes could replace-all-uses-with on the key of an
entry in the map. The value handle callback of ValueMap however asserts that the
key type matches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
Scott Douglass [Mon, 5 Oct 2015 14:49:54 +0000 (14:49 +0000)]
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.

We were previously codegen'ing memcpy as regular load/store operations and
hoping that the register allocator would allocate registers in ascending order
so that we could apply an LDM/STM combine after register allocation. According
to the commit that first introduced this code (r37179), we planned to teach the
register allocator to allocate the registers in ascending order. This never got
implemented, and up to now we've been stuck with very poor codegen.

A much simpler approach for achieving better codegen is to create MEMCPY pseudo
instructions, attach scratch virtual registers to them and then, post register
allocation, expand the MEMCPYs into LDM/STM pairs using the scratch registers.
The register allocator will have picked arbitrary registers which we sort when
expanding the MEMCPY. This approach also avoids the need to repeatedly calculate
offsets which ultimately ought to be eliminated pre-RA in order to decrease
register pressure.

Fixes PR9199 and PR23768.

[This is based on Peter Collingbourne's r238473 which was reverted.]

Differential Revision: http://reviews.llvm.org/D13239

Change-Id: I727543c2e94136e0f80b8e22d5642d7b9ee5b458
Author: Peter Collingbourne <peter@pcc.me.uk>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249322 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake test resilient against windows path separators.
Benjamin Kramer [Mon, 5 Oct 2015 14:15:13 +0000 (14:15 +0000)]
Make test resilient against windows path separators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249320 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement JALRC16, JRCADDIUSP and JRC16 instructions
Zoran Jovanovic [Mon, 5 Oct 2015 14:00:09 +0000 (14:00 +0000)]
[mips][microMIPS] Implement JALRC16, JRCADDIUSP and JRC16 instructions
Differential Revision: http://reviews.llvm.org/D11219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249317 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for
Alexandros Lamprineas [Mon, 5 Oct 2015 13:42:31 +0000 (13:42 +0000)]
[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for
"msr pan, #imm", while only 1-bit immediate values should be valid.
Changed encoding and decoding for msr pstate instructions.

Differential Revision: http://reviews.llvm.org/D13011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249313 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Changed the way symbols are handled in dla and la instructions to allow simple...
Daniel Sanders [Mon, 5 Oct 2015 13:19:29 +0000 (13:19 +0000)]
[mips] Changed the way symbols are handled in dla and la instructions to allow simple expressions.

An instruction like "(d)la $5, symbol+8" previously would have crashed the
assembler as it contains an expression. This is now fixed.
A few tests cases have also been changed to reflect these changes, however
these should only be syntax changes. Some new test cases have also been

Patch by Scott Egerton.

Reviewers: vkalintiris, dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249311 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Add a version of fs::make_absolute with a custom CWD.
Benjamin Kramer [Mon, 5 Oct 2015 13:02:43 +0000 (13:02 +0000)]
[Support] Add a version of fs::make_absolute with a custom CWD.

This will be used soon from clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249309 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdded missing test for [ARM] AttributeParser. Check that build attribute
Alexandros Lamprineas [Mon, 5 Oct 2015 12:13:29 +0000 (12:13 +0000)]
Added missing test for [ARM] AttributeParser. Check that build attribute
Tag_Advanced_SIMD_arch is set correctly when targeting v8.1-a NEON.

Differential Revision: http://reviews.llvm.org/D13281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249304 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix pr24486.
Rafael Espindola [Mon, 5 Oct 2015 12:07:05 +0000 (12:07 +0000)]
Fix pr24486.

This extends the work done in r233995 so that now getFragment (in addition to
getSection) also works for variable symbols.

With that the existing logic to decide if a-b can be computed works even if
a or b are variables. Given that, the expression evaluation can avoid expanding
variables as aggressively and that in turn lets the relocation code see the
original variable.

In order for this to work with the asm streamer, there is now a dummy fragment
per section. It is used to assign a section to a symbol when no other fragment

This patch is a joint work by Maxim Ostapenko andy myself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249303 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReformat partially.
NAKAMURA Takumi [Mon, 5 Oct 2015 04:46:30 +0000 (04:46 +0000)]
Reformat partially.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249288 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReformat 3 files in llvm/include/llvm/CodeGen/.
NAKAMURA Takumi [Mon, 5 Oct 2015 04:44:18 +0000 (04:44 +0000)]
Reformat 3 files in llvm/include/llvm/CodeGen/.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249287 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTrailing whitespaces.
NAKAMURA Takumi [Mon, 5 Oct 2015 04:44:08 +0000 (04:44 +0000)]
Trailing whitespaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249286 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPrune trailing whitespaces in comment lines.
NAKAMURA Takumi [Mon, 5 Oct 2015 04:43:57 +0000 (04:43 +0000)]
Prune trailing whitespaces in comment lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249285 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReformat blank lines.
NAKAMURA Takumi [Mon, 5 Oct 2015 04:43:48 +0000 (04:43 +0000)]
Reformat blank lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249284 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAGBuilder] Remove dead code
David Majnemer [Sun, 4 Oct 2015 18:44:47 +0000 (18:44 +0000)]
[SelectionDAGBuilder] Remove dead code

We already check for LandingPadInst two lines above.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249280 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused private field introduced by r249270.
Teresa Johnson [Sun, 4 Oct 2015 15:00:55 +0000 (15:00 +0000)]
Remove unused private field introduced by r249270.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249277 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSupport for function summary index bitcode sections and files.
Teresa Johnson [Sun, 4 Oct 2015 14:33:43 +0000 (14:33 +0000)]
Support for function summary index bitcode sections and files.

The bitcode format is described in this document:
For more info on ThinLTO see:

The first customer is ThinLTO, however the data structures are designed
and named more generally based on prior feedback. There are a few
comments regarding how certain interfaces are used by ThinLTO, and the
options added here to gold currently have ThinLTO-specific names as the
behavior they provoke is currently ThinLTO-specific.

This patch includes support for generating per-module function indexes,
the combined index file via the gold plugin, and several tests
(more are included with the associated clang patch D11908).

Reviewers: dexonsmith, davidxl, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13107

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249270 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE4A] Added shuffle decode tests for 'special case' SSE4A EXTRQI/INSERTQI...
Simon Pilgrim [Sun, 4 Oct 2015 10:12:53 +0000 (10:12 +0000)]
[X86][SSE4A] Added shuffle decode tests for 'special case' SSE4A EXTRQI/INSERTQI ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249263 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SPARCv9] Add support for the rdpr/wrpr instructions.
Joerg Sonnenberger [Sun, 4 Oct 2015 09:11:22 +0000 (09:11 +0000)]
[SPARCv9] Add support for the rdpr/wrpr instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249262 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding and intrinsics for VPERMILPS/PD instructions.
Igor Breger [Sun, 4 Oct 2015 07:20:41 +0000 (07:20 +0000)]
AVX512: Implemented encoding and intrinsics for VPERMILPS/PD instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12690

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249261 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Permit branch folding in the face of funclets
David Majnemer [Sun, 4 Oct 2015 02:22:52 +0000 (02:22 +0000)]
[WinEH] Permit branch folding in the face of funclets

Track which basic blocks belong to which funclets.  Permit branch
folding to fire but only if it can prove that doing so will not cause
code in one funclet to be reused in another.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249257 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typo in README
Jeroen Ketema [Sun, 4 Oct 2015 00:46:16 +0000 (00:46 +0000)]
Fix typo in README

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249253 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Generalize FADD constant combines to work with vectors
Simon Pilgrim [Sat, 3 Oct 2015 22:06:06 +0000 (22:06 +0000)]
[DAGCombiner] Generalize FADD constant combines to work with vectors

Updated the FADD combines to work with vectors as well as scalars.

Differential Revision: http://reviews.llvm.org/D13416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249251 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd test cases that demonstrate bad behavior
Sanjay Patel [Sat, 3 Oct 2015 20:52:55 +0000 (20:52 +0000)]
add test cases that demonstrate bad behavior

These are based on PR25016 and likely caused by a bug in
MachineCombiner's definition of improvesCriticalPathLen().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249249 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoinclude equal sign in debug equations; NFC
Sanjay Patel [Sat, 3 Oct 2015 20:45:01 +0000 (20:45 +0000)]
include equal sign in debug equations; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249248 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-size] Attempt to fix a test failure on Windows.
Davide Italiano [Sat, 3 Oct 2015 20:20:28 +0000 (20:20 +0000)]
[llvm-size] Attempt to fix a test failure on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249247 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-size] Fix time to check if time of use bug.
Davide Italiano [Sat, 3 Oct 2015 19:44:06 +0000 (19:44 +0000)]
[llvm-size] Fix time to check if time of use bug.

This was the last tool relying on this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249244 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Lower SEXTLOAD using SIGN_EXTEND_VECTOR_INREG. NCI.
Simon Pilgrim [Sat, 3 Oct 2015 18:55:43 +0000 (18:55 +0000)]

The custom lowering in LowerExtendedLoad is doing the equivalent shuffle, so make use of existing lowering code to reduce duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249243 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unnecessary includes.
Rafael Espindola [Sat, 3 Oct 2015 18:38:50 +0000 (18:38 +0000)]
Remove unnecessary includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249242 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove registerSection out of line and reduce #includes. NFC.
Rafael Espindola [Sat, 3 Oct 2015 18:28:40 +0000 (18:28 +0000)]
Move registerSection out of line and reduce #includes. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249241 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add FADD combine tests.
Simon Pilgrim [Sat, 3 Oct 2015 18:17:43 +0000 (18:17 +0000)]
[X86][SSE] Add FADD combine tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249240 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Merge SIGN_EXTEND_INREG vector constant folding methods. NCI.
Simon Pilgrim [Sat, 3 Oct 2015 16:26:52 +0000 (16:26 +0000)]
[DAGCombiner] Merge SIGN_EXTEND_INREG vector constant folding methods. NCI.

visitSIGN_EXTEND_INREG calls SelectionDAG::getNode to constant fold scalar constants but handles vector constants itself, despite getNode being capable of dealing with them.

This required a minor change to the getNode implementation to actually deal with cases where the scalars of a BUILD_VECTOR were wider integers than the vector type - which was the only extra ability of the visitSIGN_EXTEND_INREG implementation.

No codegen intended and all existing tests remain the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249236 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] trying to fix at-exit hang
Kostya Serebryany [Sat, 3 Oct 2015 07:02:05 +0000 (07:02 +0000)]
[libFuzzer] trying to fix at-exit hang

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249231 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Implement the remaining conversion operations.
Dan Gohman [Sat, 3 Oct 2015 02:10:28 +0000 (02:10 +0000)]
[WebAssembly] Implement the remaining conversion operations.

This is a temporary assembly syntax that will likely evolve along with
broader upcoming syntax changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249225 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse early return. NFC.
Rafael Espindola [Sat, 3 Oct 2015 00:57:12 +0000 (00:57 +0000)]
Use early return. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249224 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to appease MSVC, NFCI.
Sanjoy Das [Sat, 3 Oct 2015 00:34:19 +0000 (00:34 +0000)]
Try to appease MSVC, NFCI.

This time by lifting the lambda's in `createNodeFromSelectLikePHI` to
the file scope.  Looks like there are differences in capture rules
between clang and MSVC?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249222 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Remove unused tablegen multiclass
Tom Stellard [Sat, 3 Oct 2015 00:29:50 +0000 (00:29 +0000)]
AMDGPU/SI: Remove unused tablegen multiclass

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13395

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249221 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisallow assigning symbol a null section.
Rafael Espindola [Sat, 3 Oct 2015 00:18:14 +0000 (00:18 +0000)]
Disallow assigning symbol a null section.

They are constructed without one and they can't go back, so this was
effectively dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249220 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to appease the MSVC bots, NFCI.
Sanjoy Das [Sat, 3 Oct 2015 00:03:15 +0000 (00:03 +0000)]
Try to appease the MSVC bots, NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249219 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Rename setlocal to set_local to match the spec.
Dan Gohman [Sat, 3 Oct 2015 00:01:53 +0000 (00:01 +0000)]
[WebAssembly] Rename setlocal to set_local to match the spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249218 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Update this test for the new loop scheme.
Dan Gohman [Fri, 2 Oct 2015 23:54:03 +0000 (23:54 +0000)]
[WebAssembly] Update this test for the new loop scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249217 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to appease the MSVC bots, NFC.
Sanjoy Das [Fri, 2 Oct 2015 23:43:32 +0000 (23:43 +0000)]
Try to appease the MSVC bots, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249216 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] make LLVMFuzzerTestOneInput (the fuzzer target function) return int inste...
Kostya Serebryany [Fri, 2 Oct 2015 23:34:06 +0000 (23:34 +0000)]
[libFuzzer] make LLVMFuzzerTestOneInput (the fuzzer target function) return int instead of void. The actual return value is not *yet* used (and expected to be 0). This change is API breaking, so the fuzzers will need to be updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249214 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix comment ASCII art to unbreak the gcc 4.9.1 build
Sanjoy Das [Fri, 2 Oct 2015 23:24:52 +0000 (23:24 +0000)]
Fix comment ASCII art to unbreak the gcc 4.9.1 build

The trailing backslashes in some ASCII art added in r248527 cause a
"error: multi-line comment [-Werror=comment]" when building with gcc
4.9.1 -Wall.  Swallow (ASCII-)artistic integrity and use pipes instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249212 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Recognize simple br-phi patterns
Sanjoy Das [Fri, 2 Oct 2015 23:09:44 +0000 (23:09 +0000)]
[SCEV] Recognize simple br-phi patterns

Teach SCEV to match patterns like

  br %cond, label %left, label %right
  br label %merge
  br label %merge
  V = phi [ %x, %left ], [ %y, %right ]

as "select %cond, %x, %y".  Before this SCEV would match PHI nodes
exclusively to add recurrences.

This addresses PR25005.

Reviewers: joker.eph, joker-eph, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13378

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249211 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] We need to explicitly add llvm-config before clang so that LLVM_BUILD_EXTERNA...
Chris Bieneman [Fri, 2 Oct 2015 22:28:48 +0000 (22:28 +0000)]
[CMake] We need to explicitly add llvm-config before clang so that LLVM_BUILD_EXTERNAL_COMPILER_RT can depend on llvm-config.

This patch is a required stepping stone to fix PR14109.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249202 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoinariant.group handling in GVN
Piotr Padlewski [Fri, 2 Oct 2015 22:12:22 +0000 (22:12 +0000)]
inariant.group handling in GVN

The most important part required to make clang
devirtualization works ( ͡°͜ʖ ͡°).
The code is able to find non local dependencies, but unfortunatelly
because the caller can only handle local dependencies, I had to add
some restrictions to look for dependencies only in the same BB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249196 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] remove experimental flag and functionality
Kostya Serebryany [Fri, 2 Oct 2015 22:00:32 +0000 (22:00 +0000)]
[libFuzzer] remove experimental flag and functionality

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249194 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Fix CFG stackification of nested loops.
Dan Gohman [Fri, 2 Oct 2015 21:11:36 +0000 (21:11 +0000)]
[WebAssembly] Fix CFG stackification of nested loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249187 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Support calls marked as "tail", fastcc, and coldcc.
Dan Gohman [Fri, 2 Oct 2015 20:54:23 +0000 (20:54 +0000)]
[WebAssembly] Support calls marked as "tail", fastcc, and coldcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249184 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCall the correct overload.
Richard Trieu [Fri, 2 Oct 2015 20:52:14 +0000 (20:52 +0000)]
Call the correct overload.

Call the correct overload so a string literal does not get converted to a bool.
Also fix the test case to match the names given.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249183 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] add a flag -max_total_time
Kostya Serebryany [Fri, 2 Oct 2015 20:47:55 +0000 (20:47 +0000)]
[libFuzzer] add a flag -max_total_time

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249181 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Add a resize_memory intrinsic.
Dan Gohman [Fri, 2 Oct 2015 20:10:26 +0000 (20:10 +0000)]
[WebAssembly] Add a resize_memory intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249178 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Refactor out a createNodeForSelect
Sanjoy Das [Fri, 2 Oct 2015 19:39:59 +0000 (19:39 +0000)]
[SCEV] Refactor out a createNodeForSelect

We will shortly re-use this for select-like br-phi pairs.

Reviewers: atrick, joker-eph, joker.eph

Subscribers: sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D13377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249177 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Tests] Add one more case to LoopUnroll/pr18861.ll for better coverage.
Michael Zolotukhin [Fri, 2 Oct 2015 19:21:52 +0000 (19:21 +0000)]
[Tests] Add one more case to LoopUnroll/pr18861.ll for better coverage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249174 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Tests] Give meaningful names to blocks in LoopUnroll/pr18861.ll, add a description...
Michael Zolotukhin [Fri, 2 Oct 2015 19:21:49 +0000 (19:21 +0000)]
[Tests] Give meaningful names to blocks in LoopUnroll/pr18861.ll, add a description of what's going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249173 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Tests] Slightly reduce test LoopUnroll/pr18861.ll.
Michael Zolotukhin [Fri, 2 Oct 2015 19:21:43 +0000 (19:21 +0000)]
[Tests] Slightly reduce test LoopUnroll/pr18861.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249172 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Add a memory_size intrinsic.
Dan Gohman [Fri, 2 Oct 2015 19:21:15 +0000 (19:21 +0000)]
[WebAssembly] Add a memory_size intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249171 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Add verifier check for exec reads
Matt Arsenault [Fri, 2 Oct 2015 18:58:37 +0000 (18:58 +0000)]
AMDGPU/SI: Add verifier check for exec reads

Make sure we aren't accidentally not setting
these in the instruction definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249170 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd way to test for generic TargetOpcodes
Matt Arsenault [Fri, 2 Oct 2015 18:58:33 +0000 (18:58 +0000)]
Add way to test for generic TargetOpcodes

The alternative would be to add a bit to the target's
InstrFlags but that seems like a waste of a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249169 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Try to prove predicates by splitting them
Sanjoy Das [Fri, 2 Oct 2015 18:50:30 +0000 (18:50 +0000)]
[SCEV] Try to prove predicates by splitting them

This change teaches SCEV that to prove `A u< B` it is sufficient to
prove each of these facts individually:

 - B >= 0
 - A s< B
 - A >= 0

In practice, SCEV sometimes finds it easier to prove these facts
individually than to prove `A u< B` as one atomic step.

Reviewers: reames, atrick, nlewycky, hfinkel

Subscribers: sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D13042

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249168 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoActually switch the arch when we see .arch. PR21695
Roman Divacky [Fri, 2 Oct 2015 18:25:25 +0000 (18:25 +0000)]
Actually switch the arch when we see .arch. PR21695

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249165 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: diagnose invalid local fixups on Thumb1
Tim Northover [Fri, 2 Oct 2015 18:07:18 +0000 (18:07 +0000)]
ARM: diagnose invalid local fixups on Thumb1

We previously stopped producing Thumb2 relaxations when they weren't supported,
but only diagnosed the case where an actual relocation was produced. We should
also tell people if local symbols aren't going to work rather than silently

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249164 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: correctly align constant pool value on Thumb1 targets.
Tim Northover [Fri, 2 Oct 2015 18:07:13 +0000 (18:07 +0000)]
ARM: correctly align constant pool value on Thumb1 targets.

Since we're using tLDRpci to access it, the constant pool's address must be 0
(mod 4).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249163 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[lit] Raise the default soft process limit when possible
Hal Finkel [Fri, 2 Oct 2015 17:50:28 +0000 (17:50 +0000)]
[lit] Raise the default soft process limit when possible

It is common to have a default soft process limit, at least on some families of
Linux distributions, of 1024. This is normally more than enough, but if you
have many cores, and you're running tests that create many threads, this can
become a problem. My POWER7 development machine has 48 cores, and when running
the lld regression tests, which often want to create up to 48 threads, I run
into problems. lit, by default, will want to run 48 tests in parallel, and
48*48 < 1024, and so many tests fail like this:

terminate called after throwing an instance of 'std::system_error'

what():  Resource temporarily unavailable
or lit fails like this when launching a test:

OSError: [Errno 11] Resource temporarily unavailable

lit can easily detect this situation and attempt to repair it before launching
tests (by raising the soft process limit to something that will allow ncpus^2
threads to be created), and should do so to prevent spurious test failures.

This is the follow-up to this thread:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249161 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Typo. NFC.
Chad Rosier [Fri, 2 Oct 2015 16:42:59 +0000 (16:42 +0000)]
[ARM] Typo. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249153 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply r249121 : "[FastISel][x86] Teach how to select SSE2/AVX bitcasts between...
Andrea Di Biagio [Fri, 2 Oct 2015 16:08:05 +0000 (16:08 +0000)]
Reapply r249121 : "[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types."

This patch teaches FastIsel the following two things:
1) On SSE2, no instructions are needed for bitcasts between 128-bit vector types;
2) On AVX, no instructions are needed for bitcasts between 256-bit vector types.


  %1 = bitcast <4 x i31> %V to <2 x i64>

Before (-fast-isel -fast-isel-abort=1):

  FastIsel miss: %1 = bitcast <4 x i31> %V to <2 x i64>

Now we don't fall back to SelectionDAG and we correctly fold that computation
propagating the register associated to %V.

Originally reviewed here: http://reviews.llvm.org/D13347

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249147 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert: [FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit...
Andrea Di Biagio [Fri, 2 Oct 2015 13:06:19 +0000 (13:06 +0000)]
Revert: [FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types.

r249121 caused a Clang test failure (avx2-buitins.c).
Revert r249121 while I keep investigating on the reason why that test failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249124 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend
Zoran Jovanovic [Fri, 2 Oct 2015 13:06:02 +0000 (13:06 +0000)]
[mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend
Differential Revision: http://reviews.llvm.org/D13235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249123 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector...
Andrea Di Biagio [Fri, 2 Oct 2015 12:45:37 +0000 (12:45 +0000)]
[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types.

This patch teaches FastIsel the following two things:
1) On SSE2, no instructions are needed for bitcasts between 128-bit vector types;
2) On AVX, no instructions are needed for bitcasts between 256-bit vector types.


  %1 = bitcast <4 x i31> %V to <2 x i64>

Before (-fast-isel -fast-isel-abort=1):

  FastIsel miss: %1 = bitcast <4 x i31> %V to <2 x i64>

Now we don't fall back to SelectionDAG and we correctly fold that computation
propagating the register associated to %V.

Differential Revision: http://reviews.llvm.org/D13347

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249121 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDenseMap: we're trying to call the reserved global placement allocation
Richard Smith [Fri, 2 Oct 2015 00:46:33 +0000 (00:46 +0000)]
DenseMap: we're trying to call the reserved global placement allocation
function here; use "::new" to avoid accidentally picking up a class-specific
operator new.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249112 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodsymutil: Also ignore the ByteSize when building the DeclContext cache for
Adrian Prantl [Fri, 2 Oct 2015 00:27:08 +0000 (00:27 +0000)]
dsymutil: Also ignore the ByteSize when building the DeclContext cache for
clang modules.

Forward decls of ObjC interfaces don't have a bytesize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249110 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LibFuzzer] test_single_input option to run a single test case.
Ivan Krasin [Thu, 1 Oct 2015 23:23:06 +0000 (23:23 +0000)]
[LibFuzzer] test_single_input option to run a single test case.

-test_single_input flag specifies a file name with test data.

Review URL: http://reviews.llvm.org/D13359

Patch by Mike Aizatsky!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249096 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SimplifyLibCalls] Fix instruction misplacement in string/memory libcall optimization
Bruno Cardoso Lopes [Thu, 1 Oct 2015 22:43:53 +0000 (22:43 +0000)]
[SimplifyLibCalls] Fix instruction misplacement in string/memory libcall optimization

When trying to optimize fortified library functions use the right
location to insert new instructions in order to preserve correct
def-use order.

This fixes an issue where a misplaced instruction definition would
happen to be *after* one of its use after a RAUW, forming invalid IR.
This behavior was introduced by r227250.

Differential Revision: http://reviews.llvm.org/D13301


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249092 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix unused variable warning in release build
Matt Arsenault [Thu, 1 Oct 2015 22:40:35 +0000 (22:40 +0000)]
AMDGPU: Fix unused variable warning in release build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249091 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] XFAILing test while diagnosing backend error.
Colin LeMahieu [Thu, 1 Oct 2015 22:14:05 +0000 (22:14 +0000)]
[Hexagon] XFAILing test while diagnosing backend error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249088 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass
Matt Arsenault [Thu, 1 Oct 2015 22:10:03 +0000 (22:10 +0000)]
AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass

Replace LiveInterval usage with LiveVariables. LiveIntervals
computes far more information than is needed for this pass
which just needs to find if an SGPR is live out of the
defining block.

LiveIntervals are not usually available that early, requiring
computing them twice which is very expensive. The extra run of
LiveIntervals/LiveVariables/SlotIndexes was costing in total
about 5% of compile time.

Continuing to use LiveIntervals is problematic. It seems
there is an option (early-live-intervals) to run the analysis
about where it should go to avoid recomputing LiveVariables,
but it seems to be completely broken with subreg liveness
enabled. There are also problems from trying to recompute
LiveIntervals since this seems to undo LiveVariables
and clearing kill flags, causing TwoAddressInstructions
to make bad decisions.

Insert the pass right after live variables and preserve it.
The tricky case to worry about might be phis since
LiveVariables doesn't count a register as live out if
in the successor block it is only used in a phi,
but I don't think this is a concern right now
because SIFixSGPRCopies replaces SGPR phis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249087 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix relocation used for GOT references in non-PIC mode. Fix relocations
Joerg Sonnenberger [Thu, 1 Oct 2015 22:08:20 +0000 (22:08 +0000)]
Fix relocation used for GOT references in non-PIC mode. Fix relocations
for "set" pseudo op in PIC mode.

Differential Revision: http://reviews.llvm.org/D13173

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249086 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PATCH] D13360: [llvm-objdump] Teach -d about AArch64 mapping symbols
Davide Italiano [Thu, 1 Oct 2015 21:57:09 +0000 (21:57 +0000)]
[PATCH] D13360: [llvm-objdump] Teach -d about AArch64 mapping symbols

AArch64 uses $d* and $x* to interleave between text and data.
llvm-objdump didn't know about this so it ended up printing garbage.
This patch is a first step towards a solution of the problem.

Differential Revision:  http://reviews.llvm.org/D13360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249083 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Merge if and switch
Matt Arsenault [Thu, 1 Oct 2015 21:51:59 +0000 (21:51 +0000)]
AMDGPU: Merge if and switch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249082 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Remove dead code
Matt Arsenault [Thu, 1 Oct 2015 21:51:57 +0000 (21:51 +0000)]
AMDGPU: Remove dead code

There's no point in checking VReg_1 because all uses
of it should already have been removed by SILowerI1Copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249081 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Make SIInsertWaits about a factor of 4 faster
Matt Arsenault [Thu, 1 Oct 2015 21:43:15 +0000 (21:43 +0000)]
AMDGPU: Make SIInsertWaits about a factor of 4 faster

This was the slowest target custom pass and was spending 80%
of the time in getMinimalPhysRegClass which was called
for every register operand.

Try to use the statically known register class when possible from
the instruction's MCOperandInfo. There are a few pseudo instructions
which are not well behaved with unknown register classes which still
require the expensive physical register class search.

There are a few other possibilities for making this even faster,
such as not inspecting implicit operands. For now those are checked
because it is technically possible to have a scalar load into
exec or vcc which can be implicitly used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249079 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Emit __C_specific_handler tables for the new IR
Reid Kleckner [Thu, 1 Oct 2015 21:38:24 +0000 (21:38 +0000)]
[WinEH] Emit __C_specific_handler tables for the new IR

We emit denormalized tables, where every range of invokes in the same
state gets a complete list of EH action entries. This is significantly
simpler than trying to infer the correct nested scoping structure from
the MI. Fortunately, for SEH, the nesting structure is really just a
size optimization.

With this, some basic __try / __except examples work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249078 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] XFAILing test while diagnosing backend error.
Colin LeMahieu [Thu, 1 Oct 2015 21:19:03 +0000 (21:19 +0000)]
[Hexagon] XFAILing test while diagnosing backend error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249075 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass
Tom Stellard [Thu, 1 Oct 2015 21:16:05 +0000 (21:16 +0000)]
AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass

Instead of asserting when the kernel metadata is different than we expect,
we should just skip lowering that function.  This fixes assertion
failures with OpenCL argument metadata from older LLVM releases.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13356

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249073 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Stop BranchFolding from merging across funclets
David Majnemer [Thu, 1 Oct 2015 21:04:13 +0000 (21:04 +0000)]
[WinEH] Stop BranchFolding from merging across funclets

BranchFolding would merge two funclets together, this is not OK.
Disable this and strengthen the assertion in FuncletLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249069 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoKill another reference to in-source builds
Jonathan Roelofs [Thu, 1 Oct 2015 20:53:59 +0000 (20:53 +0000)]
Kill another reference to in-source builds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249067 91177308-0d34-0410-b5e6-96231b3b80d8