oota-llvm.git
9 years agoCheck the alwaysinline attribute on the call as well as on the caller.
Peter Collingbourne [Mon, 19 May 2014 18:25:54 +0000 (18:25 +0000)]
Check the alwaysinline attribute on the call as well as on the caller.

Differential Revision: http://reviews.llvm.org/D3815

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209150 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse range for
Matt Arsenault [Mon, 19 May 2014 17:52:48 +0000 (17:52 +0000)]
Use range for

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209147 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoreverting r209132
Jyotsna Verma [Mon, 19 May 2014 16:22:11 +0000 (16:22 +0000)]
reverting r209132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209139 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMemoryBuffer: Use GetNativeSystemInfo()
Alp Toker [Mon, 19 May 2014 16:13:28 +0000 (16:13 +0000)]
MemoryBuffer: Use GetNativeSystemInfo()

Removes old 4096 byte workaround. This functionality has been available since
Windows XP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209137 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Patch for function cloning to inline all blocks whose address is taken"
Eric Christopher [Mon, 19 May 2014 16:04:10 +0000 (16:04 +0000)]
Revert "Patch for function cloning to inline all blocks whose address is taken"
as it was causing build failures in ruby.

This reverts commit r207713.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209135 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM64] Split tbz/tbnz into W/X register variant
Bradley Smith [Mon, 19 May 2014 15:58:15 +0000 (15:58 +0000)]
[ARM64] Split tbz/tbnz into W/X register variant

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209134 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHexagon: Add encoding bits to the mpy instructions.
Jyotsna Verma [Mon, 19 May 2014 15:32:07 +0000 (15:32 +0000)]
Hexagon: Add encoding bits to the mpy instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209132 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Sorted *_ENC, *_DESC classes and tests
Zoran Jovanovic [Mon, 19 May 2014 14:57:46 +0000 (14:57 +0000)]
[mips][mips64r6] Sorted *_ENC, *_DESC classes and tests

Differential Revision: http://reviews.llvm.org/D3808

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209129 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoResolving MSVC warnings about switch statements with a default label, but no case...
Aaron Ballman [Mon, 19 May 2014 14:29:04 +0000 (14:29 +0000)]
Resolving MSVC warnings about switch statements with a default label, but no case labels. No functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209126 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFlip on vectorization of bswap intrinsics.
Benjamin Kramer [Mon, 19 May 2014 13:48:08 +0000 (13:48 +0000)]
Flip on vectorization of bswap intrinsics.

The cost model conservatively assumes that it will always get scalarized and
that's about as good as we can get with the generic TTI; reasoning whether a
shuffle with an efficient lowering is available is hard. We can override that
conservative estimate for some targets in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209125 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap...
Benjamin Kramer [Mon, 19 May 2014 13:12:38 +0000 (13:12 +0000)]
SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap not.

- On ARM/ARM64 we get a vrev because the shuffle matching code is really smart. We still unroll anything that's not v4i32 though.
- On X86 we get a pshufb with SSSE3. Required more cleverness in isShuffleMaskLegal.
- On PPC we get a vperm for v8i16 and v4i32. v2i64 is unrolled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209123 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdded inst-combine for 'MIN(MIN(A, 97), 23)' and 'MAX(MAX(A, 23), 97)'
Dinesh Dwivedi [Mon, 19 May 2014 07:08:32 +0000 (07:08 +0000)]
Added inst-combine for 'MIN(MIN(A, 97), 23)' and 'MAX(MAX(A, 23), 97)'

This removes TODO added in r208849 [http://reviews.llvm.org/D3629]

MIN(MIN(A, 97), 23) -> MIN(A, 23)
MAX(MAX(A, 23), 97) -> MAX(A, 97)

Differential Revision: http://reviews.llvm.org/D3785

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209110 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChange the blend tests to AVX, not AVX2.
Filipe Cabecinhas [Mon, 19 May 2014 04:47:12 +0000 (04:47 +0000)]
Change the blend tests to AVX, not AVX2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209107 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReformat blank lines.
NAKAMURA Takumi [Mon, 19 May 2014 04:43:26 +0000 (04:43 +0000)]
Reformat blank lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209106 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWhitespace.
NAKAMURA Takumi [Mon, 19 May 2014 04:43:03 +0000 (04:43 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209105 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove last uses of OwningPtr from llvm. As far as I can tell these method versions...
Craig Topper [Sun, 18 May 2014 21:55:38 +0000 (21:55 +0000)]
Remove last uses of OwningPtr from llvm. As far as I can tell these method versions are not used by lldb, lld, or clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209103 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse std::unique_ptr instead of OwningPtr in the MemoryBuffer unittests.
Craig Topper [Sun, 18 May 2014 21:01:46 +0000 (21:01 +0000)]
Use std::unique_ptr instead of OwningPtr in the MemoryBuffer unittests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209102 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: make libcall setup more table driven
Saleem Abdulrasool [Sun, 18 May 2014 16:39:11 +0000 (16:39 +0000)]
ARM: make libcall setup more table driven

Rather than create a series of function calls to setup the library calls, create
a table with the information and just use the table to drive the configuration
of the library calls.  This makes it easier to both inspect the list as well as
to modify it.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209089 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoOptions: Use erase_if to remove Args from the list.
Benjamin Kramer [Sun, 18 May 2014 15:14:13 +0000 (15:14 +0000)]
Options: Use erase_if to remove Args from the list.

While there make getOption return a const reference so we don't have to put it
on the stack when calling methods on it. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209088 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: improve WoA ABI conformance for frame register
Saleem Abdulrasool [Sun, 18 May 2014 04:12:52 +0000 (04:12 +0000)]
ARM: improve WoA ABI conformance for frame register

Windows on ARM uses R11 for the frame pointer even though the environment is a
pure Thumb-2, thumb-only environment.  Replicate this behaviour to improve
Windows ABI compatibility.  This register is used for fast stack walking, and
thus is part of the Windows ABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209085 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: consolidate frame pointer register knowledge
Saleem Abdulrasool [Sun, 18 May 2014 03:18:09 +0000 (03:18 +0000)]
ARM: consolidate frame pointer register knowledge

Use the ARMBaseRegisterInfo to query the frame register.  The base register info
is aware of the frame register that is used for the frame pointer.  Use that to
determine the frame register rather than duplicating the knowledge.  Although,
the code path is slightly different in that it may return SP, that can only
occur if the frame pointer has been omitted in the machine function, which is
supposed to contain the desired value in that case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209084 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTarget: remove old constructors for CallLoweringInfo
Saleem Abdulrasool [Sat, 17 May 2014 21:50:17 +0000 (21:50 +0000)]
Target: remove old constructors for CallLoweringInfo

This is mostly a mechanical change changing all the call sites to the newer
chained-function construction pattern.  This removes the horrible 15-parameter
constructor for the CallLoweringInfo in favour of setting properties of the call
via chained functions.  No functional change beyond the removal of the old
constructors are intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209082 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTarget: add support to build CallLoweringInfo
Saleem Abdulrasool [Sat, 17 May 2014 21:50:06 +0000 (21:50 +0000)]
Target: add support to build CallLoweringInfo

Rather than introducing an auxiliary CallLoweringInfoBuilder, add the methods to
do chained function construction directly to CallLoweringInfo.  This reduces the
monstrous 15-parameter constructor into a series of simpler (for some definition
of simpler) functions that control particular aspects of the call.  The old
interfaces can be completely removed once callers are moved to the new chained
constructor pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209081 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTarget: change member from reference to pointer
Saleem Abdulrasool [Sat, 17 May 2014 21:50:01 +0000 (21:50 +0000)]
Target: change member from reference to pointer

This is a preliminary step to help ease the construction of CallLoweringInfo.
Changing the construction to a chained function pattern requires that the
parameter be nullable.  However, rather than copying the vector, save a pointer
rather than the reference to permit a late binding of the arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209080 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: whitespace
Saleem Abdulrasool [Sat, 17 May 2014 21:49:54 +0000 (21:49 +0000)]
ARM: whitespace

Remove some whitespace.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209079 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse create methods since msvc doesn't handle delegating constructors.
Rafael Espindola [Sat, 17 May 2014 21:29:57 +0000 (21:29 +0000)]
Use create methods since msvc doesn't handle delegating constructors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209076 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHandle ConstantAggregateZero when upgrading global_ctors.
Rafael Espindola [Sat, 17 May 2014 21:00:22 +0000 (21:00 +0000)]
Handle ConstantAggregateZero when upgrading global_ctors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209075 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReduce abuse of default values in the GlobalAlias constructor.
Rafael Espindola [Sat, 17 May 2014 19:57:46 +0000 (19:57 +0000)]
Reduce abuse of default values in the GlobalAlias constructor.

This is in preparation for adding an optional offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209073 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r209049 and r209065, "Add support for combining GEPs across PHI nodes"
NAKAMURA Takumi [Sat, 17 May 2014 14:39:21 +0000 (14:39 +0000)]
Revert r209049 and r209065, "Add support for combining GEPs across PHI nodes"

It broke clang selfhosting even after r209065.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209067 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachO: Add comments describing section flags/attrs
David Majnemer [Sat, 17 May 2014 07:36:36 +0000 (07:36 +0000)]
MachO: Add comments describing section flags/attrs

When pruning superfluous MachO structure definitions, I chose to keep
the most generically useful which is why Support's definitions won over
the ones in MC.

However, the MC copy had some useful comments describing some of the
field values.

Bring these back to the copy in Support.  While doing this, fill in some
of the underdocumented definitions as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209066 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix for sanitizer crash introduced in r209049
Louis Gerbarg [Sat, 17 May 2014 06:51:36 +0000 (06:51 +0000)]
Fix for sanitizer crash introduced in r209049

This patch fixes 3 issues introduced by r209049 that only showed up in on
the sanitizer buildbots. One was a typo in a compare. The other is a check to
confirm that the single differing value in the two incoming GEPs is the same
type. The final issue was the the IRBuilder under some circumstances would
build PHIs in the middle of the block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209065 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTarget: Replace getSection().empty() with hasSection()
David Majnemer [Sat, 17 May 2014 05:18:40 +0000 (05:18 +0000)]
Target: Replace getSection().empty() with hasSection()

No functional change, just a small cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209064 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotest: fix copy-paste mistake
Saleem Abdulrasool [Sat, 17 May 2014 04:32:38 +0000 (04:32 +0000)]
test: fix copy-paste mistake

Accidental over-quoting of the match string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209058 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: use the proper target object format for WoA
Saleem Abdulrasool [Sat, 17 May 2014 04:28:08 +0000 (04:28 +0000)]
ARM: use the proper target object format for WoA

WoA uses COFF, not ELF.  ARMISelLowering::createTLOF would previously return ELF
for any non-MachO platform.  This was a missed site when the original change for
target format support for Windows on ARM was done.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209057 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Fix a bad predicate I spotted by inspection -- pshufhw and pshuflw
Chandler Carruth [Sat, 17 May 2014 03:29:20 +0000 (03:29 +0000)]
[x86] Fix a bad predicate I spotted by inspection -- pshufhw and pshuflw
were added in SSE2, no SSSE3. Found this while auditing all uses of
SSSE3 in the X86 target. I don't actually expect this to make
a significant difference on anything and I don't have any detailed test
cases but I updated the existing test cases that already covered some of
this code path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209056 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[DWARF parser] Teach DIContext to fetch short (non-linkage) function names for a...
Alexey Samsonov [Sat, 17 May 2014 00:07:48 +0000 (00:07 +0000)]
[DWARF parser] Teach DIContext to fetch short (non-linkage) function names for a given address.

Change --functions option in llvm-symbolizer tool to accept
values "none", "short" or "linkage". Update the tests and docs
accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209050 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd support for combining GEPs across PHI nodes
Louis Gerbarg [Fri, 16 May 2014 23:47:24 +0000 (23:47 +0000)]
Add support for combining GEPs across PHI nodes

Currently LLVM will generally merge GEPs. This allows backends to use more
complex addressing modes. In some cases this is not happening because there
is PHI inbetween the two GEPs:

  GEP1--\
        |-->PHI1-->GEP3
  GEP2--/

This patch checks to see if GEP1 and GEP2 are similiar enough that they can be
cloned (GEP12) in GEP3's BB, allowing GEP->GEP merging (GEP123):

  GEP1--\                     --\                           --\
        |-->PHI1-->GEP3  ==>    |-->PHI2->GEP12->GEP3 == >    |-->PHI2->GEP123
  GEP2--/                     --/                           --/

This also breaks certain use chains that are preventing GEP->GEP merges that the
the existing instcombine would merge otherwise.

Tests included.

rdar://15547484

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209049 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse a sized enum for MachineOperandType. No functionality change
Pete Cooper [Fri, 16 May 2014 23:28:17 +0000 (23:28 +0000)]
Use a sized enum for MachineOperandType.  No functionality change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209048 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdded tests for the cost of lowering VSELECT instructions.
Filipe Cabecinhas [Fri, 16 May 2014 22:47:58 +0000 (22:47 +0000)]
Added tests for the cost of lowering VSELECT instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209045 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoImplemented special cases for PerformVSELECTCombine.
Filipe Cabecinhas [Fri, 16 May 2014 22:47:54 +0000 (22:47 +0000)]
Implemented special cases for PerformVSELECTCombine.

vselects with constant masks, after legalization, will get turned into
specialized shuffle_vectors so they can be matched to blend+imm
instructions.

Fixed some tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209044 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLower vselects into X86ISD::BLENDI when appropriate.
Filipe Cabecinhas [Fri, 16 May 2014 22:47:49 +0000 (22:47 +0000)]
Lower vselects into X86ISD::BLENDI when appropriate.

LowerVSELECT will, if possible, generate a X86ISD::BLENDI DAG node if the
condition is constant and we can emit that instruction, given the
subtarget.

This is not enough for all cases. An additional SELECTCombine optimization
will be committed.

Fixed tests that were expecting variable blends but where a blend+imm can
be generated.
Added test where we can't emit blend+immediate.
Added avx2 blend+imm tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209043 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoImplemented LowerVSELECT to custom lower some instructions.
Filipe Cabecinhas [Fri, 16 May 2014 22:47:43 +0000 (22:47 +0000)]
Implemented LowerVSELECT to custom lower some instructions.

No functionality change intended. The types that previously were set to
lower as Expand or Legal are doing the same thing with this lowering
function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209042 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDelete getAliasedGlobal.
Rafael Espindola [Fri, 16 May 2014 22:37:03 +0000 (22:37 +0000)]
Delete getAliasedGlobal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209040 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Assert rather than conditionalizing when a CU's subprogram list contains...
David Blaikie [Fri, 16 May 2014 22:21:45 +0000 (22:21 +0000)]
DebugInfo: Assert rather than conditionalizing when a CU's subprogram list contains declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209039 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Handle emitting constants of C++ unicode character type.
David Blaikie [Fri, 16 May 2014 21:53:09 +0000 (21:53 +0000)]
DebugInfo: Handle emitting constants of C++ unicode character type.

Patch by Stephan Tolksdorf! (with some test case stuff by me)

Differential Revision: http://reviews.llvm.org/D3810

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209037 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Refactor the VOP3_32 tablegen class
Tom Stellard [Fri, 16 May 2014 20:56:47 +0000 (20:56 +0000)]
R600/SI: Refactor the VOP3_32 tablegen class

This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209028 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Add a PredicateControl class for managing TableGen predicates
Tom Stellard [Fri, 16 May 2014 20:56:45 +0000 (20:56 +0000)]
R600/SI: Add a PredicateControl class for managing TableGen predicates

This was inspired by the PredicateControl class in the MIPS backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209027 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Move tablegen patterns away from instruction defs
Tom Stellard [Fri, 16 May 2014 20:56:44 +0000 (20:56 +0000)]
R600/SI: Move tablegen patterns away from instruction defs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209026 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove unused instruction
Tom Stellard [Fri, 16 May 2014 20:56:43 +0000 (20:56 +0000)]
R600/SI: Remove unused instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209025 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Promote f32 SELECT to i32
Tom Stellard [Fri, 16 May 2014 20:56:41 +0000 (20:56 +0000)]
R600/SI: Promote f32 SELECT to i32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209024 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove duplicate pattern
Tom Stellard [Fri, 16 May 2014 20:56:37 +0000 (20:56 +0000)]
R600/SI: Remove duplicate pattern

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209023 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd comdat key field to llvm.global_ctors and llvm.global_dtors
Reid Kleckner [Fri, 16 May 2014 20:39:27 +0000 (20:39 +0000)]
Add comdat key field to llvm.global_ctors and llvm.global_dtors

This allows us to put dynamic initializers for weak data into the same
comdat group as the data being initialized.  This is necessary for MSVC
ABI compatibility.  Once we have comdats for guard variables, we can use
the combination to help GlobalOpt fire more often for weak data with
guarded initialization on other platforms.

Reviewers: nlewycky

Differential Revision: http://reviews.llvm.org/D3499

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209015 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a warning in builds without asserts.
Rafael Espindola [Fri, 16 May 2014 20:05:08 +0000 (20:05 +0000)]
Fix a warning in builds without asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209012 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Add an assert regarding the subprogram in the subprogram map matching...
David Blaikie [Fri, 16 May 2014 19:42:10 +0000 (19:42 +0000)]
DebugInfo: Add an assert regarding the subprogram in the subprogram map matching the abstract subprogram.

I'm not sure this is how it'll be going forward (I'd rather prefer the
definition to be in the main SP mapping, for various reasons) but this
helps me understand how it is today.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209009 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix most of PR10367.
Rafael Espindola [Fri, 16 May 2014 19:35:39 +0000 (19:35 +0000)]
Fix most of PR10367.

This patch changes the design of GlobalAlias so that it doesn't take a
ConstantExpr anymore. It now points directly to a GlobalObject, but its type is
independent of the aliasee type.

To avoid changing all alias related tests in this patches, I kept the common
syntax

@foo = alias i32* @bar

to mean the same as now. The cases that used to use cast now use the more
general syntax

@foo = alias i16, i32* @bar.

Note that GlobalAlias now behaves a bit more like GlobalVariable. We
know that its type is always a pointer, so we omit the '*'.

For the bitcode, a nice surprise is that we were writing both identical types
already, so the format change is minimal. Auto upgrade is handled by looking
through the casts and no new fields are needed for now. New bitcode will
simply have different types for Alias and Aliasee.

One last interesting point in the patch is that replaceAllUsesWith becomes
smart enough to avoid putting a ConstantExpr in the aliasee. This seems better
than checking and updating every caller.

A followup patch will delete getAliasedGlobal now that it is redundant. Another
patch will add support for an explicit offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209007 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Assume the CU's Subprogram list only contains definitions.
David Blaikie [Fri, 16 May 2014 18:26:53 +0000 (18:26 +0000)]
DebugInfo: Assume the CU's Subprogram list only contains definitions.

DIBuilder maintains this invariant and the current DwarfDebug code could
end up doing weird things if it contained declarations (such as putting
the definition DIE inside a CU that contained the declaration - this
doesn't seem like a good idea, so rather than adding logic to handle
this case we'll just ban in for now & cross that bridge if we come to
it later).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209004 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM64] Increases the Sched Model accuracy for Cortex-A53.
Chad Rosier [Fri, 16 May 2014 17:15:33 +0000 (17:15 +0000)]
[ARM64] Increases the Sched Model accuracy for Cortex-A53.
Patch by Dave Estes <cestes@codeaurora.org>
http://reviews.llvm.org/D3769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209001 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInstSimplify: Improve handling of ashr/lshr
David Majnemer [Fri, 16 May 2014 17:14:03 +0000 (17:14 +0000)]
InstSimplify: Improve handling of ashr/lshr

Summary:
Analyze the range of values produced by ashr/lshr cst, %V when it is
being used in an icmp.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3774

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209000 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInstSimplify: Optimize using dividend in sdiv
David Majnemer [Fri, 16 May 2014 16:57:04 +0000 (16:57 +0000)]
InstSimplify: Optimize using dividend in sdiv

Summary:
The dividend in an sdiv tells us the largest and smallest possible
results.  Use this fact to optimize comparisons against an sdiv with a
constant dividend.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3795

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208999 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM64] Fix wrong comment in load/store optimization pass.
Tilmann Scheller [Fri, 16 May 2014 16:50:13 +0000 (16:50 +0000)]
[ARM64] Fix wrong comment in load/store optimization pass.

ldr x1, [x0, #64]
add x0, x0, #64
 ->
ldr x1, [x0], #64

is not a valid transformation, the correct transformation (and what the code actually does) is:

ldr x1, [x0, #64]
add x0, x0, #64
 ->
ldr x1, [x0, #64]!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208998 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDwarfDebug: Refactor AT_ranges/AT_high_pc+AT_low_pc emission into helper function.
David Blaikie [Fri, 16 May 2014 16:42:40 +0000 (16:42 +0000)]
DwarfDebug: Refactor AT_ranges/AT_high_pc+AT_low_pc emission into helper function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208997 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[yaml2obj][ELF] Add an optional `Size` field to the YAML section declaration.
Simon Atanasyan [Fri, 16 May 2014 16:01:00 +0000 (16:01 +0000)]
[yaml2obj][ELF] Add an optional `Size` field to the YAML section declaration.

Now the only method to configure ELF section's content and size is to assign
a hexadecimal string to the `Content` field. Unfortunately this way is
completely useless when you need to declare a really large section.

To solve this problem this patch adds one more optional field `Size`
to the `RawContentSection` structure. When yaml2obj generates an ELF file
it uses the following algorithm:
1. If both `Content` and `Size` fields are missed create an empty section.
2. If only `Content` field is missed take section length from the `Size`
   field and fill the section by zero.
3. If only `Size` field is missed create a section using data from
   the `Content` field.
4. If both `Content` and `Size` fields are provided validate that the `Size`
   value is not less than size of `Content` data. Than take section length
   from the `Size`, fill beginning of the section by `Content` and the rest
   by zero.

Examples
--------
* Create a section 0x10000 bytes long filled by zero
  Name: .data
  Type: SHT_PROGBITS
  Flags: [ SHF_ALLOC ]
  Size: 0x10000

* Create a section 0x10000 bytes long starting from 'CA' 'FE' 'BA' 'BE'
  Name: .data
  Type: SHT_PROGBITS
  Flags: [ SHF_ALLOC ]
  Content: CAFEBABE
  Size: 0x10000

The patch reviewed by Michael Spencer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208995 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRe-enable inline memcpy expansion for Thumb1.
James Molloy [Fri, 16 May 2014 14:24:22 +0000 (14:24 +0000)]
Re-enable inline memcpy expansion for Thumb1.

Patch by Moritz Roth!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208994 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSmall dyn_cast and auto cleanup.
Rafael Espindola [Fri, 16 May 2014 14:22:33 +0000 (14:22 +0000)]
Small dyn_cast and auto cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208993 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix the Load/Store optimization pass to work with Thumb1.
James Molloy [Fri, 16 May 2014 14:14:30 +0000 (14:14 +0000)]
Fix the Load/Store optimization pass to work with Thumb1.

Patch by Moritz Roth!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208992 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoEnable the Load/Store optimization pass for Thumb1 but make it return immediately...
James Molloy [Fri, 16 May 2014 14:11:38 +0000 (14:11 +0000)]
Enable the Load/Store optimization pass for Thumb1 but make it return immediately for now.

Patch by Moritz Roth!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208991 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a few comment typos and style issues.
James Molloy [Fri, 16 May 2014 14:08:46 +0000 (14:08 +0000)]
Fix a few comment typos and style issues.

Patch by Moritz Roth!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208990 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add SELEQZ and SELNEZ instructions
Zoran Jovanovic [Fri, 16 May 2014 13:40:57 +0000 (13:40 +0000)]
[mips][mips64r6] Add SELEQZ and SELNEZ instructions
Differential Revision: http://reviews.llvm.org/D3743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208987 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChange the GlobalAlias constructor to look a bit more like GlobalVariable.
Rafael Espindola [Fri, 16 May 2014 13:34:04 +0000 (13:34 +0000)]
Change the GlobalAlias constructor to look a bit more like GlobalVariable.

This is part of the fix for pr10367. A GlobalAlias always has a pointer type,
so just have the constructor build the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208983 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add Compact indexed jumps.
Zoran Jovanovic [Fri, 16 May 2014 13:19:46 +0000 (13:19 +0000)]
[mips][mips64r6] Add Compact indexed jumps.

Differential Revision: http://reviews.llvm.org/D3707

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208981 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix hardcoded slash to native path seperator which was exposed from llvm::sys::path.
Yaron Keren [Fri, 16 May 2014 13:16:30 +0000 (13:16 +0000)]
Fix hardcoded slash to native path seperator which was exposed from llvm::sys::path.

http://reviews.llvm.org/D3687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208980 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Implement global merge optimization for global variables."
Rafael Espindola [Fri, 16 May 2014 13:02:18 +0000 (13:02 +0000)]
Revert "Implement global merge optimization for global variables."

This reverts commit r208934.

The patch depends on aliases to GEPs with non zero offsets. That is not
supported and fairly broken.

The good news is that GlobalAlias is being redesigned and will have support
for offsets, so this patch should be a nice match for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208978 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add Compact zero-compare branch-and-link instructions
Zoran Jovanovic [Fri, 16 May 2014 12:27:19 +0000 (12:27 +0000)]
[mips][mips64r6] Add Compact zero-compare branch-and-link instructions

Differential Revision: http://reviews.llvm.org/D3718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208977 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMergeFunctions Pass, introduced total ordering among GEP operations.
Stepan Dyatkovskiy [Fri, 16 May 2014 11:55:02 +0000 (11:55 +0000)]
MergeFunctions Pass, introduced total ordering among GEP operations.

Patch replaces old isEquivalentGEP implementation, and changes type of
comparison result from bool (equal or not) to {-1, 0, 1} (less, equal, greater).

This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208976 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Add DwarfTypesDWOSection also to MCCOFF.
NAKAMURA Takumi [Fri, 16 May 2014 11:14:51 +0000 (11:14 +0000)]
MC: Add DwarfTypesDWOSection also to MCCOFF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208975 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add compact branch instructions
Zoran Jovanovic [Fri, 16 May 2014 11:03:45 +0000 (11:03 +0000)]
[mips][mips64r6] Add  compact branch instructions
Differential Revision: http://reviews.llvm.org/D3691

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208974 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMergeFunctions Pass, introduced total ordering among operations.
Stepan Dyatkovskiy [Fri, 16 May 2014 11:02:22 +0000 (11:02 +0000)]
MergeFunctions Pass, introduced total ordering among operations.

Patch replaces old isEquivalentOperation implementation, and changes type of
comparison result from bool (equal or not) to {-1, 0, 1} (less, equal, greater).

This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208973 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add LWPC and LWUPC instructions
Zoran Jovanovic [Fri, 16 May 2014 10:27:10 +0000 (10:27 +0000)]
[mips][mips64r6] Add LWPC and LWUPC instructions

Differential Revision: http://reviews.llvm.org/D3788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208971 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add Floating Point Compare setting Mask - CMP.condn.fmt
Zoran Jovanovic [Fri, 16 May 2014 09:48:29 +0000 (09:48 +0000)]
[mips][mips64r6] Add Floating Point Compare setting Mask - CMP.condn.fmt
Differential Revision: http://reviews.llvm.org/D3750

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208970 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTableGen: fix operand counting for aliases
Tim Northover [Fri, 16 May 2014 09:42:04 +0000 (09:42 +0000)]
TableGen: fix operand counting for aliases

TableGen has a fairly dubious heuristic to decide whether an alias should be
printed: does the alias have lest operands than the real instruction. This is
bad enough (particularly with no way to override it), but it should at least be
calculated consistently for both strings.

This patch implements that logic: first get the *correct* string for the
variant, in the same way as the Matcher, without guessing; then count the
number of whitespace chars.

There are basically 4 changes this brings about after the previous
commits; all of these appear to be good, so I have changed the tests:

+ ARM64: we print "neg X, Y" instead of "sub X, xzr, Y".
+ ARM64: we skip implicit "uxtx" and "uxtw" modifiers.
+ Sparc: we print "mov A, B" instead of "or %g0, A, B".
+ Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208969 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: disable printing of "fcmXY ..., #0" aliases
Tim Northover [Fri, 16 May 2014 09:41:48 +0000 (09:41 +0000)]
ARM64: disable printing of "fcmXY ..., #0" aliases

The canonical syntax is "fcmXY ..., #0.0".

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208968 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAArch64: disable printing of add/sub alias
Tim Northover [Fri, 16 May 2014 09:41:43 +0000 (09:41 +0000)]
AArch64: disable printing of add/sub alias

This alias appears not to have an appropriate PrintMethod. Normally, I'd look
into it, but since AArch64 is disappearing soon it's probably not worth it.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208967 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSparc: disable printing of jmp/call aliases (C++ does it)
Tim Northover [Fri, 16 May 2014 09:41:39 +0000 (09:41 +0000)]
Sparc: disable printing of jmp/call aliases (C++ does it)

These aliases are handled entirely in C++ and only having TableGen InstAliases
for some of them was confusing LLVM.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208966 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSparc: disable printing on longer "brX,pt" aliases
Tim Northover [Fri, 16 May 2014 09:41:35 +0000 (09:41 +0000)]
Sparc: disable printing on longer "brX,pt" aliases

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208965 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMips: don't print subu alias for addiu
Tim Northover [Fri, 16 May 2014 09:41:30 +0000 (09:41 +0000)]
Mips: don't print subu alias for addiu

Certainly not without having a custom PrintMethod to invert the immediate
beforehand. But probably not at all.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208964 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoX86: disable printing of bare "mov" aliases
Tim Northover [Fri, 16 May 2014 09:41:26 +0000 (09:41 +0000)]
X86: disable printing of bare "mov" aliases

In AT&T syntax, we should probably print the full "movl" or "movw". TableGen
used to ignore these aliases because it was miscounting the number of operands.
This fixes the issue.

This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208963 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAArch64: disable printing of MOV -> MOVZ aliases
Tim Northover [Fri, 16 May 2014 09:41:21 +0000 (09:41 +0000)]
AArch64: disable printing of MOV -> MOVZ aliases

Actually, MOV sometimes is canonical, but for now this is a better
approximation than what's there.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208962 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: disable printing of swapped compare-mask aliases
Tim Northover [Fri, 16 May 2014 09:41:16 +0000 (09:41 +0000)]
ARM64: disable printing of swapped compare-mask aliases

You can perform (say) an fcmle operation by swapping the operands on an fcmge,
but it shouldn't be printed like that.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208961 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: disable printing of LDUR -> LDR aliases
Tim Northover [Fri, 16 May 2014 09:41:12 +0000 (09:41 +0000)]
ARM64: disable printing of LDUR -> LDR aliases

We accept "ldr w3, [x1, #-1]" as a convenience, but we should still print the
canonical "ldur" form.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208960 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: give TST aliases priority over ANDS.
Tim Northover [Fri, 16 May 2014 09:41:08 +0000 (09:41 +0000)]
ARM64: give TST aliases priority over ANDS.

If an ANDS instruction has Rd == ZR it should be printed as TST since
its only effect is on the flags register NZCV.

This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208959 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: give MOV priority over shorter ORR when printing aliases.
Tim Northover [Fri, 16 May 2014 09:41:03 +0000 (09:41 +0000)]
ARM64: give MOV priority over shorter ORR when printing aliases.

MOV is almost always the right thing to print if possile. People understand it.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208958 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: give NEG priority over SUB when printing aliases.
Tim Northover [Fri, 16 May 2014 09:40:58 +0000 (09:40 +0000)]
ARM64: give NEG priority over SUB when printing aliases.

For example, the full instruction "sub w0, wzr, w1, uxtw" could print as either
"neg w0, w1" or "sub w0, wzr, w1". The former is better.

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208957 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM64: disable printing of "lslv" type aliases
Tim Northover [Fri, 16 May 2014 09:40:52 +0000 (09:40 +0000)]
ARM64: disable printing of "lslv" type aliases

You can write "lslv w0, w1, w2" (probably for legacy reasons), but it should be
printed as simply "lsl".

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208956 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM64]Implement NEON post-increment LD1(lane) and post-increment LD1R.
Hao Liu [Fri, 16 May 2014 09:39:02 +0000 (09:39 +0000)]
[ARM64]Implement NEON post-increment LD1(lane) and post-increment LD1R.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208955 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMergeFunctions Pass, introduced total ordering among function attributes.
Stepan Dyatkovskiy [Fri, 16 May 2014 08:55:34 +0000 (08:55 +0000)]
MergeFunctions Pass, introduced total ordering among function attributes.

This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208953 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][mips64r6] Add Floating Point Fused Multiply Add Subtract
Zoran Jovanovic [Fri, 16 May 2014 08:42:27 +0000 (08:42 +0000)]
[mips][mips64r6] Add Floating Point Fused Multiply Add Subtract
Differential Revision: http://reviews.llvm.org/D3727

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208952 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: add some integer/floating point conversion libcalls
Saleem Abdulrasool [Fri, 16 May 2014 05:41:33 +0000 (05:41 +0000)]
ARM: add some integer/floating point conversion libcalls

Add some Windows on ARM specific library calls.  These are provided by msvcrt,
and can be used to perform integer to floating-point conversions (and
vice-versa) mirroring similar functions in the RTABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208949 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd C API for thread yielding callback.
Juergen Ributzka [Fri, 16 May 2014 02:33:15 +0000 (02:33 +0000)]
Add C API for thread yielding callback.

Sometimes a LLVM compilation may take more time then a client would like to
wait for. The problem is that it is not possible to safely suspend the LLVM
thread from the outside. When the timing is bad it might be possible that the
LLVM thread holds a global mutex and this would block any progress in any other
thread.

This commit adds a new yield callback function that can be registered with a
context. LLVM will try to yield by calling this callback function, but there is
no guaranteed frequency. LLVM will only do so if it can guarantee that
suspending the thread won't block any forward progress in other LLVM contexts
in the same process.

Once the client receives the call back it can suspend the thread safely and
resume it at another time.

Related to <rdar://problem/16728690>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208945 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoProfileData: Allow multiple profiles in RawInstrProfReader
Justin Bogner [Fri, 16 May 2014 00:38:00 +0000 (00:38 +0000)]
ProfileData: Allow multiple profiles in RawInstrProfReader

Allow multiple raw profiles to coexist in a single .profraw file,
given the following conditions:

- Zero padding at the end of or between profiles will be skipped.
- Each profile must start with a valid header.
- Mixing endianness or pointer sizes in concatenated profiles files is
  not allowed.

This is needed to handle cases where a program's shared libraries are
profiled as well as the main executable itself, as we'll need to emit
each executable's counters. Combining the tables in the runtime would
be expensive for the instrumented program.

rdar://16918688

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208938 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the Options query functions and just access our Options directly.
Eric Christopher [Fri, 16 May 2014 00:32:52 +0000 (00:32 +0000)]
Remove the Options query functions and just access our Options directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208937 91177308-0d34-0410-b5e6-96231b3b80d8