7 years agoFix typo.
Chih-Hung Hsieh [Tue, 28 Jul 2015 20:38:29 +0000 (20:38 +0000)]
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243475 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLimit this test only on linux.
Chih-Hung Hsieh [Tue, 28 Jul 2015 20:31:10 +0000 (20:31 +0000)]
Limit this test only on linux.

Differential Revision: http://reviews.llvm.org/D10522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243474 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Unroll] Add debug dumps to loop-unroll analyzer.
Michael Zolotukhin [Tue, 28 Jul 2015 20:07:29 +0000 (20:07 +0000)]
[Unroll] Add debug dumps to loop-unroll analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243471 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][FastISel] Fix generated code for IR's select instruction.
Vasileios Kalintiris [Tue, 28 Jul 2015 19:57:25 +0000 (19:57 +0000)]
[mips][FastISel] Fix generated code for IR's select instruction.

Generate correct code for the select instruction by zero-extending
it's boolean/condition operand to GPR-width. This is necessary because
the conditional-move instructions operate on the whole register.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11506

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243469 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Unroll] Don't analyze blocks outside the loop.
Michael Zolotukhin [Tue, 28 Jul 2015 19:21:21 +0000 (19:21 +0000)]
[Unroll] Don't analyze blocks outside the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243466 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Don't try to use LDS/vector for private if pointer value stored
Matt Arsenault [Tue, 28 Jul 2015 18:47:00 +0000 (18:47 +0000)]
AMDGPU: Don't try to use LDS/vector for private if pointer value stored

If the pointer is the store's value operand, this would produce
a broken module. Make sure the use is actually for the pointer operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243462 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix crash if called function is a bitcast
Matt Arsenault [Tue, 28 Jul 2015 18:29:14 +0000 (18:29 +0000)]
AMDGPU: Fix crash if called function is a bitcast

getCalledFunction() is null, so this would crash. Replace
crash with an error on unsupported call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243461 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Apply NSW and NUW flags via poison value analysis
Jingyue Wu [Tue, 28 Jul 2015 18:22:40 +0000 (18:22 +0000)]
[SCEV] Apply NSW and NUW flags via poison value analysis

Make Scalar Evolution able to propagate NSW and NUW flags from instructions to SCEVs in some cases. This is based on reasoning about when poison from instructions with these flags would trigger undefined behavior. This gives a 13% speed-up on some Eigen3-based Google-internal microbenchmarks for NVPTX.

There does not seem to be clear agreement about when poison should be considered to propagate through instructions. In this analysis, poison propagates only in cases where that should be uncontroversial.

This change makes LSR able to create induction variables for expressions like &ptr[i + offset] for loops like this:

  for (int i = 0; i < limit; ++i) {
    sum += ptr[i + offset];

Here ptr is a 64 bit pointer and offset is a 32 bit integer. For NVPTX, LSR currently creates an induction variable for i + offset instead, which is not as fast. Improving this situation is what brings the 13% speed-up on some Eigen3-based Google-internal microbenchmarks for NVPTX.

There are more details in this discussion on llvmdev.
June: http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-June/thread.html#87234
July: http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/thread.html#87392

Patch by Bjarke Roune

Reviewers: eliben, atrick, sanjoy

Subscribers: majnemer, hfinkel, jingyue, meheff, llvm-commits

Differential Revision: http://reviews.llvm.org/D11212

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243460 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix return type of getImplicitParameterOffset.
Matt Arsenault [Tue, 28 Jul 2015 18:09:55 +0000 (18:09 +0000)]
AMDGPU: Fix return type of getImplicitParameterOffset.

Patch by Zoltan Gilian <zoltan.gilian@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243459 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a test case for r242191 ([MMX] Use the appropriate instructions for
Alex Lorenz [Tue, 28 Jul 2015 17:52:59 +0000 (17:52 +0000)]
Add a test case for r242191 ([MMX] Use the appropriate instructions for
GR64 <-> VR64 copies).

This commit adds a MIR test case for the commit r242191, which was committed
without one. This test case verifies that the ExpandPostRA pass expands the
GR64 <-> VR64 copies into the appropriate MMX_MOV instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243457 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RuntimeDyld] Make LoadedObjectInfo::getLoadedSectionAddress take a SectionRef
Lang Hames [Tue, 28 Jul 2015 17:52:11 +0000 (17:52 +0000)]
[RuntimeDyld] Make LoadedObjectInfo::getLoadedSectionAddress take a SectionRef
rather than a string section name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243456 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove unit tests to target specific directories.
Chih-Hung Hsieh [Tue, 28 Jul 2015 17:32:49 +0000 (17:32 +0000)]
Move unit tests to target specific directories.

Differential Revision: http://reviews.llvm.org/D10522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243454 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the block address machine operands.
Alex Lorenz [Tue, 28 Jul 2015 17:28:03 +0000 (17:28 +0000)]
MIR Serialization: Serialize the block address machine operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243453 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: MCAsmInfo only has one syntax variant for now.
JF Bastien [Tue, 28 Jul 2015 17:23:07 +0000 (17:23 +0000)]
WebAssembly: MCAsmInfo only has one syntax variant for now.

Summary: MCAsmInfo is set up with the default AssemblerDialect, which is zero.

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243452 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd tests to show broken current behavior of minsize attribute
Sanjay Patel [Tue, 28 Jul 2015 17:18:25 +0000 (17:18 +0000)]
add tests to show broken current behavior of minsize attribute

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243451 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Extract the method 'parseGlobalValue'. NFC.
Alex Lorenz [Tue, 28 Jul 2015 17:09:52 +0000 (17:09 +0000)]
MIR Parser: Extract the method 'parseGlobalValue'. NFC.

This commit extracts the code that parses a global value from the method
'parseGlobalAddressOperand' into a new method 'parseGlobalValue', so that this
code can be reused by the method which will parse the block address machine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243450 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Move the function 'lexName'. NFC.
Alex Lorenz [Tue, 28 Jul 2015 17:03:40 +0000 (17:03 +0000)]
MIR Parser: Move the function 'lexName'. NFC.

This commit moves the function 'lexName' to the start of the file so it can
be reused by the function which will lex the named LLVM IR block references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243449 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Printer: Remove an outdated TODO comment and assertion. NFC.
Alex Lorenz [Tue, 28 Jul 2015 16:56:45 +0000 (16:56 +0000)]
MIR Printer: Remove an outdated TODO comment and assertion. NFC.

This commit removes an outdated TODO comment and a corresponding assertion
which asserts that the mir printer can't the print machine basic blocks that
aren't sequentially numbered.

This comment and assertion were correct when I was working on the patch which
serialized the machine basic blocks, but then I decided to add an 'ID'
attribute to the machine basic block's YAML mapping based on the patch review.
This comment and assertion then became invalid as with the 'ID' attribute we
can serialize the non sequential machine basic blocks and their references
without any problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243447 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Remove redundant parameters. NFC.
Alex Lorenz [Tue, 28 Jul 2015 16:48:37 +0000 (16:48 +0000)]
MIR Parser: Remove redundant parameters. NFC.

This commit removes the redundant parameters from the two methods
'initializeRegisterInfo' and 'initializeFrameInfo'. The removed parameters are
redundant as we are already passing in the 'MachineFunction' to those methods,
and those parameters can be derived from the machine function parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243445 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImplement target independent TLS compatible with glibc's emutls.c.
Chih-Hung Hsieh [Tue, 28 Jul 2015 16:24:05 +0000 (16:24 +0000)]
Implement target independent TLS compatible with glibc's emutls.c.

The 'common' section TLS is not implemented.
Current C/C++ TLS variables are not placed in common section.
DWARF debug info to get the address of TLS variables is not generated yet.

clang and driver changes in http://reviews.llvm.org/D10524

  Added -femulated-tls flag to select the emulated TLS model,
  which will be used for old targets like Android that do not
  support ELF TLS models.

Added TargetLowering::LowerToTLSEmulatedModel as a target-independent
function to convert a SDNode of TLS variable address to a function call
to __emutls_get_address.

Added into lib/Target/*/*ISelLowering.cpp to call LowerToTLSEmulatedModel
for TLSModel::Emulated. Although all targets supporting ELF TLS models are
enhanced, emulated TLS model has been tested only for Android ELF targets.
Modified AsmPrinter.cpp to print the emutls_v.* and emutls_t.* variables for
emulated TLS variables.
Modified DwarfCompileUnit.cpp to skip some DIE for emulated TLS variabls.

TODO: Add proper DIE for emulated TLS variables.
      Added new unit tests with emulated TLS.

Differential Revision: http://reviews.llvm.org/D10522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243438 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSummary:
Martell Malone [Tue, 28 Jul 2015 16:18:17 +0000 (16:18 +0000)]

The official specifications state that the value of IMAGE_FILE_MACHINE_ARM64
is 0xAA64 (as per the Microsoft Portable Executable and Common Object Format
Specification v8.3).

Reviewers: rnk

Subscribers: llvm-commits, compnerd, ruiu

Differential Revision: http://reviews.llvm.org/D11511

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243434 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Cleanup whitespaces. NFC
Bruno Cardoso Lopes [Tue, 28 Jul 2015 15:53:21 +0000 (15:53 +0000)]
[LVI] Cleanup whitespaces. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243430 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix formatting; NFC
Sanjay Patel [Tue, 28 Jul 2015 15:38:43 +0000 (15:38 +0000)]
fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243424 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Match float round and convert to int instructions.
Geoff Berry [Tue, 28 Jul 2015 15:24:10 +0000 (15:24 +0000)]
[AArch64] Match float round and convert to int instructions.

Add patterns for doing floating point round with various rounding modes
followed by conversion to int as a single FCVT* instruction.

Reviewers: t.p.northover, jmolloy

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D11424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243422 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse a specified list of languages in cmake project() command.
Douglas Katzman [Tue, 28 Jul 2015 14:43:53 +0000 (14:43 +0000)]
Use a specified list of languages in cmake project() command.

This allows asm files and Cxx files to be compiled with different flags
rather than treating them identically. LLVM itself has no asm files
other than tests, but this setting is inherited by the compiler-rt
project (unless compiled standalone), which does have asm files.

Differential Revision: http://reviews.llvm.org/D10707

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243419 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Add clarifying comments for the checking pointer grouping algorithm. NFC
Silviu Baranga [Tue, 28 Jul 2015 13:44:08 +0000 (13:44 +0000)]
[LAA] Add clarifying comments for the checking pointer grouping algorithm. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243416 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImplement __builtin_thread_pointer
Adhemerval Zanella [Tue, 28 Jul 2015 13:03:31 +0000 (13:03 +0000)]
Implement __builtin_thread_pointer

This path add the aarch64 lowering of __builtin_thread_pointer.  It uses
the already implemented AArch64ISD::THREAD_POINTER used in TLS generation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243412 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodocs: update arcanist links
Martell Malone [Tue, 28 Jul 2015 11:43:37 +0000 (11:43 +0000)]
docs: update arcanist links

I need a test commit for using arc.
This seems like an appropriate commit to use as a test

We may want to port this commit back to 3.7 also

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11527

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243408 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GMR] Teach GlobalsModRef to distinguish an important and safe case of
Chandler Carruth [Tue, 28 Jul 2015 11:11:11 +0000 (11:11 +0000)]
[GMR] Teach GlobalsModRef to distinguish an important and safe case of
no-alias with non-addr-taken globals: they cannot alias a captured

If the non-global underlying object would have been a capture were it to
alias the global, we can firmly conclude no-alias. It isn't reasonable
for a transformation to introduce a capture in a way observable by an
alias analysis. Consider, even if it were to temporarily capture one
globals address into another global and then restore the other global
afterward, there would be no way for the load in the alias query to
observe that capture event correctly. If it observes it then the
temporary capturing would have changed the meaning of the program,
making it an invalid transformation. Even instrumentation passes or
a pass which is synthesizing stores to global variables to expose race
conditions in programs could not trigger this unless it queried the
alias analysis infrastructure mid-transform, in which case it seems
reasonable to return results from before the transform started.

See the comments in the change for a more detailed outlining of the
theory here.

This should address the primary performance regression found when the
non-conservatively-correct path of the alias query was disabled.

Differential Revision: http://reviews.llvm.org/D11410

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243405 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImproving lli documentation
Renato Golin [Tue, 28 Jul 2015 10:24:11 +0000 (10:24 +0000)]
Improving lli documentation

Too many people hope lli would act as an emulator when it's actually
just a tool to help prototype IR code and test the JIT compiler. This
commit makes that fact explicit in the documentation

It also migrates the old style bold/italic doc tags to the preferred
meta tags (.. option::, :program:, etc).

No errors when generating the documents, visual inspection in the HTML
result doesn't show any major difference, apart from the slight style

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243401 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Remove mergeSPUpdatesUp()
Michael Kuperstein [Tue, 28 Jul 2015 08:56:13 +0000 (08:56 +0000)]
[X86] Remove mergeSPUpdatesUp()

X86FrameLowering has both a mergeSPUpdates() that accepts a direction, and an
mergeSPUpdatesUp(), which seem to do the same thing, except for a slightly
different interface. Removed the less general function.

Differential Revision: http://reviews.llvm.org/D11510

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243396 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Use bitmasks instead of shuffles where possible.
Simon Pilgrim [Tue, 28 Jul 2015 08:54:41 +0000 (08:54 +0000)]
[X86][SSE] Use bitmasks instead of shuffles where possible.

VPAND is a lot faster than VPSHUFB and VPBLENDVB - this patch ensures we attempt to lower to a basic bitmask before lowering to the slower byte shuffle/blend instructions.

Split off from D11518.

Differential Revision: http://reviews.llvm.org/D11541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243395 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Add encoding tests to vptestnm instructions
Igor Breger [Tue, 28 Jul 2015 07:00:00 +0000 (07:00 +0000)]
AVX512: Add encoding tests to vptestnm instructions

Differential Revision: http://reviews.llvm.org/D11521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243391 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
Igor Breger [Tue, 28 Jul 2015 06:53:28 +0000 (06:53 +0000)]
AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11528

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243390 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoChanges for MachineBasicBlock to use SortedVector for LiveIns.
Puyan Lotfi [Tue, 28 Jul 2015 06:38:41 +0000 (06:38 +0000)]
Changes for MachineBasicBlock to use SortedVector for LiveIns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243389 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove the Target way of overriding DAG Scheduler to a target hook
Mehdi Amini [Tue, 28 Jul 2015 06:18:04 +0000 (06:18 +0000)]
Move the Target way of overriding DAG Scheduler to a target hook

The previous way of overriding it was relying on calling "setDefault"
on the global registry, which implies global mutable state.

Reviewers: echristo, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11538

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243388 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdding ADT SortedVector; client patch will follow.
Puyan Lotfi [Tue, 28 Jul 2015 06:04:00 +0000 (06:04 +0000)]
Adding ADT SortedVector; client patch will follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243386 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GMR] Fix a long-standing bug in GlobalsModRef where it failed to clear
Chandler Carruth [Tue, 28 Jul 2015 06:01:57 +0000 (06:01 +0000)]
[GMR] Fix a long-standing bug in GlobalsModRef where it failed to clear
out the per-function modref data structures when functions were deleted
or when globals were deleted.

I don't actually know how the global deletion side of this bug hasn't
been hit before, but for the other it just-so-happens that functions
aren't likely to be deleted in the particular part of the LTO pipeline
where we currently enable GMR, so we got lucky.

With this patch, I can self-host with GMR enabled in the normal pass

I was a bit concerned about the compile-time impact of this chang, which
is part of what motivated my prior string of patches to make the
per-function datastructure very dense and fast to walk. With those
changes in place, I can't measure a significant compile time difference
(the difference is around 0.1% which is *way* below the noise) before
and after this patch when building a linked bitcode for all of Clang.

Differential Revision: http://reviews.llvm.org/D11453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243385 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LDist][LVer] Explicitly pass the set of memchecks to LoopVersioning, NFC
Adam Nemet [Tue, 28 Jul 2015 05:01:53 +0000 (05:01 +0000)]
[LDist][LVer] Explicitly pass the set of memchecks to LoopVersioning, NFC

Before the patch, the checks were generated internally in
addRuntimeCheck.  Now, we use the new overloaded version of
addRuntimeCheck that takes the ready-made set of checks as a parameter.

The checks are now generated by the client (LoopDistribution) with the
new RuntimePointerChecking::generateChecks API.

Also the new printChecks API is used to print out the checks for

This is to continue the transition over to the new model whereby clients
will get the full set of checks from LAA, filter it and then pass it to
LoopVersioning and in turn to addRuntimeCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243382 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unnecessary const_casts. NFC
Craig Topper [Tue, 28 Jul 2015 04:28:46 +0000 (04:28 +0000)]
Remove unnecessary const_casts. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243380 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReserve some constant values for the Swift calling convention.
Bob Wilson [Tue, 28 Jul 2015 04:05:45 +0000 (04:05 +0000)]
Reserve some constant values for the Swift calling convention.

Swift has a custom calling convention that also requires some new flags
on arguments and one new attribute on alloca instructions. This patch
does not include the implementation of that calling convention - that
will be provided as part of the open-source release of Swift; this only
reserves the bitcode constant values so that they are not used for
other purposes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243379 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFileCheck'ify some wc/grep based tests; NFCI.
Sanjoy Das [Tue, 28 Jul 2015 03:50:09 +0000 (03:50 +0000)]
FileCheck'ify some wc/grep based tests; NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243378 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] ensure that the dfsan tracing hooks actually run (using -verbosity=3...
Kostya Serebryany [Tue, 28 Jul 2015 01:25:00 +0000 (01:25 +0000)]
[libFuzzer] ensure that the dfsan tracing hooks actually run (using -verbosity=3 in tests)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] when using cmp traces, first check that the CMP is evaluated to one value...
Kostya Serebryany [Tue, 28 Jul 2015 00:59:53 +0000 (00:59 +0000)]
[libFuzzer] when using cmp traces, first check that the CMP is evaluated to one value much more frequently than to the other value (heuristic)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243363 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix invalid load folding with SSE/AVX FP logical instructions (PR22371)
Sanjay Patel [Tue, 28 Jul 2015 00:48:32 +0000 (00:48 +0000)]
fix invalid load folding with SSE/AVX FP logical instructions (PR22371)

This is a follow-up to the FIXME that was added with D7474 ( http://reviews.llvm.org/rL229531 ).
I thought this load folding bug had been made hard-to-hit, but it turns out to be very easy
when targeting 32-bit x86 and causes a miscompile/crash in Wine:

The quick fix is to simply remove the scalar FP logical instructions from the load folding table
in X86InstrInfo, but that causes us to miss load folds that should be possible when lowering fabs,
fneg, fcopysign. So the majority of this patch is altering those lowerings to use *vector* FP
logical instructions (because that's all x86 gives us anyway). That lets us do the load folding

Differential Revision: http://reviews.llvm.org/D11477

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243361 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LSR] Move X86 specific test case to X86/
Sanjoy Das [Tue, 28 Jul 2015 00:13:42 +0000 (00:13 +0000)]
[LSR] Move X86 specific test case to X86/

rL243348 added the test case in the wrong directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243357 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opaque pointer type] Avoid using pointee types to retrieve InlineAsm's function...
David Blaikie [Tue, 28 Jul 2015 00:06:38 +0000 (00:06 +0000)]
[opaque pointer type] Avoid using pointee types to retrieve InlineAsm's function type

As a stop-gap, retrieving the InlineAsm's function type was done via the
pointee type of its (pointer) Value type.

Instead, pass down and store the FunctionType in the InlineAsm object.

The only wrinkle with this is the ConstantUniqueMap, which then needs to
ferry the FunctionType down through the InlineAsmKeyType. This could be
done a bit differently if the ConstantInfo trait were broadened a bit to
provide an extension point for access to the TypeClass object from the
ValType objects, so that the ConstantUniqueMap<InlineAsm> would then be
keyed on FunctionTypes instead of PointerTypes that point to

This drops the number of IR tests that don't roundtrip through bitcode*
without calling PointerType::getElementType from 416 to 8 (out of
10733). 3 of those crash when roundtripping at ToT anyway.

* modulo various unavoidable uses of pointer types when validating IR
  (for now) and in the way globals are parsed, unfortunately. These
  cases will either go away (because such validation will no longer be
  necessary or possible when pointee types are opaque), or have to be
  made simultaneously with the removal of pointee types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Split out a helper to print a collection of memchecks
Adam Nemet [Mon, 27 Jul 2015 23:54:41 +0000 (23:54 +0000)]
[LAA] Split out a helper to print a collection of memchecks

This is effectively an NFC but we can no longer print the index of the
pointer group so instead I print its address.  This still lets us
cross-check the section that list the checks against the section that
list the groups (see how I modified the test).

E.g. before we printed this:

    Run-time memory checks:
    Check 0:
      Comparing group 0:
        %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
        %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
      Against group 1:
        %arrayidxA = getelementptr i16, i16* %a, i64 %ind
        %arrayidxA1 = getelementptr i16, i16* %a, i64 %add
    Grouped accesses:
      Group 0:
        (Low: %c High: (78 + %c))
          Member: {%c,+,4}<%for.body>
          Member: {(2 + %c),+,4}<%for.body>

Now we print this (changes are underlined):

    Run-time memory checks:
    Check 0:
      Comparing group (0x7f9c6040c320):
        %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
        %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
      Against group (0x7f9c6040c358):
        %arrayidxA1 = getelementptr i16, i16* %a, i64 %add
        %arrayidxA = getelementptr i16, i16* %a, i64 %ind
    Grouped accesses:
      Group 0x7f9c6040c320:
        (Low: %c High: (78 + %c))
          Member: {(2 + %c),+,4}<%for.body>
          Member: {%c,+,4}<%for.body>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo; NFC
Sanjay Patel [Mon, 27 Jul 2015 23:43:09 +0000 (23:43 +0000)]
fix typo; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opaque pointers] Avoid the use of pointee types when parsing inline asm in IR
David Blaikie [Mon, 27 Jul 2015 23:32:19 +0000 (23:32 +0000)]
[opaque pointers] Avoid the use of pointee types when parsing inline asm in IR

When parsing calls to inline asm the pointee type (of the pointer type
representing the value type of the InlineAsm value) was used. To avoid
using it, use the ValID structure to ferry the FunctionType directly
through to the InlineAsm construction.

This is a bit of a workaround - alternatively the inline asm could
explicitly describe the type but that'd be verbose/redundant in the IR
and so long as the inline asm calls directly in the context of a call or
invoke, this should suffice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243349 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LSR] Generate and use zero extends
Sanjoy Das [Mon, 27 Jul 2015 23:27:51 +0000 (23:27 +0000)]
[LSR] Generate and use zero extends

If a scale or a base register can be rewritten as "Zext({A,+,1})" then
LSR will now consider a formula of that form in its normal cost

Depends on D9180

Reviewers: qcolombet, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243348 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TargetTransformInfo][NFCI] Add TargetTransformInfo::isZExtFree.
Sanjoy Das [Mon, 27 Jul 2015 23:27:43 +0000 (23:27 +0000)]
[TargetTransformInfo][NFCI] Add TargetTransformInfo::isZExtFree.

This function is not used in this change but will be used in a
subsequent change.

Reviewers: mcrosier, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243347 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: add a generic CPU
JF Bastien [Mon, 27 Jul 2015 23:25:54 +0000 (23:25 +0000)]
WebAssembly: add a generic CPU

Summary: WebAssemblySubtarget.cpp expects a default 'generic' CPU to exist, and this seems to be prevalent with other targets. It makes sense to have something between MVP and bleeding-edge, even though for now it's the same as MVP. This removes a warning that's currently generated.

Subscribers: jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243345 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTweak llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins...
NAKAMURA Takumi [Mon, 27 Jul 2015 23:01:41 +0000 (23:01 +0000)]
Tweak llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll not to fail for targeting win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the unnamed basic block references.
Alex Lorenz [Mon, 27 Jul 2015 22:42:41 +0000 (22:42 +0000)]
MIR Serialization: Serialize the unnamed basic block references.

This commit serializes the references from the machine basic blocks to the
unnamed basic blocks.

This commit adds a new attribute to the machine basic block's YAML mapping
called 'ir-block'. This attribute contains the actual reference to the
basic block.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243340 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: more MCAsmInfo nits.
JF Bastien [Mon, 27 Jul 2015 22:40:31 +0000 (22:40 +0000)]
WebAssembly: more MCAsmInfo nits.

Summary: As suggested by sunfish.

Subscribers: jfb, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D11544

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243339 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-mc] Add --no-warn flag with -W alias to disable outputting warnings while assem...
Colin LeMahieu [Mon, 27 Jul 2015 22:39:14 +0000 (22:39 +0000)]
[llvm-mc] Add --no-warn flag with -W alias to disable outputting warnings while assembling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243338 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix -Wmicrosoft-enum warning
Reid Kleckner [Mon, 27 Jul 2015 22:35:50 +0000 (22:35 +0000)]
Fix -Wmicrosoft-enum warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243337 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Expose the method 'getLocalSlot' in the module slot tracker.
Alex Lorenz [Mon, 27 Jul 2015 22:31:04 +0000 (22:31 +0000)]
IR: Expose the method 'getLocalSlot' in the module slot tracker.

This commit publicly exposes the method 'getLocalSlot' in the
'ModuleSlotTracker' class.

This change is useful for MIR serialization, to serialize the unnamed basic
block and unnamed alloca references.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243336 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago- Added support for parsing HWDiv features using Target Parser.
Alexandros Lamprineas [Mon, 27 Jul 2015 22:26:59 +0000 (22:26 +0000)]
- Added support for parsing HWDiv features using Target Parser.
- Architecture extensions are represented as a bitmap.

Phabricator: http://reviews.llvm.org/D11457

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243335 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-mc] Pushing plumbing through for --fatal-warnings flag.
Colin LeMahieu [Mon, 27 Jul 2015 21:56:53 +0000 (21:56 +0000)]
[llvm-mc] Pushing plumbing through for --fatal-warnings flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IndVars] Make loop varying predicates loop invariant.
Sanjoy Das [Mon, 27 Jul 2015 21:42:49 +0000 (21:42 +0000)]
[IndVars] Make loop varying predicates loop invariant.

Was D9784: "Remove loop variant range check when induction variable is
strictly increasing"

This change re-implements D9784 with the two differences:

 1. It does not use SCEVExpander and does not generate new
    instructions.  Instead, it does a quick local search for existing
    `llvm::Value`s that it needs when modifying the `icmp`

 2. It is more general -- it deals with both increasing and decreasing
    induction variables.

I've added all of the tests included with D9784, and two more.

As an example on what this change does (copied from D9784):

Given C code:

for (int i = M; i < N; i++) // i is known not to overflow
  if (i < 0) break;
  a[i] = 0;

This transformation produces:

for (int i = M; i < N; i++)
  if (M < 0) break;
  a[i] = 0;

Which can be unswitched into:

if (!(M < 0))
  for (int i = M; i < N; i++)
    a[i] = 0;

I went back and forth on whether the top level logic should live in
`SimplifyIndvar::eliminateIVComparison` or be put into its own
routine.  Right now I've put it under `eliminateIVComparison` because
even though the `icmp` is not *eliminated*, it no longer is an IV
comparison.  I'm open to putting it in its own helper routine if you
think that is better.

Reviewers: reames, nicholas, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11278

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove unnecessary forward declaration; NFC
Sanjay Patel [Mon, 27 Jul 2015 21:11:55 +0000 (21:11 +0000)]
remove unnecessary forward declaration; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243328 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodon't repeat function names in comments; NFC
Sanjay Patel [Mon, 27 Jul 2015 21:03:03 +0000 (21:03 +0000)]
don't repeat function names in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: minor MCAsmInfo fixes
JF Bastien [Mon, 27 Jul 2015 20:46:51 +0000 (20:46 +0000)]
WebAssembly: minor MCAsmInfo fixes

Fix pointer / callee-save stack sto size.
Update comment character to be LISP-ish.

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243326 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Added shuffle tests to demonstrate missed bitmask.
Simon Pilgrim [Mon, 27 Jul 2015 20:41:57 +0000 (20:41 +0000)]
[X86][SSE] Added shuffle tests to demonstrate missed bitmask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243324 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.
Alex Lorenz [Mon, 27 Jul 2015 20:39:03 +0000 (20:39 +0000)]
MIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243322 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Rename the standalone parsing methods. NFC.
Alex Lorenz [Mon, 27 Jul 2015 20:29:27 +0000 (20:29 +0000)]
MIR Parser: Rename the standalone parsing methods. NFC.

This commit renames the methods 'parseMBB' and 'parseNamedRegister' to
'parseStandaloneMBB' and 'parseStandaloneNamedRegister' in order for their
names to be consistent with the method 'parseStandaloneVirtualRegister'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243319 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Bruno Cardoso Lopes [Mon, 27 Jul 2015 20:26:04 +0000 (20:26 +0000)]
Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"

Still breaks some ARM buildbots. This reverts r243271.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243318 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Upper-case variable names, NFC
Adam Nemet [Mon, 27 Jul 2015 19:38:50 +0000 (19:38 +0000)]
[LAA] Upper-case variable names, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243313 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Split out a helper from addRuntimeCheck to generate the check, NFC
Adam Nemet [Mon, 27 Jul 2015 19:38:48 +0000 (19:38 +0000)]
[LAA] Split out a helper from addRuntimeCheck to generate the check, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243312 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Remove check for Darwin that was needed to decide if x18 should
Akira Hatanaka [Mon, 27 Jul 2015 19:18:47 +0000 (19:18 +0000)]
[AArch64] Remove check for Darwin that was needed to decide if x18 should
be reserved.

The decision to reserve x18 is going to be made solely by the front-end,
so it isn't necessary to check if the OS is Darwin in the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243308 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixed signed/unsigned comparison warning.
Simon Pilgrim [Mon, 27 Jul 2015 19:07:15 +0000 (19:07 +0000)]
Fixed signed/unsigned comparison warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243306 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][FastISel] Add more truncation tests.
Juergen Ributzka [Mon, 27 Jul 2015 19:00:23 +0000 (19:00 +0000)]
[AArch64][FastISel] Add more truncation tests.

This is a follow-up to r243198 and adds more truncation tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243304 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine][X86][SSE] Replace sign/zero extension intrinsics with native IR
Simon Pilgrim [Mon, 27 Jul 2015 18:52:15 +0000 (18:52 +0000)]
[InstCombine][X86][SSE] Replace sign/zero extension intrinsics with native IR

Now that we are generating sane codegen for vector sext/zext nodes on SSE targets, this patch uses instcombine to replace the SSE41/AVX2 pmovsx and pmovzx intrinsics with the equivalent native IR code.

Differential Revision: http://reviews.llvm.org/D11503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243303 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Remove unnecessary null check. NFC."
Pete Cooper [Mon, 27 Jul 2015 18:37:58 +0000 (18:37 +0000)]
Revert "Remove unnecessary null check.  NFC."

This reverts commit r243167.

Duncan pointed out that dyn_cast can return null in these cases, so this
was an unsafe commit to make.  Sorry for the noise.

Worryingly there were no tests which fail...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243302 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix assert when inlining a constantexpr addrspacecast
Matt Arsenault [Mon, 27 Jul 2015 18:31:03 +0000 (18:31 +0000)]
Fix assert when inlining a constantexpr addrspacecast

The pointer size of the addrspacecasted pointer might not have matched,
so this would have hit an assert in accumulateConstantOffset.

I think this was here to allow constant folding of a load of an
addrspacecasted constant. Accumulating the offset through the
addrspacecast doesn't make much sense, so something else is necessary
to allow folding the load through this cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243300 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix ODR violation. NFC.
Diego Novillo [Mon, 27 Jul 2015 18:27:23 +0000 (18:27 +0000)]
Fix ODR violation. NFC.

There is an ODR conflict between lib/ExecutionEngine/ExecutionEngineBindings.cpp
and lib/Target/TargetMachineC.cpp. The inline definitions should simply
be marked static (thanks dblaikie for the hint).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243298 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix `llvm-config` to emit the linker flag for the combined shared object built by...
JF Bastien [Mon, 27 Jul 2015 18:26:30 +0000 (18:26 +0000)]
Fix `llvm-config` to emit the linker flag for the combined shared object built by autoconfig/make instead of the individual components.

When LLVM is configured to build shared libraries, CMake builds each component as it's own shared object, while autoconfig/make builds them statically and then links them all together to create a single shared object. This change adds compile time config flags to `llvm-config` so it can know whether LLVM's components are separated or not and act accordingly.

This fixes `llvm-config` instead of fixing the makefiles to behave like CMake because, AIUI, LLVM's autoconfig/make build system is on the way out anyway.

This change only affects `llvm-config` from builds that use autoconfig/make.

Reviewers: jfb

Subscribers: echristo, dschuff, llvm-commits

Differential Revision: http://reviews.llvm.org/D11392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243297 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: don't match vgpr loads for constant loads
Marek Olsak [Mon, 27 Jul 2015 18:16:08 +0000 (18:16 +0000)]
AMDGPU: don't match vgpr loads for constant loads

Author: Dave Airlie <airlied@redhat.com>

In order to implement indirect sampler loads, we don't
want to match on a VGPR load but an SGPR one for constants,
as we cannot feed VGPRs to the sampler only SGPRs.

this should be applicable for llvm 3.7 as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243294 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agomove combineRepeatedFPDivisors logic into a helper function; NFCI
Sanjay Patel [Mon, 27 Jul 2015 17:58:49 +0000 (17:58 +0000)]
move combineRepeatedFPDivisors logic into a helper function; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243293 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReset the virtual registers in liveins when clearing the virtual registers.
Alex Lorenz [Mon, 27 Jul 2015 17:51:59 +0000 (17:51 +0000)]
Reset the virtual registers in liveins when clearing the virtual registers.

This commit zeroes out the virtual register references in the machine
function's liveins in the class 'MachineRegisterInfo' when the virtual
register definitions are cleared.

Reviewers: Matthias Braun

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243290 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the machine function's liveins.
Alex Lorenz [Mon, 27 Jul 2015 17:42:45 +0000 (17:42 +0000)]
MIR Serialization: Serialize the machine function's liveins.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243288 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo and spacing; NFC
Sanjay Patel [Mon, 27 Jul 2015 17:39:20 +0000 (17:39 +0000)]
fix typo and spacing; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243287 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Emit the correct error message.
Davide Italiano [Mon, 27 Jul 2015 17:22:19 +0000 (17:22 +0000)]
[TableGen] Emit the correct error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243284 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Add const to a bunch of Type* in DataLayout. NFC."
Pete Cooper [Mon, 27 Jul 2015 17:15:28 +0000 (17:15 +0000)]
Revert "Add const to a bunch of Type* in DataLayout.  NFC."

This reverts commit r243135.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243283 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Add const to some Type* parameters which didn't need to be mutable. NFC."
Pete Cooper [Mon, 27 Jul 2015 17:15:24 +0000 (17:15 +0000)]
Revert "Add const to some Type* parameters which didn't need to be mutable.  NFC."

This reverts commit r243146.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243282 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe tests added in r243270 require asserts to be enabled
Silviu Baranga [Mon, 27 Jul 2015 15:22:49 +0000 (15:22 +0000)]
The tests added in r243270 require asserts to be enabled

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243274 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the tests added in r243270. Use 2>&1 instead of |&
Silviu Baranga [Mon, 27 Jul 2015 15:08:55 +0000 (15:08 +0000)]
Fix the tests added in r243270. Use 2>&1 instead of |&

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243273 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PeepholeOptimizer] Look through PHIs to find additional register sources
Bruno Cardoso Lopes [Mon, 27 Jul 2015 14:39:46 +0000 (14:39 +0000)]
[PeepholeOptimizer] Look through PHIs to find additional register sources

Reapply r242295 with fixes in the implementation.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0


  psllq %mm1, %mm0
  jmp C

  por %mm1, %mm0
  jmp C

  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243271 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM/AArch64] Fix cost model for interleaved accesses
Silviu Baranga [Mon, 27 Jul 2015 14:39:34 +0000 (14:39 +0000)]
[ARM/AArch64] Fix cost model for interleaved accesses

Fix the cost of interleaved accesses for ARM/AArch64.
We were calling getTypeAllocSize and using it to check
the number of bits, when we should have called
getTypeAllocSizeInBits instead.

This would pottentially cause the vectorizer to
generate loads/stores and shuffles which cannot
be matched with an interleaved access instruction.

No performance changes are expected for now since
matching/generating interleaved accesses is still
disabled by default.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243270 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend. NFCI.
Simon Pilgrim [Mon, 27 Jul 2015 12:37:19 +0000 (12:37 +0000)]
[X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend. NFCI.

Allows us to show diffs for D11518 more clearly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243264 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
Marek Olsak [Mon, 27 Jul 2015 11:37:42 +0000 (11:37 +0000)]
AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround

This is a candidate for 3.7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243263 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLoopAccessAnalysis.cpp: Tweak r243239 to avoid side effects. It caused different...
NAKAMURA Takumi [Mon, 27 Jul 2015 01:35:30 +0000 (01:35 +0000)]
LoopAccessAnalysis.cpp: Tweak r243239 to avoid side effects. It caused different emissions between gcc and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243258 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAvoid using uncommon acronym "MSROM".
Sean Silva [Mon, 27 Jul 2015 00:46:59 +0000 (00:46 +0000)]
Avoid using uncommon acronym "MSROM".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243256 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRoll forward r243250
Jingyue Wu [Sun, 26 Jul 2015 19:10:03 +0000 (19:10 +0000)]
Roll forward r243250

r243250 appeared to break clang/test/Analysis/dead-store.c on one of the build
slaves, but I couldn't reproduce this failure locally. Probably a false
positive as I saw this test was broken by r243246 or r243247 too but passed
later without people fixing anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243253 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r243250
Jingyue Wu [Sun, 26 Jul 2015 18:30:13 +0000 (18:30 +0000)]
Revert r243250

breaks tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243251 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TTI/CostModel] improve TTI::getGEPCost and use it in CostModel::getInstructionCost
Jingyue Wu [Sun, 26 Jul 2015 17:28:13 +0000 (17:28 +0000)]
[TTI/CostModel] improve TTI::getGEPCost and use it in CostModel::getInstructionCost

This patch updates TargetTransformInfoImplCRTPBase::getGEPCost to consider
addressing modes. It now returns TCC_Free when the GEP can be completely folded
to an addresing mode.

I started this patch as I refactored SLSR. Function isGEPFoldable looks common
and is indeed used by some WIP of mine. So I extracted that logic to getGEPCost.

Furthermore, I noticed getGEPCost wasn't directly tested anywhere. The best
testing bed seems CostModel, but its getInstructionCost method invokes
getAddressComputationCost for GEPs which provides very coarse estimation. So
this patch also makes getInstructionCost call the updated getGEPCost for GEPs.
This change inevitably breaks some tests because the cost model changes, but
nothing looks seriously wrong -- if we believe the new cost model is the right
way to go, these tests should be updated.

This patch is not perfect yet -- the comments in some tests need to be updated.
I want to know whether this is a right approach before fixing those details.

Reviewers: chandlerc, hfinkel

Subscribers: aschwaighofer, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D9819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243250 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Refreshed vector bit count tests.
Simon Pilgrim [Sun, 26 Jul 2015 17:02:25 +0000 (17:02 +0000)]
[X86][SSE] Refreshed vector bit count tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243249 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX2] Refreshed avx2 conversion tests
Simon Pilgrim [Sun, 26 Jul 2015 17:01:16 +0000 (17:01 +0000)]
[X86][AVX2] Refreshed avx2 conversion tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243248 91177308-0d34-0410-b5e6-96231b3b80d8