8 years agoFix formatting of a tablegen register info file by putting a line break in a better...
Craig Topper [Tue, 22 Sep 2015 05:37:14 +0000 (05:37 +0000)]
Fix formatting of a tablegen register info file by putting a line break in a better place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248245 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse makeArrayRef and None to simplify some code in a tablegen register info file...
Craig Topper [Tue, 22 Sep 2015 05:37:12 +0000 (05:37 +0000)]
Use makeArrayRef and None to simplify some code in a tablegen register info file. Additionally const correct a couple static array.

Previously the code added an extra nullptr entry to a static array and then created an ArrayRef with a size one less than the static array. If there were no other entries the array would just contain the nullptr and the ArrayRef would be crated with size 0.

Instead, put the right number of entries in the array and explicitly emit 'None' if the size would be 0. This allows the static array constructor of makeArrayRef to be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248244 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove unnecessary check
Matt Arsenault [Tue, 22 Sep 2015 04:17:45 +0000 (04:17 +0000)]
AMDGPU: Remove unnecessary check

If the instruction doesn't have enough operands, it
either shouldn't be marked as isCommutable or is malformed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248242 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLiveIntervalAnalysis: Factor common code into splitSeparateComponents; NFC
Matthias Braun [Tue, 22 Sep 2015 03:44:41 +0000 (03:44 +0000)]
LiveIntervalAnalysis: Factor common code into splitSeparateComponents; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248241 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-readobj/MachO] Ensure we always have valid CmdName/SegmentName.
Davide Italiano [Tue, 22 Sep 2015 02:14:43 +0000 (02:14 +0000)]
[llvm-readobj/MachO] Ensure we always have valid CmdName/SegmentName.

Otherwise we might end up printing garbage while dumping.

Differential Revision:  http://reviews.llvm.org/D13041

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248239 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove declarations for methods that do not exist.
Matthias Braun [Tue, 22 Sep 2015 01:52:44 +0000 (01:52 +0000)]
Remove declarations for methods that do not exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248238 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix r248164. [-Wdocumentation]
NAKAMURA Takumi [Tue, 22 Sep 2015 01:44:21 +0000 (01:44 +0000)]
Fix r248164. [-Wdocumentation]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248237 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove unused TargetTransformInfo dependency from SafeStack pass.
Evgeniy Stepanov [Tue, 22 Sep 2015 00:44:32 +0000 (00:44 +0000)]
Remove unused TargetTransformInfo dependency from SafeStack pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248233 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LoopUnswitch] Require DominatorTree info.
Michael Zolotukhin [Tue, 22 Sep 2015 00:22:47 +0000 (00:22 +0000)]
[LoopUnswitch] Require DominatorTree info.

We should either require the DT info to be available, or check if it's
available in every place we use DT (and we already miss such check in
one place, which causes failures in some cases). As other loop passes
preserve DT and it's usually available, it makes sense to just require
it here.

There is no regression test, because the bug only shows up if pass
manager decides to clean DT info right before LoopUnswitch. If
loop-unswitch is run separately, DT is available, so bug isn't exposed.

Reviewers: chandlerc, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13036

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248230 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SCEV] Use SaveAndRestore<T> instead of a hand rolled struct; NFCI.
Sanjoy Das [Tue, 22 Sep 2015 00:10:57 +0000 (00:10 +0000)]
[SCEV] Use SaveAndRestore<T> instead of a hand rolled struct; NFCI.

`ClearWalkingBEDominatingCondsOnExit` is exactly `SaveAndRestore<bool>`,
so use `SaveAndRestore<bool>` instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248227 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofunction names should start with a lower case letter; NFC
Sanjay Patel [Mon, 21 Sep 2015 23:03:16 +0000 (23:03 +0000)]
function names should start with a lower case letter; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248224 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agodon't repeat function/variable names in header comments; NFC
Sanjay Patel [Mon, 21 Sep 2015 22:47:23 +0000 (22:47 +0000)]
don't repeat function/variable names in header comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248222 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LICM] Hoist calls to readonly argmemonly functions even with stores in the loop
Philip Reames [Mon, 21 Sep 2015 22:27:59 +0000 (22:27 +0000)]
[LICM] Hoist calls to readonly argmemonly functions even with stores in the loop

We know that an argmemonly function can only access memory pointed to by it's pointer arguments. Rather than needing to consider all possible stores as aliasing (as we do for a readonly function), we can only consider the aliasing of the pointer arguments.

Note that this change only addresses hoisting. I'm thinking about how to address speculation safety as well, but that will be a different change.

FYI, argmemonly disallows accessing memory through non-pointer typed arguments.

Differential Revision: http://reviews.llvm.org/D12771

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248220 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix for pr24866
Philip Reames [Mon, 21 Sep 2015 22:04:10 +0000 (22:04 +0000)]
Fix for pr24866

Turns out that not every basic block is guaranteed to have a node within the DominatorTree.  This is really hard to trigger, but the test case from the PR managed to do so.  There's active discussion continuing about what documentation and/or invariants needed cleaned up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248216 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix UB: can't bind a reference to nullptr (NFC)
Mehdi Amini [Mon, 21 Sep 2015 21:29:43 +0000 (21:29 +0000)]
Fix UB: can't bind a reference to nullptr (NFC)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248213 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoauto and range-for-ify some things to make changing container types a bit easier...
David Blaikie [Mon, 21 Sep 2015 21:07:50 +0000 (21:07 +0000)]
auto and range-for-ify some things to make changing container types a bit easier in the (possibly near) future

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248212 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Improve FMA support for interpolation patterns
Simon Pilgrim [Mon, 21 Sep 2015 20:32:48 +0000 (20:32 +0000)]
[DAGCombiner] Improve FMA support for interpolation patterns

This patch adds support for combining patterns such as (FMUL(FADD(1.0, x), y)) and (FMUL(FSUB(x, 1.0), y)) to their FMA equivalents.

This is useful in particular for linear interpolation cases such as (FADD(FMUL(x, t), FMUL(y, FSUB(1.0, t))))

Differential Revision: http://reviews.llvm.org/D13003

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248210 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Do not scale vext with a factor
Jeroen Ketema [Mon, 21 Sep 2015 20:28:04 +0000 (20:28 +0000)]
[ARM] Do not scale vext with a factor

The vext pseudo-instruction takes the number of elements that need to be
extracted, not the number of bytes. Hence, use the number of elements
directly instead of scaling them with a factor.

Reviewers: Silviu Baranga, James Molloy
(not reflected in the differential revision)

Differential Revision: http://reviews.llvm.org/D12974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248208 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Tidy up FMA combine helpers. NFCI.
Simon Pilgrim [Mon, 21 Sep 2015 20:15:03 +0000 (20:15 +0000)]
[DAGCombiner] Tidy up FMA combine helpers. NFCI.

Based on feedback for D13003.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248206 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LoopUtils,LV] Propagate fast-math flags on generated FCmp instructions
James Molloy [Mon, 21 Sep 2015 19:41:19 +0000 (19:41 +0000)]
[LoopUtils,LV] Propagate fast-math flags on generated FCmp instructions

We're currently losing any fast-math flags when synthesizing fcmps for
min/max reductions. In LV, make sure we copy over the scalar inst's
flags. In LoopUtils, we know we only ever match patterns with
hasUnsafeAlgebra, so apply that to any synthesized ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248201 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove roundingMode argument in APFloat::mod
Stephen Canon [Mon, 21 Sep 2015 19:29:25 +0000 (19:29 +0000)]
Remove roundingMode argument in APFloat::mod

Because mod is always exact, this function should have never taken a rounding mode argument.  The actual implementation still has issues, which I'll look at resolving in a subsequent patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248195 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAvoid SEGFAULT if a requested symbol section is absent.
Rafael Espindola [Mon, 21 Sep 2015 19:17:18 +0000 (19:17 +0000)]
Avoid SEGFAULT if a requested symbol section is absent.

Patch by Igor Kudrin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248194 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix accidentally committed debug printing
Matt Arsenault [Mon, 21 Sep 2015 18:21:10 +0000 (18:21 +0000)]
Fix accidentally committed debug printing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248190 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ADT] Remove a couple of the always inline attributes I added.
Chandler Carruth [Mon, 21 Sep 2015 18:02:24 +0000 (18:02 +0000)]
[ADT] Remove a couple of the always inline attributes I added.

Based on conversations with Justin and a few others, these constructors
are really useful to have in the executable so that you can call them
from the debugger. After some measurements, these *particular* calls
aren't so problematic as to make them a good tradeoff for always inline.

Please let me know if there are other functions really needed for
debugging. The always inline attribute is a hack that we should only
really employ when it doesn't hurt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248188 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DivergenceAnalysis] Separated definition of class into header.
Marcello Maggioni [Mon, 21 Sep 2015 17:58:14 +0000 (17:58 +0000)]
[DivergenceAnalysis] Separated definition of class into header.

The definition of the DivergenceAnalysis pass was in a CPP
file and wasn't accessible to users of the analysis to get it
through "getAnalysis<>()".
This patch extracts the definition into a separate header that
can be used by users of the analysis to fetch the results.

Patch by Volkan Keles (vkeles@apple.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248186 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSelectionDAG: Use InsertNode for EntryNode
Matthias Braun [Mon, 21 Sep 2015 17:41:05 +0000 (17:41 +0000)]
SelectionDAG: Use InsertNode for EntryNode

This fixes problems where two nodes have persistent debug id 0 assigned.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248182 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[FunctionAttrs] Extract a helper function for the core logic used to
Chandler Carruth [Mon, 21 Sep 2015 17:39:41 +0000 (17:39 +0000)]
[FunctionAttrs] Extract a helper function for the core logic used to
evaluate whether 'readonly' or 'readnone' apply to a given function.
This both reduces indentation and will make it easy to share the logic
with a new pass manager implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248181 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SystemZ] Fix expansion of ISD::FPOW and ISD::FSINCOS
Ulrich Weigand [Mon, 21 Sep 2015 17:35:45 +0000 (17:35 +0000)]
[SystemZ] Fix expansion of ISD::FPOW and ISD::FSINCOS

The ISD::FPOW and ISD::FSINCOS opcodes default to Legal, but there
is no legal instruction for those on SystemZ.  This could cause
LLVM internal errors.  Fixed by setting the operation action to
Expand for those opcodes.

Also added test cases for all other LLVM IR intrinsics that should
generate a library call.  (Those already work correctly since the
default operation action is fine.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248180 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"
James Molloy [Mon, 21 Sep 2015 16:35:08 +0000 (16:35 +0000)]
Revert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"

This was committed without the code review (http://reviews.llvm.org/D12937) being approved.

This reverts commit r248152.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248174 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Move copy handling under switch like other instructions
Matt Arsenault [Mon, 21 Sep 2015 16:27:22 +0000 (16:27 +0000)]
AMDGPU: Move copy handling under switch like other instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248172 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoadd ShouldChangeType() variant that takes bitwidths
Sanjay Patel [Mon, 21 Sep 2015 16:09:37 +0000 (16:09 +0000)]
add ShouldChangeType() variant that takes bitwidths

This is more efficient for cases like D12965 where we already have widths.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248170 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDAGCombiner: Replace store of FP constant after attemping store merges
Matt Arsenault [Mon, 21 Sep 2015 15:59:46 +0000 (15:59 +0000)]
DAGCombiner: Replace store of FP constant after attemping store merges

If storing multiple FP constants, some subset of the stores
would be replaced with integers due to visit order, so
MergeConsecutiveStores would only partially merge

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248169 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFactor replacement of stores of FP constants into new function
Matt Arsenault [Mon, 21 Sep 2015 15:59:43 +0000 (15:59 +0000)]
Factor replacement of stores of FP constants into new function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248168 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix missing C++ mode comment
Matt Arsenault [Mon, 21 Sep 2015 15:59:41 +0000 (15:59 +0000)]
Fix missing C++ mode comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248167 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agodon't repeat function names in comments; NFC
Sanjay Patel [Mon, 21 Sep 2015 15:33:26 +0000 (15:33 +0000)]
don't repeat function names in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248166 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Machine Combiner] Refactor machine reassociation code to be target-independent.
Chad Rosier [Mon, 21 Sep 2015 15:09:11 +0000 (15:09 +0000)]
[Machine Combiner] Refactor machine reassociation code to be target-independent.

No functional change intended.
Patch by Haicheng Wu <haicheng@codeaurora.org>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248164 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Artyom Skrobov [Mon, 21 Sep 2015 12:43:10 +0000 (12:43 +0000)]
[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def

Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a
hand-rolled tricky condition block in tools/clang/lib/Basic/Targets.cpp, with
a FIXME: attached.

This patch changes the handling of +t2dsp to be in line with other
architecture extensions.

Following review comments, also updating the description of FeatureDSPThumb2
in ARM.td.

Differential Revision: http://reviews.llvm.org/D12937

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248152 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX512] add masked version for RSQRT14 & RCP14 Scalar FP
Asaf Badouh [Mon, 21 Sep 2015 10:23:53 +0000 (10:23 +0000)]
[X86][AVX512] add masked version for RSQRT14 & RCP14 Scalar FP

Differential Revision: http://reviews.llvm.org/D12524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248147 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Allow constant expressions in second argument of .cpsetup.
Daniel Sanders [Mon, 21 Sep 2015 09:26:55 +0000 (09:26 +0000)]
[mips] Allow constant expressions in second argument of .cpsetup.

Also tightened up the test and made a trivial fix to prevent double-newline
after emitting .cpsetup directives.

Reviewers: vkalintiris

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D12956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248143 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse makeArrayRef or None to avoid unnecessarily mentioning the ArrayRef type extra...
Craig Topper [Mon, 21 Sep 2015 05:32:41 +0000 (05:32 +0000)]
Use makeArrayRef or None to avoid unnecessarily mentioning the ArrayRef type extra times. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248140 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDon't pass StringRefs around by const reference. Pass by value instead per coding...
Craig Topper [Mon, 21 Sep 2015 00:18:00 +0000 (00:18 +0000)]
Don't pass StringRefs around by const reference. Pass by value instead per coding standards. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248136 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCleanup places that passed SMLoc by const reference to pass it by value instead. NFC
Craig Topper [Sun, 20 Sep 2015 23:35:59 +0000 (23:35 +0000)]
Cleanup places that passed SMLoc by const reference to pass it by value instead. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248135 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVars] Use C++11 style field initialization; NFCI.
Sanjoy Das [Sun, 20 Sep 2015 18:42:53 +0000 (18:42 +0000)]
[IndVars] Use C++11 style field initialization; NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248131 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVars] Don't add a level of indentation for namespace {. NFC.
Sanjoy Das [Sun, 20 Sep 2015 18:42:50 +0000 (18:42 +0000)]
[IndVars] Don't add a level of indentation for namespace {. NFC.

Whitespace-only change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248130 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoadd test file ahead of any functional changes for PR22428
Sanjay Patel [Sun, 20 Sep 2015 15:58:00 +0000 (15:58 +0000)]
add test file ahead of any functional changes for PR22428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248123 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Intrinsics builtins test refresh. NFCI
Simon Pilgrim [Sun, 20 Sep 2015 15:41:35 +0000 (15:41 +0000)]
[X86][SSE] Intrinsics builtins test refresh. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248122 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAVX512: Implemented encoding and intrinsics for vcmpss/sd.
Igor Breger [Sun, 20 Sep 2015 15:15:10 +0000 (15:15 +0000)]
AVX512: Implemented encoding and intrinsics for vcmpss/sd.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248121 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX512] extend support in Scalar conversion
Asaf Badouh [Sun, 20 Sep 2015 14:31:19 +0000 (14:31 +0000)]
[X86][AVX512] extend support in Scalar conversion
add scalar FP to Int conversion with truncation intrinsics
add scalar conversion FP32 from/to FP64 intrinsics
add rounding mode and SAE mode encoding for these intrinsics

Differential Revision: http://reviews.llvm.org/D12665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248117 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAVX512: vsqrtss/sd encoding and intrinsics implementation.
Igor Breger [Sun, 20 Sep 2015 09:13:41 +0000 (09:13 +0000)]
AVX512: vsqrtss/sd encoding and intrinsics implementation.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248116 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX512DQ] Add fpclass instruction
Asaf Badouh [Sun, 20 Sep 2015 08:46:07 +0000 (08:46 +0000)]
[X86][AVX512DQ] Add fpclass instruction

Differential Revision: http://reviews.llvm.org/D12931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248115 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] Fix sitofp and uitofp instruction matching failures with long double and avx512
Michael Kuperstein [Sun, 20 Sep 2015 08:12:17 +0000 (08:12 +0000)]
[X86] Fix sitofp and uitofp instruction matching failures with long double and avx512

The operation action for i32 and i64 cannot be set to legal, as long double
needs custom lowering.

Patch by: mitch.l.bodart@intel.com
Differential Revision: http://reviews.llvm.org/D12372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248114 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAVX512: Implemented intrinsics for vshuff32x4, vshuff64x2, vshufi64x2, vshufi32x4
Igor Breger [Sun, 20 Sep 2015 07:18:53 +0000 (07:18 +0000)]
AVX512: Implemented intrinsics for vshuff32x4, vshuff64x2, vshufi64x2, vshufi32x4
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D12525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248113 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVars] Don't repeat function names in comment; NFC.
Sanjoy Das [Sun, 20 Sep 2015 06:58:03 +0000 (06:58 +0000)]
[IndVars] Don't repeat function names in comment; NFC.

Only changes comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248112 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAVX512: Implement instructions encoding, lowering and intrinsics
Igor Breger [Sun, 20 Sep 2015 06:52:42 +0000 (06:52 +0000)]
AVX512: Implement instructions encoding, lowering and intrinsics
   vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.

Differential Revision: http://reviews.llvm.org/D11893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248111 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoARM: cleanup formatting
Saleem Abdulrasool [Sun, 20 Sep 2015 03:19:09 +0000 (03:19 +0000)]
ARM: cleanup formatting

clang-format a line which was poorly formatted.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248110 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVars] Fix a bug in r248045.
Sanjoy Das [Sun, 20 Sep 2015 01:52:18 +0000 (01:52 +0000)]
[IndVars] Fix a bug in r248045.

Because -indvars widens induction variables through arithmetic,
`NeverNegative` cannot be a property of the `WidenIV` (a `WidenIV`
manages information for all transitive uses of an IV being widened,
including uses of `-1 * IV`).  Instead it must live on `NarrowIVDefUse`
which manages information for a specific def-use edge in the transitive
use list of an induction variable.

This change also adds a test case that demonstrates the problem with

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248107 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixup r248096, commit the *correct* test.
Davide Italiano [Sat, 19 Sep 2015 20:52:47 +0000 (20:52 +0000)]
Fixup r248096, commit the *correct* test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248097 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[obj2yaml] Fix "time of check to time of use" bug. Add a test.
Davide Italiano [Sat, 19 Sep 2015 20:49:34 +0000 (20:49 +0000)]
[obj2yaml] Fix "time of check to time of use" bug. Add a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248096 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX2] Use general sext IR for vpmovsx stack folding tests
Simon Pilgrim [Sat, 19 Sep 2015 17:04:18 +0000 (17:04 +0000)]
[X86][AVX2] Use general sext IR for vpmovsx stack folding tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248093 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Vectorize CTTZ + CTTZ_ZERO_UNDEF
Simon Pilgrim [Sat, 19 Sep 2015 13:22:57 +0000 (13:22 +0000)]

Now that we have fast vector CTPOP implementations we can use this to speed up vector CTTZ using the pattern (cttz(x) = ctpop((x & -x) - 1))

Additionally, for AVX512CD that provides lzcnt instructions we can use the pattern (cttz_undef(x) = (width - 1) - ctlz(x & -x))

Differential Revision: http://reviews.llvm.org/D12663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248091 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] Use SimplifyDemandedVectorEltsLow helper function. NFCI.
Simon Pilgrim [Sat, 19 Sep 2015 11:41:53 +0000 (11:41 +0000)]
[InstCombine] Use SimplifyDemandedVectorEltsLow helper function. NFCI.

Use the SimplifyDemandedVectorEltsLow helper function introduced in D12680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248089 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Update LLVM_TEST_DEPENDS not to use macho-dump. It has been unused since...
NAKAMURA Takumi [Sat, 19 Sep 2015 07:19:30 +0000 (07:19 +0000)]
[CMake] Update LLVM_TEST_DEPENDS not to use macho-dump. It has been unused since r247235.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248088 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove dead code
Matt Arsenault [Sat, 19 Sep 2015 06:41:10 +0000 (06:41 +0000)]
AMDGPU: Remove dead code

getCFGStructurizerRegClass is not used for SI, so
move it into R600 specific stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248087 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoNFC: Fix indentation and add braces to clarify nested of else-statement.
Bob Wilson [Sat, 19 Sep 2015 06:20:59 +0000 (06:20 +0000)]
NFC: Fix indentation and add braces to clarify nested of else-statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248086 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PrologEpilogInserter] Minor refactoring.
Maksim Panchenko [Sat, 19 Sep 2015 04:42:15 +0000 (04:42 +0000)]
[PrologEpilogInserter] Minor refactoring.

Differential Revision: http://reviews.llvm.org/D12924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248084 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTest commit. Fix comment. NFC.
Maksim Panchenko [Sat, 19 Sep 2015 04:01:19 +0000 (04:01 +0000)]
Test commit. Fix comment. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248082 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] FoldICmpCstShrCst failed for ashr when comparing against -1
David Majnemer [Sat, 19 Sep 2015 00:48:31 +0000 (00:48 +0000)]
[InstCombine] FoldICmpCstShrCst failed for ashr when comparing against -1

(icmp eq (ashr C1, %V) -1) may have multiple answers if C1 is not a
power of two and has the sign bit set.

This fixes PR24873.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248074 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] FoldICmpCstShrCst didn't handle icmps of -1 in the ashr case correctly
David Majnemer [Sat, 19 Sep 2015 00:48:26 +0000 (00:48 +0000)]
[InstCombine] FoldICmpCstShrCst didn't handle icmps of -1 in the ashr case correctly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248073 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add failing testcase for live interval construction
Matt Arsenault [Sat, 19 Sep 2015 00:03:56 +0000 (00:03 +0000)]
AMDGPU: Add failing testcase for live interval construction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248067 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVars] Widen more comparisons for non-negative induction vars
Sanjoy Das [Fri, 18 Sep 2015 21:21:02 +0000 (21:21 +0000)]
[IndVars] Widen more comparisons for non-negative induction vars

If an induction variable is provably non-negative, its sign extension is
equal to its zero extension.  This means narrow uses like

  icmp slt iNarrow %indvar, %rhs

can be widened into

  icmp slt iWide zext(%indvar), sext(%rhs)

Reviewers: atrick, mcrosier, hfinkel

Subscribers: hfinkel, reames, llvm-commits

Differential Revision: http://reviews.llvm.org/D12745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248045 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix typo and test commit
Luke Larson [Fri, 18 Sep 2015 21:15:45 +0000 (21:15 +0000)]
Fix typo and test commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248042 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoThis code never uses r_addend, so it can just use Elf_Rel.
Rafael Espindola [Fri, 18 Sep 2015 21:12:38 +0000 (21:12 +0000)]
This code never uses r_addend, so it can just use Elf_Rel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248040 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Adding ALWAYS_GENERATE option to symlink utility functions.
Chris Bieneman [Fri, 18 Sep 2015 21:08:32 +0000 (21:08 +0000)]
[CMake] Adding ALWAYS_GENERATE option to symlink utility functions.

This implements the behavior required for clang symlinks which should be always generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248039 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Object/ELF] Change comment to reflect reality.
Davide Italiano [Fri, 18 Sep 2015 20:41:15 +0000 (20:41 +0000)]
[Object/ELF] Change comment to reflect reality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248032 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate edge weights properly when merging blocks in if-conversion.
Cong Hou [Fri, 18 Sep 2015 20:22:41 +0000 (20:22 +0000)]
Update edge weights properly when merging blocks in if-conversion.

In if-conversion, there is a utility function MergeBlocks() that is used to merge blocks. However, when new edges are built in this function the edge weight is either not provided or not updated properly, leading to a modified CFG with incorrect edge weights. This patch corrects this issue.

Differential Revision: http://reviews.llvm.org/D12513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248030 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLimit the range of processors supported by ARM fast isel to v6 or
Eric Christopher [Fri, 18 Sep 2015 20:08:18 +0000 (20:08 +0000)]
Limit the range of processors supported by ARM fast isel to v6 or
later as that's all that is tested right now.

Fixes PR24858.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248027 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove couple of new Bitcode enum vals that snuck in via r247927 (NFC)
Teresa Johnson [Fri, 18 Sep 2015 19:38:53 +0000 (19:38 +0000)]
Remove couple of new Bitcode enum vals that snuck in via r247927 (NFC)

These are meant to be part of the follow on patch I am sending for
review shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248023 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoClean up: Refactoring the hardcoded value of 6 for FindAvailableLoadedValue()'s param...
Larisse Voufo [Fri, 18 Sep 2015 19:14:35 +0000 (19:14 +0000)]
Clean up: Refactoring the hardcoded value of 6 for FindAvailableLoadedValue()'s parameter MaxInstsToScan. (Complete version of r247497. See D12886)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248022 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMake MachineScheduler debug output less confusing.
James Y Knight [Fri, 18 Sep 2015 18:52:20 +0000 (18:52 +0000)]
Make MachineScheduler debug output less confusing.

At least...a little bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248020 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoScaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled...
Cong Hou [Fri, 18 Sep 2015 18:19:40 +0000 (18:19 +0000)]
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.

In ARMBaseInstrInfo::isProfitableToIfCvt(), there is a simple cost model in which the number of cycles is scaled by a probability to estimate the cost. However, when the number of cycles is small (which is usually the case), there is a precision issue after the computation. To avoid this issue, this patch scales those cycles by 1024 (chosen to make the multiplication a litter faster) before they are scaled by the probability. Other variables are also scaled up for the final comparison.

Differential Revision: http://reviews.llvm.org/D12742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248018 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSelectionDAGDumper: Leave out the <multiple use> markers
Matthias Braun [Fri, 18 Sep 2015 17:57:33 +0000 (17:57 +0000)]
SelectionDAGDumper: Leave out the <multiple use> markers

They mostly clutter the output while it is still possible to see which
node has multiple users without them.

Differential Revision: http://reviews.llvm.org/D12569

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248013 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSelectionDAGDumper: Avoid unnecessary newlines
Matthias Braun [Fri, 18 Sep 2015 17:57:31 +0000 (17:57 +0000)]
SelectionDAGDumper: Avoid unnecessary newlines

  t0 = EntryToken:ch

    t0: <multiple use>
        t0: <multiple use>
      t1 = CopyFromReg:v4f32,ch t0, Register:v4f32  %vreg0

      t25 = IMPLICIT_DEF:v4f32

    t26 = HADDPSrr:v4f32 t1, t25

  t23 = CopyToReg:ch,glue t0, Register:v4f32  %XMM0, t26

    t23: <multiple use>
    t23: <multiple use>
  t24 = RETQ:ch Register:v4f32  %XMM0, t23, t23:1

    t0: <multiple use>
        t0: <multiple use>
      t1 = CopyFromReg:v4f32,ch t0, Register:v4f32  %vreg0
    t26 = X86ISD::FHADD:v4f32 t1, undef:v4f32
  t23 = CopyToReg:ch,glue t0, Register:v4f32  %XMM0, t26
    t23: <multiple use>
    t21 = TargetConstant:i16<0>
    t23: <multiple use>
  t24 = X86ISD::RET_FLAG:ch t23, t21, Register:v4f32  %XMM0, t23:1

Differential Revision: http://reviews.llvm.org/D12568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248012 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSelectionDAGDumper: Hide [ID=X], [ORD=X] and source locations by default.
Matthias Braun [Fri, 18 Sep 2015 17:57:28 +0000 (17:57 +0000)]
SelectionDAGDumper: Hide [ID=X], [ORD=X] and source locations by default.

You can show them with the new -dag-dump-verbose switch.

Differential Revision: http://reviews.llvm.org/D12566

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248011 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSelectionDAG: Introduce PersistentID to SDNode for assert builds.
Matthias Braun [Fri, 18 Sep 2015 17:41:00 +0000 (17:41 +0000)]
SelectionDAG: Introduce PersistentID to SDNode for assert builds.

This gives us more human readable numbers to identify nodes in debug

  0x7fcbd9700160: ch = EntryToken

  0x7fcbd985c7c8: i64 = Register %RAX


      0x7fcbd9700160: <multiple use>
    0x7fcbd985c578: i64,ch = MOV64rm 0x7fcbd985c6a0, 0x7fcbd985cc68, 0x7fcbd985c200, 0x7fcbd985cd90, 0x7fcbd985ceb8, 0x7fcbd9700160<Mem:LD8[@foo]> [ORD=2]

  0x7fcbd985c8f0: ch,glue = CopyToReg 0x7fcbd9700160, 0x7fcbd985c7c8, 0x7fcbd985c578 [ORD=3]

    0x7fcbd985c7c8: <multiple use>
    0x7fcbd985c8f0: <multiple use>
    0x7fcbd985c8f0: <multiple use>
  0x7fcbd985ca18: ch = RETQ 0x7fcbd985c7c8, 0x7fcbd985c8f0, 0x7fcbd985c8f0:1 [ORD=3]

  t0: ch = EntryToken

  t5: i64 = Register %RAX


      t0: <multiple use>
    t3: i64,ch = MOV64rm t10, t12, t11, t13, t14, t0<Mem:LD8[@foo]> [ORD=2]

  t6: ch,glue = CopyToReg t0, t5, t3 [ORD=3]

    t5: <multiple use>
    t6: <multiple use>
    t6: <multiple use>
  t7: ch = RETQ t5, t6, t6:1 [ORD=3]

Differential Revision: http://reviews.llvm.org/D12564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248010 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] More cleanup of installing symlinks.
Chris Bieneman [Fri, 18 Sep 2015 17:39:58 +0000 (17:39 +0000)]
[CMake] More cleanup of installing symlinks.

In order to support building clang out-of-tree the install_symlink script needs to be installed, and it needs to be found by searching the CMAKE_MODULE_PATH.

This change renames install_symlink -> LLVMInstallSymlink so it doesn't conflict with naming from other projects, and adds searching behavior in AddLLVM.cmake

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248009 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Improved bitfield instruction selection.
Geoff Berry [Fri, 18 Sep 2015 17:11:53 +0000 (17:11 +0000)]
[AArch64] Improved bitfield instruction selection.

For bitfield insert OR matching, check both operands for larger pattern
first before checking for smaller pattern.

Add pattern for unsigned bitfield insert-in-zero done with SHL+AND.

Resolves PR21631.

Reviewers: jmolloy, t.p.northover

Subscribers: aemerson, rengolin, llvm-commits, mcrosier

Differential Revision: http://reviews.llvm.org/D12908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248006 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove temporary file on signal.
Rafael Espindola [Fri, 18 Sep 2015 15:17:53 +0000 (15:17 +0000)]
Remove temporary file on signal.

Without this lld leaves temporary files behind when it crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247994 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSimplify SmallBitVector::applyMask by consolidating common code for 32- and 64-bit...
Yaron Keren [Fri, 18 Sep 2015 15:08:24 +0000 (15:08 +0000)]
Simplify SmallBitVector::applyMask by consolidating common code for 32- and 64-bit builds
and assert when mask is too large to apply in the small case,
previously the extra words were silently ignored.
clang-format the entire function to match current code standards.

This is a rewrite of r247972 which was reverted in r247983 due to
warning and possible UB on 32-bits hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247993 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.
Daniel Sanders [Fri, 18 Sep 2015 14:20:54 +0000 (14:20 +0000)]
[mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.

Some values of 'reglist' are reserved and cause the disassembler to read past
the end of the Regs array. Treat lwm32's containing reserved values as invalid

Reviewers: zoran.jovanovic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247990 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Reorder cases to improve readability. NFC.
Chad Rosier [Fri, 18 Sep 2015 14:15:19 +0000 (14:15 +0000)]
[AArch64] Reorder cases to improve readability. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247989 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Remove some redundant cases. NFC.
Chad Rosier [Fri, 18 Sep 2015 14:13:18 +0000 (14:13 +0000)]
[AArch64] Remove some redundant cases. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247988 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSilencing a -Wsign-compare warning; NFC.
Aaron Ballman [Fri, 18 Sep 2015 13:31:42 +0000 (13:31 +0000)]
Silencing a -Wsign-compare warning; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247986 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LazyValueInfo] Report nonnull range for nonnull pointers
Igor Laevsky [Fri, 18 Sep 2015 13:01:48 +0000 (13:01 +0000)]
[LazyValueInfo] Report nonnull range for nonnull pointers

Currently LazyValueInfo will report only alloca's as having nonnull range.
For loads with !nonnull metadata it will bailout with no additional information.
Same is true for calls returning nonnull pointers.

This change extends LazyValueInfo to handle additional nonnull instructions.

Differential Revision: http://reviews.llvm.org/D12932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247985 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSupport align attribute for return values
Artur Pilipenko [Fri, 18 Sep 2015 12:33:31 +0000 (12:33 +0000)]
Support align attribute for return values

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D12844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247984 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReverting r247972 (and subordinate commit r247972) as the 32-bit left-shift is undefi...
Aaron Ballman [Fri, 18 Sep 2015 12:18:41 +0000 (12:18 +0000)]
Reverting r247972 (and subordinate commit r247972) as the 32-bit left-shift is undefined behavior on implementations where uinptr_t is 32-bits. One such platform is Windows, MSVC, x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247983 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoNit cleanup in LangRef about dereferenceable metadata
Artur Pilipenko [Fri, 18 Sep 2015 12:07:10 +0000 (12:07 +0000)]
Nit cleanup in LangRef about dereferenceable metadata

Reviewed By: vsk

Differential Revision: http://reviews.llvm.org/D12847

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247982 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Support] Reapply r245289 "Always wait for GraphViz before opening the viewer"
Michael Kruse [Fri, 18 Sep 2015 10:56:30 +0000 (10:56 +0000)]
[Support] Reapply r245289 "Always wait for GraphViz before opening the viewer"

The change was accidentally undone by r245290.

Original log message:
When calling DisplayGraph and a PS viewer is chosen, two programs are executed: The GraphViz generator and the PostScript viewer. Always wait for the generator to finish to ensure that the .ps file is written before opening the viewer for that file. DisplayGraph's wait parameter refers to whether to wait until the user closes the viewer.

This happened on Windows and if none of the options to open the .dot file directly applies, also on Linux.

Differential Revision: http://reviews.llvm.org/D11876

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247980 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-mc-fuzzer] Document llvm-mc-fuzzer in LibFuzzer.rst.
Daniel Sanders [Fri, 18 Sep 2015 10:47:45 +0000 (10:47 +0000)]
[llvm-mc-fuzzer] Document llvm-mc-fuzzer in LibFuzzer.rst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247979 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WinEH] Moved funclet pads should be in relative order
David Majnemer [Fri, 18 Sep 2015 08:18:07 +0000 (08:18 +0000)]
[WinEH] Moved funclet pads should be in relative order

We shifted the MachineBasicBlocks to the end of the MachineFunction in
DFS order.  This will not ensure that MachineBasicBlocks which fell
through to one another will remain contiguous.  Instead, implement
a stable sort algorithm for iplist.

This partially reverts commit r214150.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247978 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix BitVectorTest on 32-bit hosts after r247972.
Yaron Keren [Fri, 18 Sep 2015 07:24:35 +0000 (07:24 +0000)]
Fix BitVectorTest on 32-bit hosts after r247972.
We can't apply two words of 32-bit mask in the small case
where the internal storage is just one 32-bit word.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247974 91177308-0d34-0410-b5e6-96231b3b80d8