oota-llvm.git
7 years agoAllow Optionals to be compared to None
David Blaikie [Wed, 19 Aug 2015 23:07:27 +0000 (23:07 +0000)]
Allow Optionals to be compared to None

This is something like nullopt in std::experimental::optional. Optional
could already be constructed from None, so this seems like an obvious
extension from there.

I have a use in a future patch for Clang, though it may not go that
way/end up used - so this seemed worth committing now regardless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245518 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Kaleidoscope-Ch2: Don't pass -Wno-unused-private-field unconditionally.
NAKAMURA Takumi [Wed, 19 Aug 2015 22:55:16 +0000 (22:55 +0000)]
[CMake] Kaleidoscope-Ch2: Don't pass -Wno-unused-private-field unconditionally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245516 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for scalar double-precision min/max
Sanjay Patel [Wed, 19 Aug 2015 21:27:27 +0000 (21:27 +0000)]
[x86] enable machine combiner reassociations for scalar double-precision min/max

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245506 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for scalar single-precision maximums
Sanjay Patel [Wed, 19 Aug 2015 21:18:46 +0000 (21:18 +0000)]
[x86] enable machine combiner reassociations for scalar single-precision maximums

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245504 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Added SMAX/SMIN/UMAX/UMIN constant folding
Simon Pilgrim [Wed, 19 Aug 2015 21:11:58 +0000 (21:11 +0000)]
[DAGCombiner] Added SMAX/SMIN/UMAX/UMIN constant folding

We still need to add constant folding of vector comparisons to fold the tests for targets that don't support the respective min/max nodes

I needed to update 2011-12-06-AVXVectorExtractCombine to load a vector instead of using a constant vector to prevent it folding

Differential Revision: http://reviews.llvm.org/D12118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245503 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][FastISel] Don't fold shifts with UB.
Juergen Ributzka [Wed, 19 Aug 2015 20:52:55 +0000 (20:52 +0000)]
[AArch64][FastISel] Don't fold shifts with UB.

We are already falling back to SelectionDAG when encountering an shift with UB.
This adds the same checks for shifts with UB that get folded into arithmetic or
logical operations.

This fixes rdar://problem/22345295.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245499 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Emit more efficient >= comparisons against 0
David Majnemer [Wed, 19 Aug 2015 20:51:40 +0000 (20:51 +0000)]
[X86] Emit more efficient >= comparisons against 0

We don't do a great job with >= 0 comparisons against zero when the
result is used as an i8.

Given something like:
  void f(long long LL, bool *B) {
    *B = LL >= 0;
  }

We used to generate:
  shrq    $63, %rdi
  xorb    $1, %dil
  movb    %dil, (%rsi)

Now we generate:
  testq   %rdi, %rdi
  setns   (%rsi)

Differential Revision: http://reviews.llvm.org/D12136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245498 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Use the default alignment for SIMD types.
Dan Gohman [Wed, 19 Aug 2015 20:30:20 +0000 (20:30 +0000)]
[WebAssembly] Use the default alignment for SIMD types.

Previously WebAssembly's datalayout string had -v128:8:128. This had been an
attempt to declare a certain level of support for unaligned SIMD accesses.
However, clang makes its own determinations for SIMD alignment that are
independent of the datalayout string, so this wasn't actually meaningful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245494 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Fold CONCAT_VECTORS of EXTRACT_SUBVECTOR (or undef) to VECTOR_SHUFFLE.
Simon Pilgrim [Wed, 19 Aug 2015 20:09:50 +0000 (20:09 +0000)]
[DAGCombiner] Fold CONCAT_VECTORS of EXTRACT_SUBVECTOR (or undef) to VECTOR_SHUFFLE.

Check to see if this is a CONCAT_VECTORS of a bunch of EXTRACT_SUBVECTOR operations. If so, and if the EXTRACT_SUBVECTOR vector inputs come from at most two distinct vectors the same size as the result, attempt to turn this into a legal shuffle.

Differential Revision: http://reviews.llvm.org/D12125

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245490 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReplace some calls to isa<LandingPadInst> with isEHPad()
David Majnemer [Wed, 19 Aug 2015 19:54:02 +0000 (19:54 +0000)]
Replace some calls to isa<LandingPadInst> with isEHPad()

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245487 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMinor tidying of regex in a test
Paul Robinson [Wed, 19 Aug 2015 19:36:35 +0000 (19:36 +0000)]
Minor tidying of regex in a test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245486 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Sparc]: asm-only support for the ldstub instruction.
Douglas Katzman [Wed, 19 Aug 2015 19:30:57 +0000 (19:30 +0000)]
[Sparc]: asm-only support for the ldstub instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245485 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Rename 'MachineOperandWithLocation' to 'ParsedMachineOperand'. NFC.
Alex Lorenz [Wed, 19 Aug 2015 19:19:16 +0000 (19:19 +0000)]
MIR Parser: Rename 'MachineOperandWithLocation' to 'ParsedMachineOperand'. NFC.

Besides storing the operand's source range, this structure now stores other
attributes as well, so the name should reflect this fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245483 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize instruction's register ties.
Alex Lorenz [Wed, 19 Aug 2015 19:05:34 +0000 (19:05 +0000)]
MIR Serialization: Serialize instruction's register ties.

This commit serializes the machine instruction's register operand ties.
The ties are printed out only when the instructon has register ties that are
different from the ties that are specified in the instruction's description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245482 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTemporary fix for the self-host failures introduced by rL244921.
Nemanja Ivanovic [Wed, 19 Aug 2015 19:04:47 +0000 (19:04 +0000)]
Temporary fix for the self-host failures introduced by rL244921.

This revision has introduced an issue that only affects bootstrapped compiler
when it is printing the ASM. I am working on resolving the issue, but in the
meantime, I'm disabling the legalization of scalar_to_vector operation for v2i64
and the associated testing until I can get this fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245481 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize defined registers that require 'def' register flag.
Alex Lorenz [Wed, 19 Aug 2015 18:55:47 +0000 (18:55 +0000)]
MIR Serialization: Serialize defined registers that require 'def' register flag.

The defined registers are already serialized - they are represented by placing
them before the '=' in a machine instruction. However, certain instructions like
INLINEASM can have defined register operands after the '=', so this commit
introduces the 'def' register flag for such operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245480 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PeepholeOptimizer] Look through PHIs to find additional register sources
Bruno Cardoso Lopes [Wed, 19 Aug 2015 18:53:36 +0000 (18:53 +0000)]
[PeepholeOptimizer] Look through PHIs to find additional register sources

Reintroduce r245442. Remove an overly conservative assertion introduced
in r245442. We could replace the assertion to use `shareSameRegisterFile`
instead, but in that point in `insertPHI` we already lost the original
Def subreg to check against. So drop the assertion completely.

Original commit message:

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245479 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SPARC] Enable writing to floating-point-state register.
Douglas Katzman [Wed, 19 Aug 2015 18:34:48 +0000 (18:34 +0000)]
[SPARC] Enable writing to floating-point-state register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245475 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Kaleidoscope] More inter-chapter diff reduction.
Lang Hames [Wed, 19 Aug 2015 18:32:58 +0000 (18:32 +0000)]
[Kaleidoscope] More inter-chapter diff reduction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245474 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[docs] Fix minor typo in CodingStandards.rst
Vedant Kumar [Wed, 19 Aug 2015 18:19:12 +0000 (18:19 +0000)]
[docs] Fix minor typo in CodingStandards.rst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245473 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Kaleidoscope] Clang-format the Kaleidoscope tutorials.
Lang Hames [Wed, 19 Aug 2015 18:15:58 +0000 (18:15 +0000)]
[Kaleidoscope] Clang-format the Kaleidoscope tutorials.

Also reduces changes between tutorial chapters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245472 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Improve short-form diags on long-form Match_InvalidOperand.
Ahmed Bougacha [Wed, 19 Aug 2015 17:40:19 +0000 (17:40 +0000)]
[AArch64] Improve short-form diags on long-form Match_InvalidOperand.

Since r244955, we try to use the short-form ErrorInfo when both
tries failed, and the long-form match failed on a suffix operand.
However, this means we sometimes mix ErrorInfo and MatchResult
(one manifestation of this being PR24498). Instead, restore both.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245469 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Fix GCC 4.8.0 ICE in lambda function
Hal Finkel [Wed, 19 Aug 2015 17:26:07 +0000 (17:26 +0000)]
[SCEV] Fix GCC 4.8.0 ICE in lambda function

Rewrite some code to not use a lambda function. The non-lambda code is just
about as clean as the original, and not any longer. The lambda function causes
an internal compiler error in GCC 4.8.0, and it is not worth breaking support
for that compiler over this. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245466 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LAA] Comment how memchecks are codegened
Adam Nemet [Wed, 19 Aug 2015 17:24:36 +0000 (17:24 +0000)]
[LAA] Comment how memchecks are codegened

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245465 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[AArch64] Simplify/refactor code to ease code review. NFC."
Renato Golin [Wed, 19 Aug 2015 16:29:53 +0000 (16:29 +0000)]
Revert "[AArch64] Simplify/refactor code to ease code review. NFC."

This reverts commit r245443, as it broke AArch64 test-suite tramp3d
with an assert "Reg && "Null register has no regunits".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245455 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agox32. Fixes a bug in x32 exception handling.
Derek Schuff [Wed, 19 Aug 2015 16:28:21 +0000 (16:28 +0000)]
x32. Fixes a bug in x32 exception handling.

This patch updates the X86 lowering so that the Exception Pointer and Selector
are 64-bit wide only if Subtarget.isTarget64BitLP64.

Patch by João Porto

Reviewers: dschuff, rnk
Differential Revision: http://reviews.llvm.org/D12111

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245454 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agox32. Fixes jmp %reg in x32
JF Bastien [Wed, 19 Aug 2015 16:17:08 +0000 (16:17 +0000)]
x32. Fixes jmp %reg in x32

x32 has 32-bit pointers; x86-64 can't jmp %r32. This patch addresses this issue by explicitly zero-extending brind's target to 64-bits.

Author: jpp

Reviewers: jfb, dschuff, pavel.v.chupin

Subscribers: llvm-commits

Differential revision: http://reviews.llvm.org/D12112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245452 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Sparc] Rename LoadASR and StoreASR from r245360 to *ASI, as was intended.
James Y Knight [Wed, 19 Aug 2015 15:59:49 +0000 (15:59 +0000)]
[Sparc] Rename LoadASR and StoreASR from r245360 to *ASI, as was intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245450 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Bruno Cardoso Lopes [Wed, 19 Aug 2015 15:10:32 +0000 (15:10 +0000)]
Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"

Revert r245442 while investigating a fix. An assertion hit in
http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/11380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245446 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SPARC] Fix BooleanContents, so that select of a trunc doesn't
James Y Knight [Wed, 19 Aug 2015 14:47:04 +0000 (14:47 +0000)]
[SPARC] Fix BooleanContents, so that select of a trunc doesn't
eliminate the trunc.

Differential Revision: http://reviews.llvm.org/D10442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245444 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Simplify/refactor code to ease code review. NFC.
Chad Rosier [Wed, 19 Aug 2015 14:34:54 +0000 (14:34 +0000)]
[AArch64] Simplify/refactor code to ease code review. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245443 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PeepholeOptimizer] Look through PHIs to find additional register sources
Bruno Cardoso Lopes [Wed, 19 Aug 2015 14:34:41 +0000 (14:34 +0000)]
[PeepholeOptimizer] Look through PHIs to find additional register sources

Reapply r243486.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245442 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Add instruction selection patterns for vmin/vmax
Silviu Baranga [Wed, 19 Aug 2015 14:11:27 +0000 (14:11 +0000)]
[ARM] Add instruction selection patterns for vmin/vmax

Summary:
The mid-end was generating vector smin/smax/umin/umax nodes, but
we were using vbsl to generatate the code. This adds the vmin/vmax
patterns and a test to check that we are now generating vmin/vmax
instructions.

Reviewers: rengolin, jmolloy

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D12105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245439 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMap %fprs to %asr6 in the Sparc assembler parser.
Joerg Sonnenberger [Wed, 19 Aug 2015 13:55:14 +0000 (13:55 +0000)]
Map %fprs to %asr6 in the Sparc assembler parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245437 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEmit <regmask R1 R2 R3 ...> instead of just <regmask> in IR dumps.
Daniel Sanders [Wed, 19 Aug 2015 12:03:04 +0000 (12:03 +0000)]
Emit <regmask R1 R2 R3 ...> instead of just <regmask> in IR dumps.

Reviewers: qcolombet

Subscribers: kparzysz, qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D11644

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245433 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[X86] Widen the 'AND' mask if doing so shrinks the encoding size"
Tobias Grosser [Wed, 19 Aug 2015 11:35:10 +0000 (11:35 +0000)]
Revert "[X86] Widen the 'AND' mask if doing so shrinks the encoding size"

This reverts commit 245169 which miscompiles MultiSource/Applications/siod
from LNT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245432 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for...
Michael Kuperstein [Wed, 19 Aug 2015 11:21:43 +0000 (11:21 +0000)]
[X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize

There are some cases where the mul sequence is smaller, but for the most part,
using a div is preferable. This does not apply to vectors, since x86 doesn't
have vector idiv, and a vector mul/shifts sequence ought to be smaller than a
scalarized division.

Differential Revision: http://reviews.llvm.org/D12082

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245431 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TLI] Refactor "is integer division cheap" queries.
Michael Kuperstein [Wed, 19 Aug 2015 11:17:59 +0000 (11:17 +0000)]
[TLI] Refactor "is integer division cheap" queries.

This removes the isPow2SDivCheap() query, as it is not currently used in
any meaningful way. isIntDivCheap() no longer relies on a state variable
(as all in-tree target set it to false), but the interface allows querying
based on the type optimization level.

NFC.

Differential Revision: http://reviews.llvm.org/D12082

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245430 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove an empty directory left after r245318.
Alexander Kornienko [Wed, 19 Aug 2015 09:00:21 +0000 (09:00 +0000)]
Remove an empty directory left after r245318.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245426 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMore clean up, still NFC. Remove dead variables now that the casts are gone.
Nick Lewycky [Wed, 19 Aug 2015 06:25:30 +0000 (06:25 +0000)]
More clean up, still NFC. Remove dead variables now that the casts are gone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245420 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoClean up this file a little. Remove dead casts, casting Values to Values. Adjust...
Nick Lewycky [Wed, 19 Aug 2015 06:22:33 +0000 (06:22 +0000)]
Clean up this file a little. Remove dead casts, casting Values to Values. Adjust some comments for typos and whitespace. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245419 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExposed findDefsUsedOutsideOfLoop as a loop utility function
Ashutosh Nema [Wed, 19 Aug 2015 05:40:42 +0000 (05:40 +0000)]
Exposed findDefsUsedOutsideOfLoop as a loop utility function

Exposed findDefsUsedOutsideOfLoop as a loop utility function by moving
it from LoopDistribute to LoopUtils.

Reviewed By: anemet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245416 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LPM] Teach the legacy pass manager to support *using* an analysis
Chandler Carruth [Wed, 19 Aug 2015 03:02:12 +0000 (03:02 +0000)]
[LPM] Teach the legacy pass manager to support *using* an analysis
without *requiring* it.

This allows a pass indicate that it will use an analysis if available
(through getAnalysisIfAvailable). When the pass manager knows this, it
will refrain from deleting that analysis if it can. Naturally, it will
still get invalidated at the correct time. These passes are not
considered when scheduling the pass pipeline, so typically they will
require manual scheduling, but this may also allow passes with
getAnalysisIfAvailable to find the analysis more often if nothing after
them requires that analysis and it wasn't invalidated.

I don't have a particular use case with the current passes, but with my
new structure for alias analyses, this will be very useful. We want to
allow people to customize the set of AAs available by scheduling
additional passes. These's aren't ever *required* for obvious reasons.
So we need some way to mark in the legacy pass manager that they will
still be used if available.

This is essentially how analysis groups already work. But this makes the
feature generally available and more explicit. It should allow the AA
change to not impact how people trigger a custom alias analysis being
available at a certain point in compilation.

Differential Revision: http://reviews.llvm.org/D12114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245409 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix how DependenceAnalysis calls delinearization
Hal Finkel [Wed, 19 Aug 2015 02:56:36 +0000 (02:56 +0000)]
Fix how DependenceAnalysis calls delinearization

Fix how DependenceAnalysis calls delinearization, mirroring what is done in
Delinearization.cpp (mostly by making sure to call getSCEVAtScope before
delinearizing, and by removing the unnecessary 'Pairs == 1' check).

Patch by Vaivaswatha Nagaraj!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245408 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Fix PR24469 resulting from r245025 and re-enable dead store elimination acros...
Eric Christopher [Wed, 19 Aug 2015 02:15:13 +0000 (02:15 +0000)]
Revert "Fix PR24469 resulting from r245025 and re-enable dead store elimination across basicblocks."

This is causing bootstrap problems, e.g.: http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/2960

This reverts r245195.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245402 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake ScalarEvolution::isKnownPredicate a little smarter
Hal Finkel [Wed, 19 Aug 2015 01:51:51 +0000 (01:51 +0000)]
Make ScalarEvolution::isKnownPredicate a little smarter

Here we make ScalarEvolution::isKnownPredicate, indirectly, a little smarter.
Given some relational comparison operator OP, and two AddRec SCEVs, {I,+,S} OP
{J,+,T}, we can reduce this to the comparison I OP J when S == T, both AddRecs
are for the same loop, and both are known not to wrap.

As it turns out, because of the way that backedge-guard expressions can be
leveraged when computing known predicates, this allows indvars to simplify the
if-statement comparison in this loop:

  void foo (int *a, int *b, int n) {
    for (int i = 0; i < n; ++i) {
      if (i > n)
        a[i] = b[i] + 1;
    }
  }

which, somewhat surprisingly, we were not previously optimizing away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245400 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSplit ARM and AArch64 emutls.ll test
Chih-Hung Hsieh [Wed, 19 Aug 2015 01:44:51 +0000 (01:44 +0000)]
Split ARM and AArch64 emutls.ll test

Differential Revision: http://reviews.llvm.org/D12127

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245399 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize MMI's variable debug information.
Alex Lorenz [Wed, 19 Aug 2015 00:13:25 +0000 (00:13 +0000)]
MIR Serialization: Serialize MMI's variable debug information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245396 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BasicAA] Add a test for PR24468 to be sure we won't regress
Quentin Colombet [Wed, 19 Aug 2015 00:08:26 +0000 (00:08 +0000)]
[BasicAA] Add a test for PR24468 to be sure we won't regress
when we finally get the GEP aliasing right.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245395 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BasicAA] Revert r221876 because it can produce incorrect aliasing
Quentin Colombet [Wed, 19 Aug 2015 00:07:20 +0000 (00:07 +0000)]
[BasicAA] Revert r221876 because it can produce incorrect aliasing
information: see PR24468.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245394 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix backward operands in call to isTruncateFree() and improve comments.
Steve King [Tue, 18 Aug 2015 23:02:41 +0000 (23:02 +0000)]
Fix backward operands in call to isTruncateFree() and improve comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245385 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Return true on error when parsing standalone registers.
Alex Lorenz [Tue, 18 Aug 2015 22:57:36 +0000 (22:57 +0000)]
MIR Parser: Return true on error when parsing standalone registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245384 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the operand's bit mask target flags.
Alex Lorenz [Tue, 18 Aug 2015 22:52:15 +0000 (22:52 +0000)]
MIR Serialization: Serialize the operand's bit mask target flags.

This commit adds support for bit mask target flag serialization to the MIR
printer and the MIR parser. It also adds support for the machine operand's
target flag serialization to the AArch64 target.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245383 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse TLI.allowsMemoryAccess() to check if memory accesses are fast; NFCI
Sanjay Patel [Tue, 18 Aug 2015 22:48:12 +0000 (22:48 +0000)]
use TLI.allowsMemoryAccess() to check if memory accesses are fast; NFCI

This consolidates use of isUnalignedMem32Slow() in one place.
There is a slight change in logic although I'm not sure that it would ever
come up in the real world: we were assuming that an alignment of the type
size is always fast; now, we actually check the data layout to confirm that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245382 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix three typos in comments; "easilly" -> "easily".
Nick Lewycky [Tue, 18 Aug 2015 22:41:58 +0000 (22:41 +0000)]
Fix three typos in comments; "easilly" -> "easily".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245379 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSupport: Clean up TSan annotations.
Peter Collingbourne [Tue, 18 Aug 2015 22:31:24 +0000 (22:31 +0000)]
Support: Clean up TSan annotations.

Remove support for Valgrind-based TSan, which hasn't been maintained for a
few years. We now use the TSan annotations only if LLVM is compiled with
-fsanitize=thread. We no longer need the weak function definitions as we
are guaranteed that our program is linked directly with the TSan runtime.

Differential Revision: http://reviews.llvm.org/D12121

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245374 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the frame information's stack protector index.
Alex Lorenz [Tue, 18 Aug 2015 22:26:26 +0000 (22:26 +0000)]
MIR Serialization: Serialize the frame information's stack protector index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245372 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Extract the code that parses stack object references into a new
Alex Lorenz [Tue, 18 Aug 2015 22:18:52 +0000 (22:18 +0000)]
MIR Parser: Extract the code that parses stack object references into a new
method.

This commit extracts the code that parses the stack object references into a
new method named 'parseStackFrameIndex', so that it can be reused when
parsing standalone stack object references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245370 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Remove unused variable
David Majnemer [Tue, 18 Aug 2015 22:18:22 +0000 (22:18 +0000)]
[InstSimplify] Remove unused variable

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245369 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Don't assume getAggregateElement will succeed
David Majnemer [Tue, 18 Aug 2015 22:07:25 +0000 (22:07 +0000)]
[InstSimplify] Don't assume getAggregateElement will succeed

It isn't always possible to get a value from getAggregateElement.
This fixes PR24488.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[VectorUtils] Replace 'llvm::' qualification with 'using llvm'
David Majnemer [Tue, 18 Aug 2015 22:07:20 +0000 (22:07 +0000)]
[VectorUtils] Replace 'llvm::' qualification with 'using llvm'

No funcitonal change is intended, this just makes the file look more
like the rest of LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245364 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLoad/store instructions for floating points with address space require SparcV9.
Joerg Sonnenberger [Tue, 18 Aug 2015 21:31:46 +0000 (21:31 +0000)]
Load/store instructions for floating points with address space require SparcV9.

To properly handle this, define the *a instructions as separate
instruction classes by refactoring the LoadA and StoreA multiclasses.
Move the instruction tests into the sparcv9 file to test the difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245360 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Refreshed sign extension tests.
Simon Pilgrim [Tue, 18 Aug 2015 21:21:35 +0000 (21:21 +0000)]
[X86] Refreshed sign extension tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245358 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRelease script: correctly symlink clang-tools-extra into the build (PR22765)
Hans Wennborg [Tue, 18 Aug 2015 21:10:17 +0000 (21:10 +0000)]
Release script: correctly symlink clang-tools-extra into the build (PR22765)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245355 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Added shuffle concatenation tests
Simon Pilgrim [Tue, 18 Aug 2015 20:51:15 +0000 (20:51 +0000)]
[X86][AVX] Added shuffle concatenation tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDAGCombiner: Improve DAGCombiner select normalization
Matthias Braun [Tue, 18 Aug 2015 20:48:36 +0000 (20:48 +0000)]
DAGCombiner: Improve DAGCombiner select normalization

The current code normalizes select(C0, x, select(C1, x, y)) towards
select(C0|C1, x, y) if the targets prefers that form. This patch adds an
additional rule that if the select(C1, x, y) part already exists in the
function then we want to normalize into the other direction because the
effects of reusing the existing value are bigger than transforming into
the target preferred form.

This addresses regressions following r238793, see also:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150727/290272.html

Differential Revision: http://reviews.llvm.org/D11616

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245350 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDAGCombiner: Optimize SELECTs first before turning them into SELECT_CC
Matthias Braun [Tue, 18 Aug 2015 20:48:29 +0000 (20:48 +0000)]
DAGCombiner: Optimize SELECTs first before turning them into SELECT_CC

This is part of http://reviews.llvm.org/D11616 - I just decided to split
this up into a separate commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245349 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdated constants to give more useful min/max constant folding tests
Simon Pilgrim [Tue, 18 Aug 2015 20:46:48 +0000 (20:46 +0000)]
Updated constants to give more useful min/max constant folding tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245348 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Add using declarations to avoid hiding virtual overloads.
Chandler Carruth [Tue, 18 Aug 2015 20:28:40 +0000 (20:28 +0000)]
[PM/AA] Add using declarations to avoid hiding virtual overloads.

Note that this actually has no functional change -- we never call these
methods using the derived type. But it is still cleaner and fixes a GCC
warning.

Spotted by Dave in code review and the warning spotted by Joerg on IRC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WinEH] Calculate state numbers for the new EH representation
David Majnemer [Tue, 18 Aug 2015 19:07:12 +0000 (19:07 +0000)]
[WinEH] Calculate state numbers for the new EH representation

State numbers are calculated by performing a walk from the innermost
funclet to the outermost funclet.   Rudimentary support for the new EH
constructs has been added to the assembly printer, just enough to test
the new machinery.

Differential Revision: http://reviews.llvm.org/D12098

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMachineRegisterInfo: Introduce isPhysRegUsed()
Matthias Braun [Tue, 18 Aug 2015 18:54:27 +0000 (18:54 +0000)]
MachineRegisterInfo: Introduce isPhysRegUsed()

This method checks whether a physical regiser or any of its aliases are
used in the function.

Using this function in SIRegisterInfo::findUnusedReg() should also fix
this reported failure:

http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20150803/292143.html
http://reviews.llvm.org/rL242173#inline-533

The report doesn't come with a testcase and I don't know enough about
AMDGPU to create one myself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245329 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LPM] Cleanup some loops to be range based for loops before hacking on
Chandler Carruth [Tue, 18 Aug 2015 18:41:53 +0000 (18:41 +0000)]
[LPM] Cleanup some loops to be range based for loops before hacking on
this code. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LPM] Group the addPreserved template with the non-template variants,
Chandler Carruth [Tue, 18 Aug 2015 18:18:37 +0000 (18:18 +0000)]
[LPM] Group the addPreserved template with the non-template variants,
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245324 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Kaleidoscope] Start C++11'ifying the kaleidoscope tutorials.
Lang Hames [Tue, 18 Aug 2015 18:11:06 +0000 (18:11 +0000)]
[Kaleidoscope] Start C++11'ifying the kaleidoscope tutorials.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245322 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/AA] Remove the last relics of the separate IPA library from LLVM,
Chandler Carruth [Tue, 18 Aug 2015 17:51:53 +0000 (17:51 +0000)]
[PM/AA] Remove the last relics of the separate IPA library from LLVM,
folding the code into the main Analysis library.

There already wasn't much of a distinction between Analysis and IPA.
A number of the passes in Analysis are actually IPA passes, and there
doesn't seem to be any advantage to separating them.

Moreover, it makes it hard to have interactions between analyses that
are both local and interprocedural. In trying to make the Alias Analysis
infrastructure work with the new pass manager, it becomes particularly
awkward to navigate this split.

I've tried to find all the places where we referenced this, but I may
have missed some. I have also adjusted the C API to continue to be
equivalently functional after this change.

Differential Revision: http://reviews.llvm.org/D12075

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245318 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Implicit register verifier should accept unexpected implicit
Alex Lorenz [Tue, 18 Aug 2015 17:17:13 +0000 (17:17 +0000)]
MIR Parser: Implicit register verifier should accept unexpected implicit
subregister operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245315 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Use a SmallDenseMap instead of std::map for ValueCacheEntryTy
Bruno Cardoso Lopes [Tue, 18 Aug 2015 16:54:36 +0000 (16:54 +0000)]
[LVI] Use a SmallDenseMap instead of std::map for ValueCacheEntryTy

Historically there seems to be some resistance regarding the change to DenseMap
(r147980). However, I couldn't find cases of iterator invalidation for
ValueCacheEntryTy, but only for ValueCache, which I left untouched.

This reduces 20s on an internal testcase. Follow up from r245309.

Differential Revision: http://reviews.llvm.org/D11651

rdar://problem/21320066

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245314 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse minSize wrapper; NFCI
Sanjay Patel [Tue, 18 Aug 2015 16:44:23 +0000 (16:44 +0000)]
use minSize wrapper; NFCI

These were missed when other uses were switched over:
http://llvm.org/viewvc/llvm-project?view=revision&revision=243994

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245311 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Improve LazyValueInfo compile time performance
Bruno Cardoso Lopes [Tue, 18 Aug 2015 16:34:27 +0000 (16:34 +0000)]
[LVI] Improve LazyValueInfo compile time performance

Changes in LoopUnroll in the past six months exposed scalability
issues in LazyValueInfo when used from JumpThreading. One internal test
that used to take 20s under -O2 now takes 6min.

This commit change the OverDefinedCache from
DenseSet<std::pair<AssertingVH<BasicBlock>, Value*>> to
DenseMap<AssertingVH<BasicBlock>, SmallPtrSet<Value *, 4>>
and reduces compile time down to 1m40s.

Differential Revision: http://reviews.llvm.org/D11651

rdar://problem/21320066

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245309 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Simplify the logic for computing in bounds offset. NFC.
Chad Rosier [Tue, 18 Aug 2015 16:20:03 +0000 (16:20 +0000)]
[AArch64] Simplify the logic for computing in bounds offset. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245307 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Expand JAL instructions when PIC is enabled.
Daniel Sanders [Tue, 18 Aug 2015 16:18:09 +0000 (16:18 +0000)]
[mips] Expand JAL instructions when PIC is enabled.

Summary: This is the correct way to handle JAL instructions when PIC is enabled.

Patch by Toma Tabacu

Reviewers: seanbruno, tomatabacu

Subscribers: brooks, seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D6231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245305 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Convert another bunch of tests from macho-dump to llvm-readobj.
Davide Italiano [Tue, 18 Aug 2015 16:05:13 +0000 (16:05 +0000)]
[MC] Convert another bunch of tests from macho-dump to llvm-readobj.

This is (almost) everything under MC/MachO/ARM. There are still some
cases missing, because llvm-readobj doesn't (yet) support some features,
that macho-dump provides. I plan to reduce the gap between them shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245302 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement DDIV, DMOD, DDIVU and DMODU instructions
Zoran Jovanovic [Tue, 18 Aug 2015 14:40:43 +0000 (14:40 +0000)]
[mips][microMIPS] Implement DDIV, DMOD, DDIVU and DMODU instructions
Differential Revision: http://reviews.llvm.org/D10953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245297 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Implement SW and SWE instructions
Zoran Jovanovic [Tue, 18 Aug 2015 12:53:08 +0000 (12:53 +0000)]
[mips][microMIPS] Implement SW and SWE instructions
Differential Revision: http://reviews.llvm.org/D10869

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245293 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Make the MipsAsmParser capable of knowing whether PIC mode is enabled or not.
Daniel Sanders [Tue, 18 Aug 2015 12:33:54 +0000 (12:33 +0000)]
[mips] Make the MipsAsmParser capable of knowing whether PIC mode is enabled or not.

Summary:
This information is needed to decide whether we do the PIC-only JAL expansions or not. It's also needed for an upcoming patch which implements the .cprestore assembler directive (which can only be used effectively in PIC mode).

By making this information available to the MipsAsmParser, we will know when to insert the instructions mandated by the .cprestore assembler directive and we will be able to give some useful warnings when we encounter a potential misuse of this directive.

Patch by Toma Tabacu

Reviewers: dsanders, seanbruno

Subscribers: brooks, seanbruno, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D5626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245291 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] On Windows, generate PDF files for graphs and open with associated viewer
Michael Kruse [Tue, 18 Aug 2015 12:17:37 +0000 (12:17 +0000)]
[Support] On Windows, generate PDF files for graphs and open with associated viewer

Summary: Windows system rarely have good PostScript viewers installed, but PDF viewers are common. So for viewing graphs, generate PDF files and open with the associated PDF viewer using cmd.exe's start command.

Reviewers: Bigcheese, aaron.ballman

Subscribers: aaron.ballman, JakeVanAdrighem, dwiberg, llvm-commits

Differential Revision: http://reviews.llvm.org/D11877

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245290 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Always wait for GraphViz before opening the viewer
Michael Kruse [Tue, 18 Aug 2015 12:13:57 +0000 (12:13 +0000)]
[Support] Always wait for GraphViz before opening the viewer

Summary:
When calling DisplayGraph and a PS viewer is chosen, two programs are executed: The GraphViz generator and the PostScript viewer. Always for the generator to finish to ensure that the .ps file is written before opening the viewer for that file. DisplayGraph's wait parameter refers to whether to wait until the user closes the viewer.

This happened on Windows and if none of the options to open the .dot file directly applies, also on Linux.

Reviewers: Bigcheese, chandlerc, aaron.ballman

Subscribers: dwiberg, aaron.ballman, llvm-commits

Differential Revision: http://reviews.llvm.org/D11876

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245289 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Correct -Woverflow warning in r245208 without changing signedness of the constant.
Daniel Sanders [Tue, 18 Aug 2015 09:55:57 +0000 (09:55 +0000)]
[mips] Correct -Woverflow warning in r245208 without changing signedness of the constant.

This was supposed to have been committed as part of r245208

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245285 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixed max/min typo in test names
Simon Pilgrim [Tue, 18 Aug 2015 09:02:51 +0000 (09:02 +0000)]
Fixed max/min typo in test names

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245278 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE} Added constant SMAX/SMIN/UMAX/UMIN tests
Simon Pilgrim [Tue, 18 Aug 2015 08:52:43 +0000 (08:52 +0000)]
[X86][SSE} Added constant SMAX/SMIN/UMAX/UMIN tests

Constant folding patch to follow soon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245276 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Added extra vector truncation tests.
Simon Pilgrim [Tue, 18 Aug 2015 08:37:09 +0000 (08:37 +0000)]
[X86][SSE] Added extra vector truncation tests.

Including cases for PR14866

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245274 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd unit test for isLayoutIdentical(empty, empty).
Yaron Keren [Tue, 18 Aug 2015 07:59:09 +0000 (07:59 +0000)]
Add unit test for isLayoutIdentical(empty, empty).
It was previously asserting in Visual C++ debug mode on a null
iterator passed to std::equal.

Test by Hans Wennborg!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245270 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Constant propagation after hiting llvm.assume"
Justin Bogner [Tue, 18 Aug 2015 07:00:34 +0000 (07:00 +0000)]
Revert "Constant propagation after hiting llvm.assume"

This was also failing bootstrap:

http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_build

This reverts r245265.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245269 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoConstant propagation after hiting llvm.assume
Piotr Padlewski [Tue, 18 Aug 2015 03:55:30 +0000 (03:55 +0000)]
Constant propagation after hiting llvm.assume

After hitting @llvm.assume(X) we can:
- propagate equality that X == true
- if X is icmp/fcmp (with eq operation), and one of operand
  is constant we can change all variables with constants in the same BasicBlock

http://reviews.llvm.org/D11918

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245265 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDoxygen: add build option to use svg instead of png files for graphs
Hans Wennborg [Mon, 17 Aug 2015 23:24:17 +0000 (23:24 +0000)]
Doxygen: add build option to use svg instead of png files for graphs

Differential Revision: http://reviews.llvm.org/D11994

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245256 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd an exposed variable for which c++ compiler we're using for our
Eric Christopher [Mon, 17 Aug 2015 22:46:26 +0000 (22:46 +0000)]
Add an exposed variable for which c++ compiler we're using for our
build.

Patch by Chris Bieneman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245255 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Don't default to ELF in the triple.
Dan Gohman [Mon, 17 Aug 2015 22:37:56 +0000 (22:37 +0000)]
[WebAssembly] Don't default to ELF in the triple.

WebAssembly doesn't yet have a specified binary format, and it may not
end up being ELF, so we don't want the Triple class defaulting to ELF
for it at this time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245254 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAlign SP adjustment in function getSPAdjust
Guozhi Wei [Mon, 17 Aug 2015 22:36:27 +0000 (22:36 +0000)]
Align SP adjustment in function getSPAdjust

This commit adds a new function TargetFrameLowering::alignSPAdjust
and calls it from TargetInstrInfo::getSPAdjust. It fixes PR24142.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245253 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Make getArchTypePrefix return "wasm".
Dan Gohman [Mon, 17 Aug 2015 22:35:40 +0000 (22:35 +0000)]
[WebAssembly] Make getArchTypePrefix return "wasm".

The arch prefix string isn't currently being used for anything on
WebAssembly, but if it were to be used, it makes sense to use the
same arch prefix string for wasm32 and wasm64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245252 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the local offsets for the stack objects.
Alex Lorenz [Mon, 17 Aug 2015 22:17:42 +0000 (22:17 +0000)]
MIR Serialization: Serialize the local offsets for the stack objects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245249 91177308-0d34-0410-b5e6-96231b3b80d8