oota-llvm.git
9 years agoFixing the sanitizer build failure:
Chris Bieneman [Wed, 17 Sep 2014 22:09:38 +0000 (22:09 +0000)]
Fixing the sanitizer build failure:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/12868/steps/annotate/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217987 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Custom lower sdiv by power-of-2.
Juergen Ributzka [Wed, 17 Sep 2014 21:55:55 +0000 (21:55 +0000)]
[FastISel][AArch64] Custom lower sdiv by power-of-2.

Emit an optimized instruction sequence for sdiv by power-of-2 depending on the
exact flag.

This fixes rdar://problem/18224511.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217986 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[llvm-objdump] clean up test cases now that build bots are green
Nick Kledzik [Wed, 17 Sep 2014 21:53:07 +0000 (21:53 +0000)]
[llvm-objdump] clean up test cases now that build bots are green

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217985 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Push some more debug output into the View (NFC)
Justin Bogner [Wed, 17 Sep 2014 21:48:52 +0000 (21:48 +0000)]
llvm-cov: Push some more debug output into the View (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217984 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixing a build error.
Chris Bieneman [Wed, 17 Sep 2014 21:06:59 +0000 (21:06 +0000)]
Fixing a build error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217983 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRefactoring SimplifyLibCalls to remove static initializers and generally cleaning...
Chris Bieneman [Wed, 17 Sep 2014 20:55:46 +0000 (20:55 +0000)]
Refactoring SimplifyLibCalls to remove static initializers and generally cleaning up the code.

Summary: This eliminates ~200 lines of code mostly file scoped struct definitions that were unnecessary.

Reviewers: chandlerc, resistor

Reviewed By: resistor

Subscribers: morisset, resistor, llvm-commits

Differential Revision: http://reviews.llvm.org/D5364

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217982 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInternalize common symbols when we can.
Rafael Espindola [Wed, 17 Sep 2014 20:41:13 +0000 (20:41 +0000)]
Internalize common symbols when we can.

This fixes pr20974.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217981 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Simplify mul to shift when possible.
Juergen Ributzka [Wed, 17 Sep 2014 20:35:41 +0000 (20:35 +0000)]
[FastISel][AArch64] Simplify mul to shift when possible.

This is related to rdar://problem/18369687.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217980 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoExclude known and bugzilled failures from UBSan bootstrap
Alexey Samsonov [Wed, 17 Sep 2014 20:17:52 +0000 (20:17 +0000)]
Exclude known and bugzilled failures from UBSan bootstrap

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217979 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Fold mul into add/sub and logical operations.
Juergen Ributzka [Wed, 17 Sep 2014 19:51:38 +0000 (19:51 +0000)]
[FastISel][AArch64] Fold mul into add/sub and logical operations.

Try to fold the multiply into the add/sub or logical operations (when
possible).

This is related to rdar://problem/18369687.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217978 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Fold mul into the address computation of memory operations.
Juergen Ributzka [Wed, 17 Sep 2014 19:19:31 +0000 (19:19 +0000)]
[FastISel][AArch64] Fold mul into the address computation of memory operations.

Teach 'computeAddress' to also fold multiplies into the address computation
(when possible).

This fixes rdar://problem/18369443.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217977 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Rework the API for getting the coverage of a file (NFC)
Justin Bogner [Wed, 17 Sep 2014 18:23:47 +0000 (18:23 +0000)]
llvm-cov: Rework the API for getting the coverage of a file (NFC)

This encapsulates how we handle the coverage regions of a file or
function. In the old model, the user had to deal with nested regions,
so they needed to maintain their own auxiliary data structures to get
any useful information out of this. The new API provides a sequence of
non-overlapping coverage segments, which makes it possible to render
coverage information in a single pass and avoids a fair amount of
extra work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217975 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixup for r217830. Don't do left shifts on negative values
Alexey Samsonov [Wed, 17 Sep 2014 18:23:07 +0000 (18:23 +0000)]
Fixup for r217830. Don't do left shifts on negative values

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217974 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"
Robin Morisset [Wed, 17 Sep 2014 18:09:13 +0000 (18:09 +0000)]
Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"

It is breaking the build on the buildbots but works fine on my machine, I revert
while trying to understand what happens (it appears to depend on the compiler used
to build, I probably used a C++11 feature that is not perfectly supported by some
of the buildbots).

This reverts commit feb3176c4d006f99af8b40373abd56215a90e7cc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217973 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Fold compare with zero and branch into CBZ and CBNZ.
Juergen Ributzka [Wed, 17 Sep 2014 18:05:34 +0000 (18:05 +0000)]
[FastISel][AArch64] Fold compare with zero and branch into CBZ and CBNZ.

This takes advanatage of the CBZ and CBNZ instruction to further optimize the
common null check pattern into a single instruction.

This is related to rdar://problem/18358882.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217972 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAnother required re-setting for MCStreamer::reset().
Yaron Keren [Wed, 17 Sep 2014 17:50:34 +0000 (17:50 +0000)]
Another required re-setting for MCStreamer::reset().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217970 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove assert
Matt Arsenault [Wed, 17 Sep 2014 17:48:32 +0000 (17:48 +0000)]
R600/SI: Remove assert

Since read2 / write2 are emitted for 4-byte aligned 8-byte
accesses, these are seen by the scheduler.

The DAG scheduler is semi-deprecated, so just
ignore these for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217969 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Rough first implementation of shouldClusterLoads
Matt Arsenault [Wed, 17 Sep 2014 17:48:30 +0000 (17:48 +0000)]
R600/SI: Rough first implementation of shouldClusterLoads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217968 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix float division-by-zero in R600 scheduler.
Alexey Samsonov [Wed, 17 Sep 2014 17:47:21 +0000 (17:47 +0000)]
Fix float division-by-zero in R600 scheduler.

This bug was reported by UBSan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217967 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Improve branch selection to support all FP conditions.
Juergen Ributzka [Wed, 17 Sep 2014 17:46:47 +0000 (17:46 +0000)]
[FastISel][AArch64] Improve branch selection to support all FP conditions.

This adds the last two missing floating-point condition codes (FCMP_UEQ and
FCMP_ONE) also to the branch selection. In these two cases an additonal branch
instruction is required.

This also adds unit tests to checks all the different condition codes.

This is related o rdar://problem/18358882.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217966 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors
Robin Morisset [Wed, 17 Sep 2014 17:41:16 +0000 (17:41 +0000)]
[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors

Summary:
I had only tested this code for ARMv7 and ARMv8. This patch adds several
fallback paths if the processor does not support dmb ish:
- dmb sy if a cortex-M with support for dmb
- mcr p15, #0, r0, c7, c10, #5 for ARMv6 (special instruction equivalent to a DMB)
These fallback paths were chosen based on the code for fence seq_cst.

Thanks to luqmana for having noticed this bug.

Test Plan: Added more cases to atomic-load-store.ll + make check-all

Reviewers: jfb, t.p.northover, luqmana

Subscribers: aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D5304

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217965 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Change formatting of printed FP immediates
Matt Arsenault [Wed, 17 Sep 2014 17:32:13 +0000 (17:32 +0000)]
R600/SI: Change formatting of printed FP immediates

Only 1 decimal place should be printed for inline immediates.
Other constants should be hex constants.

Does not include f64 tests because folding those inline
immediates currently does not work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217964 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[IndVarSimplify] Partially revert r217953 to see if this fixes the bots.
Chad Rosier [Wed, 17 Sep 2014 16:35:09 +0000 (16:35 +0000)]
[IndVarSimplify] Partially revert r217953 to see if this fixes the bots.

Specifically, disable widening of unsigned compare instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217962 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLineIterator: Provide a variant that keeps blank lines
Justin Bogner [Wed, 17 Sep 2014 15:43:01 +0000 (15:43 +0000)]
LineIterator: Provide a variant that keeps blank lines

It isn't always useful to skip blank lines, as evidenced by the
somewhat awkward use of line_iterator in llvm-cov. This adds a knob to
control whether or not to skip blanks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217960 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove promotion of instructions to e64 forms.
Matt Arsenault [Wed, 17 Sep 2014 15:35:43 +0000 (15:35 +0000)]
R600/SI: Remove promotion of instructions to e64 forms.

Instructions are now generally selected to the e64 forms originally,
and shrunk down later. Rename foldOperands to legalizeOperands,
since that's really most of what it tries to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217959 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[IndVarSimplify] Widen loop compare instructions.
Chad Rosier [Wed, 17 Sep 2014 14:10:33 +0000 (14:10 +0000)]
[IndVarSimplify] Widen loop compare instructions.

This improves other optimizations such as LSR.  A sext may be added to the
compare's other operand, but this can often be hoisted outside of the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217953 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[InstCombine] Fix wrong folding of constant comparison involving ahsr and negative...
Andrea Di Biagio [Wed, 17 Sep 2014 11:32:31 +0000 (11:32 +0000)]
[InstCombine] Fix wrong folding of constant comparison involving ahsr and negative quantities (PR20945).

Example:
define i1 @foo(i32 %a) {
  %shr = ashr i32 -9, %a
  %cmp = icmp ne i32 %shr, -5
  ret i1 %cmp
}

Before this fix, the instruction combiner wrongly thought that %shr
could have never been equal to -5. Therefore, %cmp was always folded to 'true'.
However, when %a is equal to 1, then %cmp evaluates to 'false'. Therefore,
in this example, it is not valid to fold %cmp to 'true'.
The problem was only affecting the case where the comparison was between
negative quantities where one of the quantities was obtained from arithmetic
shift of a negative constant.

This patch fixes the problem with the wrong folding (fixes PR20945).
With this patch, the 'icmp' from the example is now simplified to a
comparison between %a and 1. This still allows us to get rid of the arithmetic
shift (%shr).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217950 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd DIBuilder functions to build RAUWable DIVariables and DIFunctions.
Frederic Riss [Wed, 17 Sep 2014 09:28:34 +0000 (09:28 +0000)]
Add DIBuilder functions to build RAUWable DIVariables and DIFunctions.

Summary: These will be used to implement support for useful forward declarartions.

Reviewers: echristo, dblaikie, aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5328

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217949 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd and update reset() and doInitialization() methods to MC* and passes.
Yaron Keren [Wed, 17 Sep 2014 09:25:36 +0000 (09:25 +0000)]
Add and update reset() and doInitialization() methods to MC* and passes.
This enables reusing a PassManager instead of re-constructing it every time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217948 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Add assembler support for the .set nodsp directive.
Toma Tabacu [Wed, 17 Sep 2014 09:01:54 +0000 (09:01 +0000)]
[mips] Add assembler support for the .set nodsp directive.

Summary: This directive is used to tell the assembler to reject DSP-specific instructions.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D5142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217946 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Fix a typo
Justin Bogner [Wed, 17 Sep 2014 08:12:12 +0000 (08:12 +0000)]
llvm-cov: Fix a typo

It doesn't make sense for this default parameter to be false, since
false makes the function a no-op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217945 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x32] Fix function indirect calls
Pavel Chupin [Wed, 17 Sep 2014 07:09:23 +0000 (07:09 +0000)]
[x32] Fix function indirect calls

Summary: Zero-extend register to 64-bit for callq/jmpq.

Test Plan: 3 tests added

Reviewers: nadav, dschuff

Subscribers: llvm-commits, zinovy.nis

Differential Revision: http://reviews.llvm.org/D5355

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217942 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd move constructors/assignment to make MSVC happy after r217940
Justin Bogner [Wed, 17 Sep 2014 06:32:48 +0000 (06:32 +0000)]
Add move constructors/assignment to make MSVC happy after r217940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217941 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Distinguish expansion/instantiation from SourceCoverageView
Justin Bogner [Wed, 17 Sep 2014 05:33:20 +0000 (05:33 +0000)]
llvm-cov: Distinguish expansion/instantiation from SourceCoverageView

SourceCoverageView currently has "Kind" and a list of child views, all
of which must have either an expansion or an instantiation Kind. In
addition to being an error-prone design, this makes it awkward to
differentiate between the two child types and adds a number of
optionally used members to the type.

Split the subview types into their own separate objects, and maintain
lists of each rather than one combined "Children" list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217940 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInstSimplify: Don't allow (x srem y) urem y -> x srem y
David Majnemer [Wed, 17 Sep 2014 04:16:35 +0000 (04:16 +0000)]
InstSimplify: Don't allow (x srem y) urem y -> x srem y

Let's consider the case where:
%x i16 = 32768
%y i16 = 384

%x srem %y = 65408
(%x srem %y) urem %y = 128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217939 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInstSimplify: ((X % Y) % Y) -> (X % Y)
David Majnemer [Wed, 17 Sep 2014 03:34:34 +0000 (03:34 +0000)]
InstSimplify: ((X % Y) % Y) -> (X % Y)

Patch by Sonam Kumari!

Differential Revision: http://reviews.llvm.org/D5350

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217937 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Object] keep trailing '\0' out of StringRef when parsing mach-o bindings
Nick Kledzik [Wed, 17 Sep 2014 01:51:43 +0000 (01:51 +0000)]
[Object] keep trailing '\0' out of StringRef when parsing mach-o bindings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217935 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago| -> ||
Richard Trieu [Wed, 17 Sep 2014 01:47:52 +0000 (01:47 +0000)]
| -> ||
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217934 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix identify_magic() with mach-o stub dylibs.
Nick Kledzik [Wed, 17 Sep 2014 00:53:44 +0000 (00:53 +0000)]
Fix identify_magic() with mach-o stub dylibs.

The wrong value was returned and the unittest did not cover the stub dylib case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217933 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[llvm-objdump] properly use c_str() with format("%s"). Improve getLibraryShortNameBy...
Nick Kledzik [Wed, 17 Sep 2014 00:25:22 +0000 (00:25 +0000)]
[llvm-objdump] properly use c_str() with format("%s").  Improve getLibraryShortNameByIndex() error handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217930 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPass
Robin Morisset [Wed, 17 Sep 2014 00:06:58 +0000 (00:06 +0000)]
[X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPass

This required a new hook called hasLoadLinkedStoreConditional to know whether
to expand atomics to LL/SC (ARM, AArch64, in a future patch Power) or to
CmpXchg (X86).

Apart from that, the new code in AtomicExpandPass is mostly moved from
X86AtomicExpandPass. The main result of this patch is to get rid of that
pass, which had lots of code duplicated with AtomicExpandPass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217928 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[CodeGenPrepare][AddressingModeMatcher] The promotion mechanism was expecting
Quentin Colombet [Tue, 16 Sep 2014 22:36:07 +0000 (22:36 +0000)]
[CodeGenPrepare][AddressingModeMatcher] The promotion mechanism was expecting
instructions when truncate, sext, or zext were created. Fix that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217926 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[llvm-objdump] improve error reporting of bad mach-o ordinals
Nick Kledzik [Tue, 16 Sep 2014 22:03:13 +0000 (22:03 +0000)]
[llvm-objdump] improve error reporting of bad mach-o ordinals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217909 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoThis add a reset method for WinCOFFObjectWriter, like other MC* classes.
Yaron Keren [Tue, 16 Sep 2014 21:31:04 +0000 (21:31 +0000)]
This add a reset method for WinCOFFObjectWriter, like other MC* classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217907 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotweak test case for debugging bot
Nick Kledzik [Tue, 16 Sep 2014 21:29:54 +0000 (21:29 +0000)]
tweak test case for debugging bot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217906 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd back a fallback case for targets that do not or cannot implement getNoopForMachoT...
Owen Anderson [Tue, 16 Sep 2014 20:28:00 +0000 (20:28 +0000)]
Add back a fallback case for targets that do not or cannot implement getNoopForMachoTarget().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217899 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHookup the MCSymbolizer to llvm-objdump’s disassembly for Mach-O files.
Kevin Enderby [Tue, 16 Sep 2014 18:00:57 +0000 (18:00 +0000)]
Hookup the MCSymbolizer to llvm-objdump’s disassembly for Mach-O files.

First step done in this commit is to get flush out enough of the
SymbolizerGetOpInfo() routine to symbolic an X86_64 hello world .o and
its loading of the literal string and call to printf.  Also the code to
symbolicate the X86_64_RELOC_SUBTRACTOR relocation and a test is also
added to show a slightly more complicated case.

Next will be to flush out enough of SymbolizerSymbolLookUp() to get the
literal string “Hello world” printed as a comment on the instruction that load
the pointer to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217893 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix typo
Matt Arsenault [Tue, 16 Sep 2014 18:00:23 +0000 (18:00 +0000)]
Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217892 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a missing return to operator=
Reid Kleckner [Tue, 16 Sep 2014 17:39:46 +0000 (17:39 +0000)]
Add a missing return to operator=

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217889 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix move-only type issues in Interpreter with MSVC
Reid Kleckner [Tue, 16 Sep 2014 17:28:15 +0000 (17:28 +0000)]
Fix move-only type issues in Interpreter with MSVC

MSVC 2012 cannot infer any move special members, but it will call them
if available. MSVC 2013 cannot infer move assignment. Therefore,
explicitly implement the special members for the ExecutionContext class
and its contained types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217887 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[TableGen] Fully resolve class-instance values before defs in multiclasses
Adam Nemet [Tue, 16 Sep 2014 17:14:13 +0000 (17:14 +0000)]
[TableGen] Fully resolve class-instance values before defs in multiclasses

By class-instance values I mean 'Class<Arg>' in 'Class<Arg>.Field' or in
'Other<Class<Arg>>' (syntactically s SimpleValue).  This is to differentiate
from unnamed/anonymous record definitions (syntactically an ObjectBody) which
are not affected by this change.

Consider the testcase:

    class Struct<int i> {
      int I = !shl(i, 1);
      int J = !shl(I, 1);
    }

    class Class<Struct s> {
        int Class_J = s.J;
    }

    multiclass MultiClass<int i> {
      def Def : Class<Struct<i>>;
    }

    defm Defm : MultiClass<2>;

Before this fix, DefmDef.Class_J yields !shl(I, 1) instead of 8.

This is the sequence of events.  We start with this:

    multiclass MultiClass<int i> {
      def Def : Class<Struct<i>>;
    }

During ParseDef the anonymous object for the class-instance value is created:

    multiclass Multiclass<int i> {
      def anonymous_0 : Struct<i>;

      def Def : Class<NAME#anonymous_0>;
    }

Then class Struct<i> is added to anonymous_0.  Also Class<NAME#anonymous_0> is
added to Def:

    multiclass Multiclass<int i> {
      def anonymous_0 {
        int I = !shl(i, 1);
        int J = !shl(I, 1);
      }

      def Def {
        int Class_J = NAME#anonymous_0.J;
      }
    }

So far so good but then we move on to instantiating this in the defm
by substituting the template arg 'i'.

This is how the anonymous prototype looks after fully instantiating.

    defm Defm = {
      def Defmanonymous_0 {
         int I = 4;
         int J = !shl(I, 1);
      }

Note that we only resolved the reference to the template arg.  The
non-template-arg reference in 'J' has not been resolved yet.

Then we go on to instantiating the Def prototype:

      def DefmDef {
         int Class_J = NAME#anonymous_0.J;
      }

Which is resolved to Defmanonymous_0.J and then to !shl(I, 1).

When we fully resolve each record in a defm, Defmanonymous_0.J does get set
to 8 but that's too late for its use.

The patch adds a new attribute to the Record class that indicates that this
def is actually a class-instance value that may be *used* by other defs in a
multiclass.  (This is unlike regular defs which don't reference each other and
thus can be resolved indepedently.)  They are then fully resolved before the
other defs while the multiclass is instantiated.

I added vg_leak to the new test.  I am not sure if this is necessary but I
don't think I have a way to test it.  I can also check in without the XFAIL
and let the bots test this part.

Also tested that X86.td.expanded and AAarch64.td.expanded were unchange before
and after this change.  (This issue triggering this problem is a WIP patch.)

Part of <rdar://problem/17688758>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217886 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Improve comment
Adam Nemet [Tue, 16 Sep 2014 17:14:10 +0000 (17:14 +0000)]
[X86] Improve comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217885 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM load/store optimizer: Don't materialize a new base register with
Moritz Roth [Tue, 16 Sep 2014 16:25:07 +0000 (16:25 +0000)]
ARM load/store optimizer: Don't materialize a new base register with
ADDS/SUBS unless it's safe to clobber the condition flags.

If the merged instructions are in a range where the CPSR is live,
e.g. between a CMP -> Bcc, we can't safely materialize a new base
register.

This problem is quite rare, I couldn't come up with a test case and I've
never actually seen this happen in the tests I'm running - there is a
potential trigger for this in LNT/oggenc (spills being inserted between
a CMP/Bcc), but at the moment this isn't being merged. I'll try to
reduce that into a small test case once I've committed my upcoming patch
to make merging less conservative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217881 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSpell out a move ctor. Even the 2013 vintage of MSVC cannot synthesize move ctors.
Benjamin Kramer [Tue, 16 Sep 2014 16:16:39 +0000 (16:16 +0000)]
Spell out a move ctor. Even the 2013 vintage of MSVC cannot synthesize move ctors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217879 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInterpreter: Hack around a series of bugs in MSVC 2012 that copies around this
Benjamin Kramer [Tue, 16 Sep 2014 15:26:41 +0000 (15:26 +0000)]
Interpreter: Hack around a series of bugs in MSVC 2012 that copies around this
move-only struct.

I feel terrible now, but at least it's shielded away from proper compilers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217875 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Improve the error messages given by MipsAsmParser.
Toma Tabacu [Tue, 16 Sep 2014 15:00:52 +0000 (15:00 +0000)]
[mips] Improve the error messages given by MipsAsmParser.

Summary: Changed error messages to be more informative and to resemble other clang/llvm error messages (first letter is lower case, no ending punctuation) and updated corresponding tests.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D5065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217873 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake DWARFUnitSection final and change base class to non-virtual protected destructor.
Frederic Riss [Tue, 16 Sep 2014 12:58:01 +0000 (12:58 +0000)]
Make DWARFUnitSection final and change base class to non-virtual protected destructor.

As per dblaikie suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217871 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Move 32-bit ADDiu instruction alias from Mips64InstrInfo.td to MipsInstrInfo.td.
Toma Tabacu [Tue, 16 Sep 2014 10:19:03 +0000 (10:19 +0000)]
[mips] Move 32-bit ADDiu instruction alias from Mips64InstrInfo.td to MipsInstrInfo.td.

Patch by Vasileios Kalintiris.

Differential Revision: http://reviews.llvm.org/D5244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217868 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Marked the ADDi instruction aliases as not available in Mips32R6 and Mips64R6.
Toma Tabacu [Tue, 16 Sep 2014 09:26:09 +0000 (09:26 +0000)]
[mips] Marked the ADDi instruction aliases as not available in Mips32R6 and Mips64R6.

Patch by Vasileios Kalintiris.

Differential Revision: http://reviews.llvm.org/D5242

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217867 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARMAsmBackend uses a factory method to generate binary file format specific
Joe Abbey [Tue, 16 Sep 2014 09:18:23 +0000 (09:18 +0000)]
ARMAsmBackend uses a factory method to generate binary file format specific
objects.  There were a few FIXMEs in ARMAsmBackend.cpp suggesting the class
definitions should be in a separate file.  Starting with ARMAsmBackend, the
class definition has been put in a header file, and #includes reduced.  Each
sub-type of ARMAsmBackend is now in its own header file.

Derived types have been painted with a different color of bike-shed:

  s/DarwinARMAsmBackend/ARMAsmBackendDarwin/g
  s/ARMWinCOFFAsmBackend/ARMAsmBackendWinCOFF/g
  s/ELFARMAsmBackend/ARMAsmBackendELF/g

Finally, clang-format has been run across ARMAsmBackend.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217866 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[InstCombine] Remove redundant test case.
Tilmann Scheller [Tue, 16 Sep 2014 08:50:10 +0000 (08:50 +0000)]
[InstCombine] Remove redundant test case.

Patch by Sonam Kumari!

Differential Revision: http://reviews.llvm.org/D5284

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217865 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: added cost for some AVX-512 instructions
Elena Demikhovsky [Tue, 16 Sep 2014 07:57:37 +0000 (07:57 +0000)]
AVX-512: added cost for some AVX-512 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217863 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Rename a variable and clean up its usage
Justin Bogner [Tue, 16 Sep 2014 06:21:57 +0000 (06:21 +0000)]
llvm-cov: Rename a variable and clean up its usage

Offset is a terrible name for an indentation / nesting level, and it
confuses me every time I look at this code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217861 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotweak test case to help build bot
Nick Kledzik [Tue, 16 Sep 2014 04:51:38 +0000 (04:51 +0000)]
tweak test case to help build bot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217860 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix BasicTTI::getCmpSelInstrCost to deal with illegal vector types
Hal Finkel [Tue, 16 Sep 2014 04:35:50 +0000 (04:35 +0000)]
Fix BasicTTI::getCmpSelInstrCost to deal with illegal vector types

The default implementation of getCmpSelInstrCost, which provides the cost of
icmp/fcmp/select instructions, did not deal sensibly with illegal vector types
that were scalarized. We'd ask for the legalization cost of the vector type,
which would return something like (4, f64) given an input of <4 x double>, and
we'd then check the TLI status of the ISD opcode on that scalar type. This would
result in querying (ISD::VSELECT, f64), for example. Amusingly enough,
ISD::VSELECT on scalar types is marked as Legal by default (as with most other
operations), and most backends never change this because VSELECT is never
generated on scalars. However, seeing the resulting operation as Legal, we'd
neglect to add the scalarization cost before returning. The result is that we'd
grossly under-estimate the cost of cmps/selects on illegal vector types.

Now, if type legalization clearly results in scalarization, we skip the early
return and add the scalarization cost.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217859 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoyaml2obj: Support bigobj
David Majnemer [Tue, 16 Sep 2014 03:52:46 +0000 (03:52 +0000)]
yaml2obj: Support bigobj

Teach yaml2obj how to make a bigobj COFF file.  Like the rest of LLVM,
we automatically decide whether or not to use regular COFF or bigobj
COFF on the fly depending on how many sections the resulting object
would have.

This ends the task of adding bigobj support to LLVM.

N.B. This was tested by forcing yaml2obj to be used in bigobj mode
regardless of the number of sections.  While a dedicated test was
written, the smallest I could make it was 36 MB (!) of yaml and it still
took a significant amount of time to execute on a powerful machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217858 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotweak test case to help solve why failing on one build bot
Nick Kledzik [Tue, 16 Sep 2014 02:33:36 +0000 (02:33 +0000)]
tweak test case to help solve why failing on one build bot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217856 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Remove a FIXME that doesn't make any sense. Only the lanes feeding
Chandler Carruth [Tue, 16 Sep 2014 02:16:42 +0000 (02:16 +0000)]
[x86] Remove a FIXME that doesn't make any sense. Only the lanes feeding
the blend that is matched by this are "used" in any sense, and so any
build_vector or other nodes feeding these will already drop other lanes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217855 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Cleanup an unused variable by actually using it in the non-asserts
Chandler Carruth [Tue, 16 Sep 2014 02:14:51 +0000 (02:14 +0000)]
[x86] Cleanup an unused variable by actually using it in the non-asserts
place where it was needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217854 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[llvm-objdump] for mach-o add -bind, -lazy-bind, and -weak-bind options
Nick Kledzik [Tue, 16 Sep 2014 01:41:51 +0000 (01:41 +0000)]
[llvm-objdump] for mach-o add -bind, -lazy-bind, and -weak-bind options

This finishes the ability of llvm-objdump to print out all information from
the LC_DYLD_INFO load command.

The -bind option prints out symbolic references that dyld must resolve
immediately.

The -lazy-bind option prints out symbolc reference that are lazily resolved on
first use.

The -weak-bind option prints out information about symbols which dyld must
try to coalesce across images.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217853 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Remove the last vestiges of the BLENDI-based ADDSUB pattern
Chandler Carruth [Tue, 16 Sep 2014 00:39:08 +0000 (00:39 +0000)]
[x86] Remove the last vestiges of the BLENDI-based ADDSUB pattern
matching. This design just fundamentally didn't work because ADDSUB is
available prior to any legal lowerings of BLENDI nodes. Instead, we have
a dedicated ADDSUB synthetic ISD node which is pattern matched trivially
into the instructions. These nodes are then recognized by both the
existing and a trivial new lowering combine in the backend. Removing
these patterns required adding 2 missing shuffle masks to the DAG
combine, without which tests would have failed. Added the masks and
a helpful assert as well to catch if anything ever goes wrong here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217851 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Add vector support to argument lowering.
Juergen Ributzka [Tue, 16 Sep 2014 00:25:30 +0000 (00:25 +0000)]
[FastISel][AArch64] Add vector support to argument lowering.

Lower the first 8 vector arguments too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217850 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] As a follow-up to r217819, don't check for VSELECT legality now
Chandler Carruth [Tue, 16 Sep 2014 00:24:42 +0000 (00:24 +0000)]
[x86] As a follow-up to r217819, don't check for VSELECT legality now
that we don't use VSELECT and directly emit an addsub synthetic node.
Also remove a stale comment referencing VSELECT.

The test case is updated to use 'core2' which only has SSE3, not SSE4.1,
and it still passes. Previously it would not because we lacked
sufficient blend support to legalize the VSELECT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217849 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Add the beginnings of a proper DAG combine to match ADDSUBPS and
Chandler Carruth [Tue, 16 Sep 2014 00:15:20 +0000 (00:15 +0000)]
[x86] Add the beginnings of a proper DAG combine to match ADDSUBPS and
ADDSUBPD nodes out of blends of adds and subs.

This allows us to actually form these instructions with SSE3 rather than
only forming them when we had both SSE3 for the ADDSUB instructions and
SSE4.1 for the blend instructions. ;] Kind-of important.

I've adjusted the CPU requirements on one of the tests to demonstrate
this kicking in nicely for an SSE3 cpu configuration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217848 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Add missing test case for previous commit.
Juergen Ributzka [Mon, 15 Sep 2014 23:47:57 +0000 (23:47 +0000)]
[FastISel][AArch64] Add missing test case for previous commit.

This adds the missing test case for the previous commit:
Allow handling of vectors during return lowering for little endian machines.

Sorry for the noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217847 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Allow handling of vectors during return lowering for little endia...
Juergen Ributzka [Mon, 15 Sep 2014 23:40:10 +0000 (23:40 +0000)]
[FastISel][AArch64] Allow handling of vectors during return lowering for little endian machines.

Allow handling of vectors during return lowering at least for little endian machines.
This was restricted in r208200 to fix it for big endian machines (according to
the comment), but it also disabled it for little endian too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217846 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Update function and variable names to follow the coding standard...
Juergen Ributzka [Mon, 15 Sep 2014 23:20:17 +0000 (23:20 +0000)]
[FastISel][AArch64] Update function and variable names to follow the coding standard. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217845 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Add comment describing the need to disable address pool usage in skeleton...
David Blaikie [Mon, 15 Sep 2014 22:41:25 +0000 (22:41 +0000)]
DebugInfo: Add comment describing the need to disable address pool usage in skeleton units.

Post commit review from Eric Christopher.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217842 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Make AArch64FastISel class final. NFC.
Juergen Ributzka [Mon, 15 Sep 2014 22:33:11 +0000 (22:33 +0000)]
[FastISel][AArch64] Make AArch64FastISel class final. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217840 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Lower sin/cos/pow to runtime lib calls.
Juergen Ributzka [Mon, 15 Sep 2014 22:33:06 +0000 (22:33 +0000)]
[FastISel][AArch64] Lower sin/cos/pow to runtime lib calls.

Also lower sin/cos/pow to runtime lib calls.

This fixes rdar://problem/18343468.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217839 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Make debug output more consistent
Justin Bogner [Mon, 15 Sep 2014 22:23:29 +0000 (22:23 +0000)]
llvm-cov: Make debug output more consistent

This changes the debug output of the llvm-cov tool to consistently
write to stderr, and moves the highlighting output closer to where
it's relevant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217838 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix indenting caused by clang-format+spuriously indented access specifier in r216925
David Blaikie [Mon, 15 Sep 2014 22:20:31 +0000 (22:20 +0000)]
Fix indenting caused by clang-format+spuriously indented access specifier in r216925

Caught in post-commit review by Justin Bogner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217837 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Fix an issue with showing regions but not counts
Justin Bogner [Mon, 15 Sep 2014 22:12:28 +0000 (22:12 +0000)]
llvm-cov: Fix an issue with showing regions but not counts

In r217746, though it was supposed to be NFC, I broke llvm-cov's
handling of showing regions without showing counts. This should've
shown up in the existing tests, except they were checking debug output
that was displayed regardless of what was actually output. I've moved
the relevant debug output to a more appropriate place so that the
tests catch this kind of thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217835 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd back tests for empty function in SPARC and PowerPC.
Rafael Espindola [Mon, 15 Sep 2014 22:11:07 +0000 (22:11 +0000)]
Add back tests for empty function in SPARC and PowerPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217834 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Add lowering support for frem.
Juergen Ributzka [Mon, 15 Sep 2014 22:07:49 +0000 (22:07 +0000)]
[FastISel][AArch64] Add lowering support for frem.

This lowers frem to a runtime libcall inside fast-isel.

The test case also checks the CallLoweringInfo bug that was exposed by this
change.

This fixes rdar://problem/18342783.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217833 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel] Fix a bug in FastISel::CallLoweringInfo.
Juergen Ributzka [Mon, 15 Sep 2014 22:07:44 +0000 (22:07 +0000)]
[FastISel] Fix a bug in FastISel::CallLoweringInfo.

This fixes a bug in FastISel::CallLoweringInfo, where the number of
arguments was obtained from the argument vector before it had been
initialized.

Test case follows in another commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217832 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReplace repeated null checks with an assert. NFC.
Sanjay Patel [Mon, 15 Sep 2014 21:52:51 +0000 (21:52 +0000)]
Replace repeated null checks with an assert. NFC.

Without a vector to hold the created ops, these
functions don't have any use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217831 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Support] add decodeSLEB128()
Nick Kledzik [Mon, 15 Sep 2014 21:51:49 +0000 (21:51 +0000)]
[Support] add decodeSLEB128()

We already have routines to encode SLEB128 as well as encode/decode ULEB128.
This last function fills out the matrix.  I'll need this for some llvm-objdump
work I am doing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217830 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Refactor selectAddSub, selectLogicalOp, and SelectShift. NFC.
Juergen Ributzka [Mon, 15 Sep 2014 21:27:56 +0000 (21:27 +0000)]
[FastISel][AArch64] Refactor selectAddSub, selectLogicalOp, and SelectShift. NFC.

Small refactor to tidy up the code a little.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217827 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Refactor code to use isTypeSupported. NFC.
Juergen Ributzka [Mon, 15 Sep 2014 21:27:54 +0000 (21:27 +0000)]
[FastISel][AArch64] Refactor code to use isTypeSupported. NFC.

Gets rid of isLoadStoreTypeLegal and replace it with isTypeSupported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217826 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove dead code in SimplifyCFG
Jingyue Wu [Mon, 15 Sep 2014 20:48:13 +0000 (20:48 +0000)]
Remove dead code in SimplifyCFG

Summary: UsedByBranch is always true according to how BonusInst is defined.

Test Plan:
Passes check-all, and also verified

if (BonusInst && !UsedByBranch) {
  ...
}

is never entered during check-all.

Reviewers: resistor, nadav, jingyue

Reviewed By: jingyue

Subscribers: llvm-commits, eliben, meheff

Differential Revision: http://reviews.llvm.org/D5324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217824 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Improve floating-point compare support.
Juergen Ributzka [Mon, 15 Sep 2014 20:47:16 +0000 (20:47 +0000)]
[FastISel][AArch64] Improve floating-point compare support.

Add support for the last two missing fcmp condition codes: UEQ and ONE.

This fixes rdar://problem/18341575.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217823 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel] Move optimizeCmpPredicate to FastISel base class. NFC.
Juergen Ributzka [Mon, 15 Sep 2014 20:47:13 +0000 (20:47 +0000)]
[FastISel] Move optimizeCmpPredicate to FastISel base class. NFC.

Make the optimizeCmpPredicate function available to all targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217822 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd mips32 r1 to the list of supported targets for Mips fast-isel
Reed Kotler [Mon, 15 Sep 2014 20:30:25 +0000 (20:30 +0000)]
Add mips32 r1 to the list of supported targets for Mips fast-isel

Summary:
Expand list of supported targets for Mips to include mips32 r1.
Previously it only include r2. More patches are coming where there is
a difference but in the current patches as pushed upstream, r1 and r2
are equivalent.

Test Plan:
simplestorefp1.ll

add new build bots at mips to test this flavor at both -O0 and -O2

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D5306

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217821 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix the build for MSVC, it doesn't support extended sizeof
David Majnemer [Mon, 15 Sep 2014 20:28:38 +0000 (20:28 +0000)]
Fix the build for MSVC, it doesn't support extended sizeof

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217820 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Start fixing our emission of ADDSUBPS and ADDSUBPD instructions by
Chandler Carruth [Mon, 15 Sep 2014 20:09:47 +0000 (20:09 +0000)]
[x86] Start fixing our emission of ADDSUBPS and ADDSUBPD instructions by
introducing a synthetic X86 ISD node representing this generic
operation.

The relevant patterns for mapping these nodes into the concrete
instructions are also added, and a gnarly bit of C++ code in the
target-specific DAG combiner is replaced with simple code emitting this
primitive.

The next step is to generically combine blends of adds and subs into
this node so that we can drop the reliance on an SSE4.1 ISD node
(BLENDI) when matching an SSE3 feature (ADDSUB).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217819 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReplace dead links to "Hacker's Delight" with general references. NFC.
Sanjay Patel [Mon, 15 Sep 2014 19:47:44 +0000 (19:47 +0000)]
Replace dead links to "Hacker's Delight" with general references. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217814 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Add support for BigObj
David Majnemer [Mon, 15 Sep 2014 19:42:42 +0000 (19:42 +0000)]
MC: Add support for BigObj

Teach WinCOFFObjectWriter how to write -mbig-obj style object files;
these object files allow for more sections inside an object file.

Our support for BigObj is notably different from binutils and cl: we
implicitly upgrade object files to BigObj instead of asking the user to
compile the same file *again* but with another flag.  This matches up
with how LLVM treats ELF variants.

This was tested by forcing LLVM to always emit BigObj files and running
the entire test suite.  A specific test has also been added.

I've lowered the maximum number of sections in a normal COFF file,
VS "14" CTP 3 supports no more than 65279 sections.  This is important
otherwise we might not switch to BigObj quickly enough, leaving us with
a COFF file that we couldn't link.

yaml2obj support is all that remains to implement.

Differential Revision: http://reviews.llvm.org/D5349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217812 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd return that was lost somehow in my last commit.
Benjamin Kramer [Mon, 15 Sep 2014 19:25:55 +0000 (19:25 +0000)]
Add return that was lost somehow in my last commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217810 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove ancient hack that was emulating move semantics with reference counting.
Benjamin Kramer [Mon, 15 Sep 2014 19:20:52 +0000 (19:20 +0000)]
Remove ancient hack that was emulating move semantics with reference counting.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217808 91177308-0d34-0410-b5e6-96231b3b80d8