[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
[oota-llvm.git] / test / CodeGen / Mips / atomicops.ll
2015-10-15 Daniel Sanders[mips][mips16] MIPS16 is not a CPU/Architecture but...
2015-04-16 David Blaikie[opaque pointer type] Add textual IR support for explic...
2015-03-13 David Blaikie[opaque pointer type] Add textual IR support for explic...
2015-02-27 David Blaikie[opaque pointer type] Add textual IR support for explic...
2014-06-13 Tim NorthoverIR: add "cmpxchg weak" variant to support permitted...
2014-03-11 Tim NorthoverIR: add a second ordering operand to cmpxhg for failure
2013-07-14 Stephen LinMass update to CodeGen tests to use CHECK-LABEL for...
2012-10-29 Reed KotlerExpand all atomic ops for mips16.