[SeparateConstOffsetFromGEP] Fixed a bug related to unsigned modulo
[oota-llvm.git] / lib / Target /
2014-10-25 Simon Pilgrim[X86][SSE] Vector integer/float conversion memory folding
2014-10-25 Jingyue Wu[NVPTX] aligned byte-buffers for vector return types
2014-10-24 Kevin EnderbyFix a Mach-O assembler segfault for a subtraction expre...
2014-10-24 Simon Pilgrim[X86][SSE] Bitcast assertion in XFormVExtractWithShuffl...
2014-10-24 Colin LeMahieu[Hexagon] Resubmission of 220427
2014-10-24 Sanjay PatelAllow AVX vrsqrtps generation.
2014-10-24 Sanjay PatelUse rsqrt (X86) to speed up reciprocal square root...
2014-10-24 Daniel Sanders[mips] Replace MipsABIEnum with a MipsABIInfo class.
2014-10-24 Daniel Sanders[mips] Fix >80-column line
2014-10-24 Daniel Sanders[mips] Remove redundant code in RetCC_MipsN. NFC.
2014-10-24 Daniel Sanders[mips] For N32/N64, structs must be passed in the upper...
2014-10-24 Oliver Stannard[AArch64] Fix fast-isel of cbz of i1, i8, i16
2014-10-24 Adam Nemet[AVX512] FMA support for the 231 variants
2014-10-24 Adam Nemet[AVX512] Introduce fma3p_forms from AVX
2014-10-23 Ahmed Bougacha[X86] Improve mul w/ overflow codegen, to MUL8+SETO.
2014-10-23 Renato GolinDo not emit intermediate register for zero FP immediate
2014-10-23 NAKAMURA TakumiHexagon/Disassembler/LLVMBuild.txt: Update libdeps.
2014-10-23 NAKAMURA TakumiHexagon/LLVMBuild.txt: Prune CRLF.
2014-10-23 NAKAMURA Takumi[CMake] Prune CRLF in CMakeLists.txt(s).
2014-10-23 NAKAMURA TakumiRevert r220427, "[Hexagon] Adding encoding bits for...
2014-10-23 Zoran Jovanovic[mips][microMIPS] Implement ADDIUR1SP instruction
2014-10-23 Zoran Jovanovicps][microMIPS] Implement ADDIUR2 instruction
2014-10-23 Zoran Jovanovicps][microMIPS] Implement LI16 instruction
2014-10-23 Zoran Jovanovic[mips][microMIPS] Implement CodeGen support for SLL16...
2014-10-23 Oliver Stannard[Thumb2] Improve disassembly of memory hints
2014-10-23 Akira Hatanaka[ARM, stack protector] If supported, use armv7 instruct...
2014-10-22 Colin LeMahieu[Hexagon] Adding encoding bits for add opcode.
2014-10-22 Chad Rosier[AArch64] Add support for the .inst directive.
2014-10-22 Hans WennborgFix VS2012 build; C++11 type aliases are not supported.
2014-10-22 Colin LeMahieuAmmending 220393 - Removing unused decoding tables.
2014-10-22 Colin LeMahieuAmmending 220393 - Removing unused functions.
2014-10-22 Bill Schmidt[PATCH] Support select-cc for VSFRC when VSX is enabled
2014-10-22 Colin LeMahieu[Hexagon] Adding basic disassembler.
2014-10-22 Bill Schmidt[PowerPC] Support select-cc for VSX
2014-10-22 Arnaud A. de Grand... [AArch64] Cleanup A57PBQPConstraints
2014-10-22 Jyoti Allur[Thumb/Thumb2] Implement restrictions on SP in register...
2014-10-21 Matt ArsenaultAdd minnum / maxnum codegen
2014-10-21 Matt ArsenaultR600/SI: Add missing parameter to div_fmas intrinsic
2014-10-21 Matt ArsenaultR600: Use default GlobalDirective
2014-10-21 Arnaud A. de Grand... [PBQP] Teach PassConfig to tell if the default register...
2014-10-21 Rafael EspindolaDrop support for an old version of ld64 (from darwin 9).
2014-10-21 Matt ArsenaultR600/SI: Add pattern for bswap
2014-10-21 NAKAMURA TakumiX86AsmInstrumentation.cpp: Dissolve initializer-ranged...
2014-10-21 Colin LeMahieuTest commit
2014-10-21 Bill Schmidt[PowerPC] Avoid VSX FMA mutate when killed product...
2014-10-21 Oliver Stannard[ARM] NEON 32-bit scalar moves are also available in...
2014-10-21 Yuri Gorshenin[asan-asm-instrumentation] Fixed memory accesses with...
2014-10-21 Oliver Stannard[Thumb2] LDRS?[BH] cannot load to the PC
2014-10-21 Zoran Jovanovic[mips][microMIPS] Implement ADDU16 and SUBU16 instructions
2014-10-21 Zoran Jovanovic[mips][microMIPS] Implement AND16, NOT16, OR16 and...
2014-10-21 Zoran Jovanovic[mips][microMIPS] Implement microMIPS 16-bit instructio...
2014-10-21 Rafael EspindolaFix a bit of confusion about .set and produce more...
2014-10-20 Quentin Colombet[X86] Fix a bug in the lowering of the mask of VSELECT.
2014-10-20 Simon Pilgrim[X86] Memory folding for commutative instructions ...
2014-10-20 Tim NorthoverARM: rework Thumb1 frame index rewriting
2014-10-20 Oliver Stannard[Thumb2] RFE, SRS and "SUBS pc, lr" are undefined on v7M
2014-10-20 Sid ManningRemove unnecessary else.
2014-10-20 Oliver Stannard[ARM] Do not select SMULW[BT] or SMLAW[BT]
2014-10-20 Oliver Stannard[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex
2014-10-19 Bob WilsonUse triple predicate functions instead of checking...
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw xchg
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw xor
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw or
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw min/umin
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw max/umax
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw and
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw sub
2014-10-17 Bill Schmidt[PowerPC] Change assert to better form
2014-10-17 Matt ArsenaultR600/SI: Remove redundant setting of instruction bits
2014-10-17 Bill Schmidt[PowerPC] Change liveness testing in VSX FMA mutation...
2014-10-17 Matt ArsenaultFix typo
2014-10-17 Matt ArsenaultR600/SI: Also check for FPImm literal constants
2014-10-17 Matt ArsenaultR600/SI: Allow commuting with source modifiers
2014-10-17 Matt ArsenaultR600/SI: Simplify code with hasModifiersSet
2014-10-17 Matt ArsenaultR600/SI: Fix general commuting breaking src mods
2014-10-17 Matt ArsenaultR600/SI: Cleanup code with ChangeToFPImmediate
2014-10-17 Matt ArsenaultR600/SI: Allow comuting fp immediates
2014-10-17 Matt ArsenaultR600/SI: Use early return instead of checking condition...
2014-10-17 Matt ArsenaultR600/SI: Use complex pattern for MUBUF load patterns.
2014-10-17 Matt ArsenaultR600/SI: Remove SI_BUFFER_RSRC pseudo
2014-10-17 Andrea Di Biagio[X86] Fix missed selection of non-temporal store of...
2014-10-17 James Molloy[AArch64] Fix a silent codegen fault in BUILD_VECTOR...
2014-10-17 Bill Schmidt[PowerPC] Enable use of lxvw4x/stxvw4x in VSX code...
2014-10-17 Jan VeselyMips: Only set divrem i64 to custom on 64bit
2014-10-17 Vasileios Kalintiris[mips] Add support for COP1's Branch-On-Cond-Likely...
2014-10-17 Vasileios Kalintiris[mips] Add support for COP0's Branch-On-Cond-Likely...
2014-10-17 Akira HatanakaARM: Fix a bug which was causing convergence failure...
2014-10-17 Matt ArsenaultR600/SI: Simplify debug printing
2014-10-16 Matt ArsenaultR600/SI: Remove another VALU pattern
2014-10-16 Robin MorissetErase fence insertion from SelectionDAGBuilder.cpp...
2014-10-16 Matt ArsenaultR600/SI: Remove unnecessary VALU patterns
2014-10-16 Matt ArsenaultR600: Fix nonsensical implementation of computeKnownBit...
2014-10-16 Rafael EspindolaDelete -std-compile-opts.
2014-10-16 Juergen Ributzka[AArch64] Fix miscompile of sdiv-by-power-of-2.
2014-10-16 Vasileios Kalintiris[mips] Account for endianess when expanding BuildPairF6...
2014-10-16 Vasileios Kalintiris[mips] Marked the DI/EI instruction aliases as MIPS32r2
2014-10-16 Vasileios KalintirisTest commit access: remove extra new line at the end...
2014-10-16 Matt ArsenaultR600: Remove dead function
2014-10-15 Adam Nemet[AVX512] Add DQ subvector inserts
2014-10-15 Adam Nemet[AVX512] Two new attributes in X86VectorVTInfo for...
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