[X86][SSE] Vector integer/float conversion memory folding
[oota-llvm.git] / lib / Target / R600 /
2014-10-21 Matt ArsenaultAdd minnum / maxnum codegen
2014-10-21 Matt ArsenaultR600/SI: Add missing parameter to div_fmas intrinsic
2014-10-21 Matt ArsenaultR600: Use default GlobalDirective
2014-10-21 Rafael EspindolaDrop support for an old version of ld64 (from darwin 9).
2014-10-21 Matt ArsenaultR600/SI: Add pattern for bswap
2014-10-21 Rafael EspindolaFix a bit of confusion about .set and produce more...
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw xchg
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw xor
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw or
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw min/umin
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw max/umax
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw and
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw sub
2014-10-17 Matt ArsenaultR600/SI: Remove redundant setting of instruction bits
2014-10-17 Matt ArsenaultFix typo
2014-10-17 Matt ArsenaultR600/SI: Also check for FPImm literal constants
2014-10-17 Matt ArsenaultR600/SI: Allow commuting with source modifiers
2014-10-17 Matt ArsenaultR600/SI: Simplify code with hasModifiersSet
2014-10-17 Matt ArsenaultR600/SI: Fix general commuting breaking src mods
2014-10-17 Matt ArsenaultR600/SI: Cleanup code with ChangeToFPImmediate
2014-10-17 Matt ArsenaultR600/SI: Allow comuting fp immediates
2014-10-17 Matt ArsenaultR600/SI: Use early return instead of checking condition...
2014-10-17 Matt ArsenaultR600/SI: Use complex pattern for MUBUF load patterns.
2014-10-17 Matt ArsenaultR600/SI: Remove SI_BUFFER_RSRC pseudo
2014-10-17 Matt ArsenaultR600/SI: Simplify debug printing
2014-10-16 Matt ArsenaultR600/SI: Remove another VALU pattern
2014-10-16 Matt ArsenaultR600/SI: Remove unnecessary VALU patterns
2014-10-16 Matt ArsenaultR600: Fix nonsensical implementation of computeKnownBit...
2014-10-16 Matt ArsenaultR600: Remove dead function
2014-10-15 Matt ArsenaultR600: Remove unnecessary part of computeKnownBitsForTar...
2014-10-15 Matt ArsenaultMove variable down to use
2014-10-15 Tom StellardR600/SI: Fix bug where immediates were being used in...
2014-10-15 Matt ArsenaultR600/SI: Also try to use 0 base for misaligned 8-byte...
2014-10-15 Matt ArsenaultR600: Fix miscompiles when BFE has multiple uses
2014-10-15 Rafael EspindolaSimplify handling of --noexecstack by using getNonexecu...
2014-10-15 Rafael EspindolaMove getNonexecutableStackSection up to the base ELF...
2014-10-15 Matt ArsenaultR600: Use existing variable
2014-10-15 Matt ArsenaultR600: Remove outdated comment
2014-10-14 Jan VeselyReapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 Rafael EspindolaRevert "R600: Add new intrinsic to read work dimensions"
2014-10-14 Jan VeselyR600: Add new intrinsic to read work dimensions
2014-10-14 Jan VeselyR600: FMA is VecALU only instruction
2014-10-14 Matt ArsenaultR600/SI: Use DS offsets for constant addresses
2014-10-13 Matt ArsenaultR600/SI: Minor cleanup of function
2014-10-10 Matt ArsenaultR600/SI: Change how DS offsets are printed
2014-10-10 Matt ArsenaultR600/SI: Match read2/write2 stride 64 versions
2014-10-10 Matt ArsenaultR600/SI: Add load / store machine optimizer pass.
2014-10-10 Matt ArsenaultR600/SI: Disable copying of SCC
2014-10-09 Matt ArsenaultFix typo
2014-10-09 Tom StellardR600/SI: Legalize CopyToReg during instruction selection
2014-10-09 Tom StellardR600/SI: Legalize INSERT_SUBREG instructions during...
2014-10-09 Eric ChristopherRemove unused argument to CreateTargetScheduleState...
2014-10-07 Tom StellardR600/SI: Refactor VOP3 instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOPC instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOP2 instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOP1 instruction defs
2014-10-07 Matt ArsenaultR600: Remove dead code
2014-10-07 Tom StellardR600: Remove some redundant initializations from AMDGPU...
2014-10-07 Tom StellardR600: Use MCAsmInfoELF as AMDGPUMCAsmInfo base class
2014-10-07 Tom StellardR600/SI: Remove assertion in SIInstrInfo::areLoadsFromS...
2014-10-04 Benjamin KramerRemove unnecessary copying or replace it with moves...
2014-10-03 Matt ArsenaultR600/SI: Custom lower f64 -> i64 conversions
2014-10-03 Matt ArsenaultR600: Custom lower [s|u]int_to_fp for i64 -> f64
2014-10-03 Matt ArsenaultR600/SI: Fix ftrunc f64 conformance failures.
2014-10-03 Tom StellardR600: Align functions to 256 bytes
2014-10-03 Benjamin KramerEliminate some deep std::vector copies. NFC.
2014-10-01 Tom StellardR600: Call EmitFunctionHeader() in the AsmPrinter to...
2014-10-01 Tom StellardR600/SI: Add a generic pseudo EXP instruction
2014-10-01 Tom StellardR600/SI: Add generic pseudo MTBUF instructions
2014-10-01 Tom StellardR600/SI: Add generic pseudo SMRD instructions
2014-09-30 Matt ArsenaultR600/SI: Fix printing of clamp and omod
2014-09-30 Matt ArsenaultR600/SI: Update VOP3b to not include obsolete operands
2014-09-30 Matt ArsenaultFix missing C++ mode comment
2014-09-29 Matt ArsenaultFix include order
2014-09-29 Matt ArsenaultR600/SI: Fix hardcoded values for modifiers.
2014-09-29 Matt ArsenaultR600/SI: Also fix fsub + fadd a, a to mad combines
2014-09-29 Matt ArsenaultR600/SI: Fix using mad with multiplies by 2
2014-09-26 Matt ArsenaultR600/SI: Use break instead of continue
2014-09-26 Matt ArsenaultR600/SI: Add a note about the order of the operands...
2014-09-26 Matt ArsenaultR600/SI: Move finding SGPR operand to move to separate...
2014-09-26 Matt ArsenaultR600/SI Allow same SGPR to be used for multiple operands
2014-09-26 Matt ArsenaultR600/SI: Partially move operand legalization to post...
2014-09-26 Matt ArsenaultR600/SI: Implement findCommutedOpIndices
2014-09-26 Matt ArsenaultR600/SI: Don't move operands that are required to be...
2014-09-26 Matt ArsenaultR600/SI: Don't assert on exotic operand types
2014-09-26 Matt ArsenaultR600/SI: Fix using wrong operand indices when commuting
2014-09-26 Matt ArsenaultR600/SI: Remove apparently dead code in legalizeOperands
2014-09-26 Matt ArsenaultR600/SI: Fix emitting trailing whitespace after s_waitcnt
2014-09-25 Tom StellardR600/SI: Add support for global atomic add
2014-09-24 Aaron BallmanSilencing an "enumeral and non-enumeral type in conditi...
2014-09-24 Matt ArsenaultR600/SI: Add new helper isSGPRClassID
2014-09-24 Matt ArsenaultR600/SI: Fix hardcoded and wrong operand numbers.
2014-09-24 Matt ArsenaultR600/SI: Enable named operand table for SALU instructions
2014-09-24 Tom StellardR600/SI: Enable selecting SALU inside branches
2014-09-24 Tom StellardR600/SI: Move PHIs that define SGPRs to the VALU in...
2014-09-24 Tom StellardR600/SI: Fix the FixSGPRLiveRanges pass
2014-09-24 Tom StellardR600/SI: Mark EXEC_LO and EXEC_HI as reserved
2014-09-24 Tom StellardR600/SI: Fix SIRegisterInfo::getPhysRegSubReg()
2014-09-24 Tom StellardR600/SI: Implement VGPR register spilling for compute...
2014-09-23 Tom StellardR600/SI: Clean up checks for legality of immediate...
next