R600/SI: Don't set isCodeGenOnly = 1 on all instructions
[oota-llvm.git] / lib / Target / R600 / SIInstrInfo.td
2015-02-18 Tom StellardR600/SI: Don't set isCodeGenOnly = 1 on all instructions
2015-02-18 Tom StellardR600/SI: Add missing VOP1 instructions
2015-02-18 Tom StellardR600/SI: Add definition for S_CBRANCH_G_FORK
2015-02-18 Tom StellardR600/SI: Add missing SOP1 instructions
2015-02-18 Tom StellardR600/SI: Refactor SOP2 definitions
2015-02-18 Matt ArsenaultR600/SI: Consistently capitalize encoding field names
2015-02-18 Matt ArsenaultR600/SI: Fix src1_modifiers for class instructions
2015-02-18 Matt ArsenaultR600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64
2015-02-18 Matt ArsenaultR600/SI: Fix encoding error from glc bit on VI SMRD...
2015-02-18 Matt ArsenaultR600/SI: Fix operand encoding for flat instructions
2015-02-18 Matt ArsenaultR600/SI: Fix error from vdst on no return atomics
2015-02-18 Matt ArsenaultR600/SI: Add missing offset operand to buffer bothen
2015-02-18 Matt ArsenaultR600/SI: Add missing soffset operand to global atomics
2015-02-14 Matt ArsenaultR600/SI: Fix implicit vcc operand to v_div_fmas_*
2015-02-14 Matt ArsenaultR600/SI: Fix not encoding src2 for v_div_scale_{f32...
2015-02-14 Matt ArsenaultR600/SI: Fix VOP3b encoding on VI
2015-02-13 Tom StellardR600/SI: Refactor SOP1 classes
2015-02-13 Tom StellardR600/SI: Remove some unused TableGen classes
2015-02-11 Tom StellardR600/SI: Add soffset operand to mubuf addr64 instruction
2015-02-06 Michel DanzerR600/SI: Also enable WQM for image opcodes which calcul...
2015-02-03 Marek OlsakR600/SI: Rewrite VOP1InstSI to contain a pseudo and...
2015-02-03 Marek OlsakR600/SI: Fix B64 VALU shifts on VI
2015-02-03 Marek OlsakR600/SI: Don't generate non-existent LSHL, LSHR, ASHR...
2015-02-03 Marek OlsakR600/SI: Remove VOP2_REV definitions from target-specif...
2015-02-03 Marek OlsakR600/SI: Trivial instruction definition corrections...
2015-01-30 Eric ChristopherReuse a bunch of cached subtargets and remove getSubtar...
2015-01-27 Marek OlsakR600/SI: Don't set patterns for chip-specific instructi...
2015-01-27 Marek OlsakR600/SI: Add VI versions of LDS atomics
2015-01-27 Marek OlsakR600/SI: Add VI versions of MUBUF atomics
2015-01-27 Marek OlsakR600/SI: Add VI versions of MUBUF loads and stores
2015-01-27 Marek OlsakR600/SI: Add pseudos for MUBUF loads and stores
2015-01-15 Matt ArsenaultR600/SI: Fix trailing comma with modifiers
2015-01-15 Marek OlsakR600/SI: Unify VOP2 instructions which are VOP3-only...
2015-01-15 Marek OlsakR600/SI: Add V_READLANE_B32 and V_WRITELANE_B32 for VI
2015-01-15 Marek OlsakR600/SI: Don't shrink instructions whose e32 encoding...
2015-01-14 Tom StellardR600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-13 Tom StellardR600/SI: Add pattern for bitcasting fp immediates to...
2015-01-12 Tom StellardR600/SI: Use RegisterOperands to specify which operands...
2015-01-07 Tom StellardR600/SI: Remove VReg_32 register class
2015-01-06 Matt ArsenaultR600/SI: Add class intrinsic
2014-12-19 Tom StellardR600/SI: Make sure non-inline constants aren't folded...
2014-12-17 Matt ArsenaultR600/SI: Fix f64 inline immediates
2014-12-09 Tom StellardR600/SI: Set MayStore = 0 on MUBUF loads
2014-12-09 Tom StellardR600/SI: Move setting of the lds bit to the base MUBUF...
2014-12-07 Marek OlsakR600/SI: Set 20-bit immediate byte offset for SMRD...
2014-12-07 Marek OlsakR600/SI: Add VI instructions
2014-12-03 Matt ArsenaultR600/SI: Remove i1 pseudo VALU ops
2014-12-01 Matt ArsenaultR600/SI: Various instruction format bit test cleanups
2014-11-21 Tom StellardR600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-18 Matt ArsenaultR600/SI: Set hasSideEffects = 0 on load and store instr...
2014-11-14 Matt ArsenaultR600/SI: Use S_BFE_I64 for 64-bit sext_inreg
2014-11-13 Matt ArsenaultR600/SI: Use s_movk_i32
2014-11-13 Matt ArsenaultR600/SI: Fix definition for s_cselect_b32
2014-11-13 Matt ArsenaultR600/SI: Get rid of FCLAMP_SI pseudo
2014-11-05 Matt ArsenaultR600/SI: Fix omod display for VOP3b
2014-11-05 Tom StellardR600/SI: Change all instruction assembly names to lower...
2014-11-04 Matt ArsenaultR600/SI: Rename div_scale dest operands to match docume...
2014-10-10 Matt ArsenaultR600/SI: Change how DS offsets are printed
2014-10-07 Tom StellardR600/SI: Refactor VOP3 instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOPC instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOP2 instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOP1 instruction defs
2014-10-01 Tom StellardR600/SI: Add a generic pseudo EXP instruction
2014-10-01 Tom StellardR600/SI: Add generic pseudo MTBUF instructions
2014-10-01 Tom StellardR600/SI: Add generic pseudo SMRD instructions
2014-09-30 Matt ArsenaultR600/SI: Fix printing of clamp and omod
2014-09-30 Matt ArsenaultR600/SI: Update VOP3b to not include obsolete operands
2014-09-25 Tom StellardR600/SI: Add support for global atomic add
2014-09-23 Tom StellardR600/SI: Clean up checks for legality of immediate...
2014-09-22 Tom StellardRevert "R600/SI: Add support for global atomic add"
2014-09-22 Tom StellardR600/SI: Add support for global atomic add
2014-09-15 Matt ArsenaultR600/SI: Add preliminary support for flat address space
2014-09-08 Matt ArsenaultR600/SI: Replace LDS atomics with no return versions
2014-09-08 Matt ArsenaultR600/SI: Add InstrMapping for noret atomics.
2014-08-29 Matt ArsenaultR600/SI: Use mad for fsub + fmul
2014-08-22 Tom StellardR600/SI: Use READ2/WRITE2 instructions for 64-bit mem...
2014-08-22 Tom StellardR600/SI: Use a ComplexPattern for DS loads and stores
2014-08-22 Tom StellardR600/SI: Use correct helper class for DS_WRITE2 instruc...
2014-08-11 Tom StellardR600/SI: Add a ComplexPattern for selecting MUBUF _OFFS...
2014-08-11 Tom StellardR600/SI: Add an _OFFEN variant MUBUF_STORE_* and use...
2014-08-11 Tom StellardR600/SI: Clear lds bit on MUBUF instructions used for...
2014-08-05 Tom StellardR600/SI: Update MUBUF assembly string to match AMD...
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn...
2014-08-04 Matt ArsenaultR600/SI: Fix definitions for ds_read2 / ds_write2 instr...
2014-08-03 Matt ArsenaultR600/SI: Fix extra whitespace in asm str
2014-08-01 Matt ArsenaultR600/SI: Don't display GDS bit for read2
2014-08-01 Tom StellardR600/SI: Do abs/neg folding with ComplexPatterns
2014-07-21 Tom StellardR600/SI: Refactor VOP3 instruction definitions
2014-07-21 Tom StellardR600/SI: Initailize encoding fields of unused VOP3...
2014-07-21 Tom StellardR600/SI: Initialize unused VOP3 sources to 0 instead...
2014-07-21 Tom StellardR600/SI: Add instruction shrinking pass
2014-07-21 Tom StellardR600/SI: VOPC instructions explicitly define VCC
2014-07-21 Tom StellardR600/SI: Use scratch memory for large private arrays
2014-07-21 Tom StellardR600/SI: Remove vaddr operand from BUFFER_LOAD_*_OFFSET...
2014-07-21 Tom StellardR600/SI: Store constant initializer data in constant...
2014-07-21 Tom StellardR600/SI: Use a custom encoding method for simm16 in...
2014-07-02 Tom StellardR600/SI: Use a ComplexPattern for ADDR64 addressing...
2014-06-24 Tom StellardR600/SI: Use a ComplexPattern for MUBUF stores
2014-06-23 Matt ArsenaultR600/SI: Fix div_scale intrinsic.
2014-06-18 Marek OlsakR600/SI: add gather4 and getlod intrinsics (v3)
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