Revert 239644.
[oota-llvm.git] / lib / Target / R600 / SIISelLowering.h
2015-06-01 Matt ArsenaultAdd address space argument to isLegalAddressingMode
2015-05-12 Tom StellardR600/SI: Remove explicit m0 operand from s_sendmsg
2015-04-08 Tom StellardR600/SI: Add some missing overrides
2015-04-08 Tom StellardR600/SI: Initial support for assembler and inline assembly
2015-02-24 Tom StellardR600/SI: Remove isel mubuf legalization
2015-01-30 Eric ChristopherReuse a bunch of cached subtargets and remove getSubtar...
2015-01-29 Matt ArsenaultR600/SI: Implement enableAggressiveFMAFusion
2015-01-14 Matt ArsenaultR600/SI: Fix bad code with unaligned byte vector loads
2015-01-08 Tom StellardR600/SI: Remove SIISelLowering::legalizeOperands()
2015-01-06 Matt ArsenaultR600/SI: Add combine for isinfinite pattern
2015-01-06 Matt ArsenaultR600/SI: Pattern match isinf to v_cmp_class instructions
2015-01-06 Matt ArsenaultR600/SI: Add basic DAG combines for fp_class
2014-11-14 Matt ArsenaultR600/SI: Combine min3/max3 instructions
2014-11-05 Matt ArsenaultR600/SI: Move all rsrc building functions to SIISelLowering
2014-11-05 Matt ArsenaultR600/SI: Remove SI_ADDR64_RSRC
2014-10-21 Matt ArsenaultR600/SI: Add pattern for bswap
2014-10-09 Tom StellardR600/SI: Legalize CopyToReg during instruction selection
2014-10-03 Matt ArsenaultR600: Custom lower [s|u]int_to_fp for i64 -> f64
2014-09-26 Matt ArsenaultR600/SI: Partially move operand legalization to post...
2014-09-17 Matt ArsenaultR600/SI: Remove promotion of instructions to e64 forms.
2014-08-15 Matt ArsenaultR600/SI: Fix offset folding in some cases with shifted...
2014-08-15 Matt ArsenaultR600/SI: Implement isLegalAddressingMode
2014-08-13 Benjamin KramerCanonicalize header guards into a common format.
2014-07-28 Matt ArsenaultR600/SI: Implement getOptimalMemOpType
2014-07-27 Matt ArsenaultAdd alignment value to allowsUnalignedMemoryAccess
2014-07-26 Matt ArsenaultR600: Move intrinsic lowering to separate functions
2014-07-21 Tom StellardR600/SI: Use scratch memory for large private arrays
2014-07-21 Tom StellardR600/SI: Store constant initializer data in constant...
2014-07-19 Matt ArsenaultR600/SI: implement range reduction for sin/cos
2014-07-15 Matt ArsenaultR600/SI: Allow using f32 rcp / rsq when denormals not...
2014-07-15 Matt ArsenaultR600/SI: Implement less wrong f32 fdiv
2014-07-03 Chandler Carruth[codegen,aarch64] Add a target hook to the code generat...
2014-06-11 Matt ArsenaultR600/SI: Use v_cvt_f32_ubyte* instructions
2014-06-10 Matt ArsenaultR600/SI: Handle sign_extend and zero_extend to i64...
2014-06-10 Tom StellardSelectionDAG: Expand SELECT_CC to SELECT + SETCC
2014-04-29 Craig Topper[C++11] Add 'override' keywords and remove 'virtual...
2014-04-17 Tom StellardR600/SI: Stop using i128 as the resource descriptor...
2014-04-11 Matt ArsenaultR600: Check if a sextload should be used for parameter...
2014-03-31 Matt ArsenaultChange shouldSplitVectorElementType to better match...
2014-03-31 Matt ArsenaultR600/SI: Implement shouldConvertConstantLoadToIntImm
2014-02-25 Tom StellardR600/SI: Custom select 64-bit ADD
2014-02-05 Matt ArsenaultAdd address space argument to allowsUnalignedMemoryAccess.
2014-02-04 Tom StellardR600/SI: Custom lower i64 ISD::SELECT
2013-11-18 Matt ArsenaultR600/SI: Implement add i64, but do not yet enable.
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments
2013-08-14 Tom StellardR600/SI: Improve legalization of vector operations
2013-08-14 Tom StellardR600/SI: Convert v16i8 resource descriptors to i128
2013-08-10 Niels Ole SalscheiderR600/SI: FMA is faster than fmul and fadd for f64
2013-08-06 Tom StellardR600/SI: Add more special cases for opcodes to ensureSR...
2013-08-01 Tom StellardR600/SI: Custom lower i64 ZERO_EXTEND
2013-06-25 Tom StellardR600/SI: Report unaligned memory accesses as legal...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-03 Tom StellardR600/SI: Add support for work item and work group intri...
2013-06-03 Tom StellardR600/SI: Custom lower i64 sign_extend
2013-06-03 Tom StellardR600/SI: Adjust some instructions' out register class...
2013-06-03 Tom StellardR600/SI: Rework MUBUF store instructions
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4.
2013-05-20 Tom StellardR600/SI: Make fitsRegClass() operands const
2013-05-18 Matt ArsenaultAdd LLVMContext argument to getSetCCResultType
2013-04-10 Christian KonigR600/SI: dynamical figure out the reg class of MIMG
2013-04-10 Christian KonigR600/SI: adjust writemask to only the used components
2013-04-05 Tom StellardR600/SI: Add support for buffer stores v2
2013-03-26 Christian KonigR600/SI: replace WQM intrinsic
2013-03-18 Christian KonigR600/SI: add shl pattern
2013-03-07 Christian KonigR600/SI: rework input interpolation v2
2013-03-07 Christian KonigR600/SI: remove SGPR address space v2
2013-03-07 Christian KonigR600/SI: add proper formal parameter handling for SI
2013-02-26 Christian KonigR600/SI: add post ISel folding for SI v2
2013-02-26 Christian KonigR600/SI: add folding helper
2013-02-21 Christian KonigR600/SI: replace SI_V_CNDLT with a pattern
2013-02-16 Christian KonigR600/SI: nuke SReg_1 v3
2013-02-14 Michel DanzerR600/SI: Fix int_SI_fs_interp_constant
2013-01-18 Tom StellardR600: Proper insert S_WAITCNT instructions
2013-01-18 Tom StellardR600: Optimize and cleanup KILL on SI
2012-12-19 Tom StellardR600: New control flow for SI v2
2012-12-11 Tom StellardAdd R600 backend