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R600/SI: Add pattern for bswap
[oota-llvm.git] / lib / Target / R600 / SIISelLowering.cpp
2014-10-21 Matt ArsenaultR600/SI: Add pattern for bswap blob | commitdiff | raw
2014-10-17 Matt ArsenaultR600/SI: Remove SI_BUFFER_RSRC pseudo blob | commitdiff | raw | diff to current
2014-10-14 Jan VeselyReapply "R600: Add new intrinsic to read work dimensions" blob | commitdiff | raw | diff to current
2014-10-14 Rafael EspindolaRevert "R600: Add new intrinsic to read work dimensions" blob | commitdiff | raw | diff to current
2014-10-14 Jan VeselyR600: Add new intrinsic to read work dimensions blob | commitdiff | raw | diff to current
2014-10-09 Tom StellardR600/SI: Legalize CopyToReg during instruction selection blob | commitdiff | raw | diff to current
2014-10-09 Tom StellardR600/SI: Legalize INSERT_SUBREG instructions during... blob | commitdiff | raw | diff to current
2014-10-03 Matt ArsenaultR600/SI: Custom lower f64 -> i64 conversions blob | commitdiff | raw | diff to current
2014-09-29 Matt ArsenaultR600/SI: Also fix fsub + fadd a, a to mad combines blob | commitdiff | raw | diff to current
2014-09-29 Matt ArsenaultR600/SI: Fix using mad with multiplies by 2 blob | commitdiff | raw | diff to current
2014-09-26 Matt ArsenaultR600/SI: Partially move operand legalization to post... blob | commitdiff | raw | diff to current
2014-09-26 Matt ArsenaultR600/SI: Remove apparently dead code in legalizeOperands blob | commitdiff | raw | diff to current
2014-09-23 Tom StellardR600/SI: Clean up checks for legality of immediate... blob | commitdiff | raw | diff to current
2014-09-22 Tom StellardR600/SI: Add enums for some hard-coded values blob | commitdiff | raw | diff to current
2014-09-17 Matt ArsenaultR600/SI: Remove promotion of instructions to e64 forms. blob | commitdiff | raw | diff to current
2014-09-10 Matt ArsenaultR600/SI: Fix losing chain when fixing reg class of... blob | commitdiff | raw | diff to current
2014-09-08 Matt ArsenaultR600/SI: Fix assertion from copying a TargetGlobalAddress blob | commitdiff | raw | diff to current
2014-09-08 Matt ArsenaultR600/SI: Replace LDS atomics with no return versions blob | commitdiff | raw | diff to current
2014-08-29 Matt ArsenaultR600/SI: Use mad for fsub + fmul blob | commitdiff | raw | diff to current
2014-08-27 Alexey SamsonovUse BitVector instead of int in R600 SIISelLowering. blob | commitdiff | raw | diff to current
2014-08-22 Tom StellardR600/SI: Wrap local memory pointer in AssertZExt on SI blob | commitdiff | raw | diff to current
2014-08-21 Tom StellardR600/SI: Make sure SCRATCH_WAVE_OFFSET is added as... blob | commitdiff | raw | diff to current
2014-08-18 Aaron BallmanSilencing an MSVC warning about loop variable conflicti... blob | commitdiff | raw | diff to current
2014-08-15 Matt ArsenaultR600/SI: Move all fabs / fneg handling to patterns blob | commitdiff | raw | diff to current
2014-08-15 Matt ArsenaultR600/SI: Use source modifiers for f64 fneg blob | commitdiff | raw | diff to current
2014-08-15 Matt ArsenaultR600/SI: Use source modifier for f64 fabs blob | commitdiff | raw | diff to current
2014-08-15 Matt ArsenaultR600/SI: Fix offset folding in some cases with shifted... blob | commitdiff | raw | diff to current
2014-08-15 Matt ArsenaultR600/SI: Implement isLegalAddressingMode blob | commitdiff | raw | diff to current
2014-08-09 Tom StellardR600/SI: Custom lower CONCAT_VECTORS blob | commitdiff | raw | diff to current
2014-08-06 Eric ChristopherRemove the target machine from CCState. Previously... blob | commitdiff | raw | diff to current
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn... blob | commitdiff | raw | diff to current
2014-08-02 Matt ArsenaultR600/SI: Fix formatting. blob | commitdiff | raw | diff to current
2014-08-01 Chandler Carruth[SDAG] MorphNodeTo recursively deletes dead operands... blob | commitdiff | raw | diff to current
2014-08-01 Tom StellardR600/SI: Do abs/neg folding with ComplexPatterns blob | commitdiff | raw | diff to current
2014-07-28 Matt ArsenaultR600/SI: Implement getOptimalMemOpType blob | commitdiff | raw | diff to current
2014-07-28 Matt ArsenaultR600/SI: Make argument loads invariant blob | commitdiff | raw | diff to current
2014-07-27 Matt ArsenaultAdd alignment value to allowsUnalignedMemoryAccess blob | commitdiff | raw | diff to current
2014-07-26 Matt ArsenaultR600: Move intrinsic lowering to separate functions blob | commitdiff | raw | diff to current
2014-07-24 Matt ArsenaultR600: Add new functions for splitting vector loads... blob | commitdiff | raw | diff to current
2014-07-21 Tom StellardR600/SI: Clean up some of the unused REGISTER_{LOAD... blob | commitdiff | raw | diff to current
2014-07-21 Tom StellardR600/SI: Use scratch memory for large private arrays blob | commitdiff | raw | diff to current
2014-07-21 Tom StellardR600/SI: Store constant initializer data in constant... blob | commitdiff | raw | diff to current
2014-07-20 NAKAMURA TakumiSIISelLowering.cpp: Define _USE_MATH_DEFINES to let... blob | commitdiff | raw | diff to current
2014-07-20 Matt ArsenaultR600/SI: Remove dead code and add missing tests. blob | commitdiff | raw | diff to current
2014-07-19 Matt ArsenaultR600/SI: implement range reduction for sin/cos blob | commitdiff | raw | diff to current
2014-07-15 Matt ArsenaultR600/SI: Allow using f32 rcp / rsq when denormals not... blob | commitdiff | raw | diff to current
2014-07-15 Matt ArsenaultR600/SI: Fix select on i1 blob | commitdiff | raw | diff to current
2014-07-15 Matt ArsenaultR600/SI: Implement less wrong f32 fdiv blob | commitdiff | raw | diff to current
2014-07-13 Matt ArsenaultR600: Make ShaderType private blob | commitdiff | raw | diff to current
2014-07-10 Jan VeselyR600: Implement float to long/ulong blob | commitdiff | raw | diff to current
2014-07-07 Matt ArsenaultR600: Fix mishandling of load / store chains. blob | commitdiff | raw | diff to current
2014-07-03 Chandler Carruth[codegen,aarch64] Add a target hook to the code generat... blob | commitdiff | raw | diff to current
2014-07-02 Tom StellardR600: Promote i64 loads to v2i32 blob | commitdiff | raw | diff to current
2014-06-24 Tom StellardR600: Promote i64 stores to v2i32 blob | commitdiff | raw | diff to current
2014-06-23 Matt ArsenaultR600: Move more out of AMDILISelLowering blob | commitdiff | raw | diff to current
2014-06-23 Matt ArsenaultR600/SI: Handle i64 sub. blob | commitdiff | raw | diff to current
2014-06-23 Matt ArsenaultR600: Rename AMDIL file blob | commitdiff | raw | diff to current
2014-06-18 Matt ArsenaultR600/SI: Prettier operand printing for 64-bit ops. blob | commitdiff | raw | diff to current
2014-06-18 Matt ArsenaultR600/SI: Temporary fix for f64 fneg blob | commitdiff | raw | diff to current
2014-06-11 Matt ArsenaultR600/SI: Use v_cvt_f32_ubyte* instructions blob | commitdiff | raw | diff to current
2014-06-10 Matt ArsenaultR600: Use BCNT_INT for evergreen blob | commitdiff | raw | diff to current
2014-06-10 Matt ArsenaultR600/SI: Implement i64 ctpop blob | commitdiff | raw | diff to current
2014-06-10 Matt ArsenaultR600/SI: Use bcnt instruction for ctpop blob | commitdiff | raw | diff to current
2014-06-10 Matt ArsenaultR600/SI: Handle sign_extend and zero_extend to i64... blob | commitdiff | raw | diff to current
2014-06-10 Tom StellardSelectionDAG: Expand SELECT_CC to SELECT + SETCC blob | commitdiff | raw | diff to current
2014-06-05 Matt ArsenaultUse nullptr blob | commitdiff | raw | diff to current
2014-06-03 Matt ArsenaultFix typos blob | commitdiff | raw | diff to current
2014-05-22 Matt ArsenaultR600: Add dag combine for BFE blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Promote f32 SELECT to i32 blob | commitdiff | raw | diff to current
2014-05-15 Matt ArsenaultUse range for blob | commitdiff | raw | diff to current
2014-05-15 Tom StellardR600/SI: Stop using VSrc_* as the default register... blob | commitdiff | raw | diff to current
2014-05-10 Vincent LejeuneR600/SI: Fold fabs/fneg into src input modifier blob | commitdiff | raw | diff to current
2014-05-10 Vincent LejeuneR600/SI: Prettier display of input modifiers blob | commitdiff | raw | diff to current
2014-05-10 Vincent LejeuneR600/SI: Use pseudo instruction for fabs/clamp/fneg blob | commitdiff | raw | diff to current
2014-05-09 Tom StellardR600: Move MIN/MAX matching from LowerOperation() to... blob | commitdiff | raw | diff to current
2014-04-30 Tom StellardR600/SI: Use VALU instructions for copying i1 values blob | commitdiff | raw | diff to current
2014-04-29 Tom StellardR600/SI: Custom lower SI_IF and SI_ELSE to avoid machin... blob | commitdiff | raw | diff to current
2014-04-29 Tom StellardR600: Change UDIV/UREM to UDIVREM when legalizing types blob | commitdiff | raw | diff to current
2014-04-28 Craig TopperConvert more SelectionDAG functions to use ArrayRef. blob | commitdiff | raw | diff to current
2014-04-27 Craig TopperConvert SelectionDAG::MorphNodeTo to use ArrayRef. blob | commitdiff | raw | diff to current
2014-04-27 Craig TopperConvert SelectionDAG::getMergeValues to use ArrayRef. blob | commitdiff | raw | diff to current
2014-04-26 Craig TopperConvert getMemIntrinsicNode to take ArrayRef of SDValue... blob | commitdiff | raw | diff to current
2014-04-26 Craig TopperConvert SelectionDAG::getNode methods to use ArrayRef... blob | commitdiff | raw | diff to current
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition. blob | commitdiff | raw | diff to current
2014-04-24 Matt ArsenaultR600/SI: Use address space in allowsUnalignedMemoryAccesses blob | commitdiff | raw | diff to current
2014-04-22 Matt ArsenaultR600: Make sign_extend_inreg legal. blob | commitdiff | raw | diff to current
2014-04-18 Matt ArsenaultR600/SI: Match sign_extend_inreg to s_sext_i32_i8 and... blob | commitdiff | raw | diff to current
2014-04-17 Tom StellardR600/SI: Stop using i128 as the resource descriptor... blob | commitdiff | raw | diff to current
2014-04-17 Tom StellardR600/SI: Change default register class for i32 to SReg_32 blob | commitdiff | raw | diff to current
2014-04-17 Matt ArsenaultR600/SI: f64 frint is legal on CI blob | commitdiff | raw | diff to current
2014-04-17 Matt ArsenaultR600/SI: Fix zext from i1 to i64 blob | commitdiff | raw | diff to current
2014-04-16 Craig TopperConvert SelectionDAG::getVTList to use ArrayRef blob | commitdiff | raw | diff to current
2014-04-16 Matt ArsenaultR600: Expand sign extension of vectors. blob | commitdiff | raw | diff to current
2014-04-15 Matt ArsenaultR600/SI: Fix loads of i1 blob | commitdiff | raw | diff to current
2014-04-11 Matt ArsenaultR600: Check if a sextload should be used for parameter... blob | commitdiff | raw | diff to current
2014-04-07 Tom StellardR600: Match 24-bit arithmetic patterns in a Target... blob | commitdiff | raw | diff to current
2014-04-07 Matt ArsenaultUse std::swap blob | commitdiff | raw | diff to current
2014-04-03 Tom StellardR600/SI: Lower 64-bit immediates using REG_SEQUENCE blob | commitdiff | raw | diff to current
2014-03-31 Matt ArsenaultChange shouldSplitVectorElementType to better match... blob | commitdiff | raw | diff to current
2014-03-31 Matt ArsenaultR600/SI: Implement shouldConvertConstantLoadToIntImm blob | commitdiff | raw | diff to current
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