Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>.
[oota-llvm.git] / lib / Target / R600 / SIISelLowering.cpp
2014-04-26 Craig TopperConvert SelectionDAG::getNode methods to use ArrayRef...
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition.
2014-04-24 Matt ArsenaultR600/SI: Use address space in allowsUnalignedMemoryAccesses
2014-04-22 Matt ArsenaultR600: Make sign_extend_inreg legal.
2014-04-18 Matt ArsenaultR600/SI: Match sign_extend_inreg to s_sext_i32_i8 and...
2014-04-17 Tom StellardR600/SI: Stop using i128 as the resource descriptor...
2014-04-17 Tom StellardR600/SI: Change default register class for i32 to SReg_32
2014-04-17 Matt ArsenaultR600/SI: f64 frint is legal on CI
2014-04-17 Matt ArsenaultR600/SI: Fix zext from i1 to i64
2014-04-16 Craig TopperConvert SelectionDAG::getVTList to use ArrayRef
2014-04-16 Matt ArsenaultR600: Expand sign extension of vectors.
2014-04-15 Matt ArsenaultR600/SI: Fix loads of i1
2014-04-11 Matt ArsenaultR600: Check if a sextload should be used for parameter...
2014-04-07 Tom StellardR600: Match 24-bit arithmetic patterns in a Target...
2014-04-07 Matt ArsenaultUse std::swap
2014-04-03 Tom StellardR600/SI: Lower 64-bit immediates using REG_SEQUENCE
2014-03-31 Matt ArsenaultChange shouldSplitVectorElementType to better match...
2014-03-31 Matt ArsenaultR600/SI: Implement shouldConvertConstantLoadToIntImm
2014-03-31 Tom StellardR600/SI: Lower i64 SELECT by bitcasting to a vector...
2014-03-24 Matt ArsenaultR600/SI: Fix 64-bit private loads.
2014-03-24 Tom StellardR600/SI: Promote fp64 SELECT to i64
2014-03-21 Tom StellardR600/SI: Handle MUBUF instructions in SIInstrInfo:...
2014-03-21 Tom StellardR600/SI: Use SGPR_(32|64) reg clases when lowering...
2014-03-07 Tom StellardR600/SI: Custom lower i1 stores
2014-03-06 Matt ArsenaultR600: Fix extloads from i8 / i16 to i64.
2014-02-28 Tom StellardR600/SI: Expand all v16[if]32 operations
2014-02-25 Tom StellardR600/SI: Custom select 64-bit ADD
2014-02-24 Matt ArsenaultFix unused variable
2014-02-24 Matt ArsenaultR600/SI - Add new CI arithmetic instructions.
2014-02-13 Tom StellardR600/SI: Expand all v8[if]32 operations
2014-02-13 Tom StellardR600/SI: Split global vector loads with more than 4...
2014-02-05 Matt ArsenaultAdd address space argument to allowsUnalignedMemoryAccess.
2014-02-04 Tom StellardR600/SI: Custom lower i64 ISD::SELECT
2014-01-24 Alp TokerFix known typos
2014-01-22 Tom StellardR600: Add support for global addresses with constant...
2014-01-22 Tom StellardR600/SI: Add support for i8 and i16 private loads/stores
2013-12-19 Matt ArsenaultR600/SI: Make private pointers be 32-bit.
2013-11-22 Tom StellardR600/SI: Fixing handling of condition codes
2013-11-18 Matt ArsenaultR600/SI: Implement add i64, but do not yet enable.
2013-11-18 Matt ArsenaultR600/SI: addc / adde i32 are legal
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-10-23 Tom StellardR600/SI: Replace ffs(x) - 1 with countTrailingZeros(x)
2013-10-23 Tom StellardR600/SI: fix MIMG writemask adjustement
2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments
2013-10-15 Vincent LejeuneR600/SI: Remove some leftover MI dump call
2013-10-13 Vincent LejeuneR600/SI: Support byval arguments
2013-10-10 Matt ArsenaultFix typo
2013-10-10 Tom StellardR600/SI: Define a separate MIMG instruction for each...
2013-09-12 Tom StellardR600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL trans...
2013-09-05 Matt ArsenaultR600: Fix i64 to i32 trunc on SI
2013-08-26 Tom StellardR600: Add support for vector local memory loads
2013-08-26 Tom StellardSelectionDAG: Use correct pointer size when lowering...
2013-08-16 Benjamin KramerR600: Allocate memoperand in the MachienFunction so...
2013-08-14 Tom StellardR600/SI: Improve legalization of vector operations
2013-08-14 Tom StellardR600/SI: Replace v1i32 type with i32 in imageload and...
2013-08-14 Tom StellardR600/SI: Convert v16i8 resource descriptors to i128
2013-08-14 Tom StellardR600/SI: Assign a register class to the $vaddr operand...
2013-08-10 Niels Ole SalscheiderR600/SI: FMA is faster than fmul and fadd for f64
2013-08-08 Niels Ole SalscheiderR600/SI: Implement fp32<->fp64 conversions
2013-08-06 Tom StellardR600/SI: Use VSrc_* register classes as the default...
2013-08-06 Tom StellardR600/SI: Add more special cases for opcodes to ensureSR...
2013-08-01 Tom StellardR600/SI: Custom lower i64 ZERO_EXTEND
2013-07-23 Tom StellardR600: Improve support for < 32-bit loads
2013-07-18 Tom StellardR600/SI: Fix crash with VSELECT
2013-07-15 Tom StellardR600/SI: Add support for 64-bit loads
2013-07-12 Tom StellardR600/SI: Add double precision fsub pattern for SI
2013-07-12 Tom StellardR600/SI: Add initial double precision support for SI
2013-07-10 Michel DanzerR600/SI: Initial local memory support
2013-06-25 Aaron WatryR600: Consolidate expansion of v2i32/v4i32 ops for...
2013-06-25 Aaron WatryR600/SI: Expand xor v2i32/v4i32
2013-06-25 Aaron WatryR600/SI: Expand urem of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG
2013-06-25 Aaron WatryR600/SI: Expand ashr of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand srl of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand shl of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand or of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand mul of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand and of v2i32/v4i32 for SI
2013-06-25 Tom StellardR600/SI: Report unaligned memory accesses as legal...
2013-06-20 Tom StellardR600/SI: Expand sub for v2i32 and v4i32 for SI
2013-06-20 Tom StellardR600/SI: Expand add for v2i32 and v4i32
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-05 Tom StellardR600: Replace predicate loop with predicate function
2013-06-03 Tom StellardR600/SI: Add support for work item and work group intri...
2013-06-03 Tom StellardR600/SI: Add a calling convention for compute shaders
2013-06-03 Tom StellardR600/SI: Custom lower i64 sign_extend
2013-06-03 Tom StellardR600/SI: Adjust some instructions' out register class...
2013-06-03 Tom StellardR600/SI: Handle REG_SEQUENCE in fitsRegClass()
2013-06-03 Tom StellardR600/SI: Handle nodes with glue results correctly SITar...
2013-06-03 Tom StellardR600/SI: Rework MUBUF store instructions
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4.
2013-05-23 Benjamin KramerMove passes from namespace llvm into anonymous namespac...
2013-05-23 Benjamin KramerR600: Hide symbols of implementation details.
2013-05-22 Rafael EspindolaAttempt to fix the mingw32 bot.
2013-05-20 Tom StellardR600/SI: Make fitsRegClass() operands const
2013-05-18 Matt ArsenaultAdd LLVMContext argument to getSetCCResultType
2013-05-17 Christian KonigR600/SI: return undef instead of null for skipped arguments
2013-05-06 Tom StellardR600/SI: Handle arbitrary destination type in SITargetL...
2013-04-19 Michael LiaoArrayRefize getMachineNode(). No functionality change.
next