Canonicalize header guards into a common format.
[oota-llvm.git] / lib / Target / R600 / R600InstrInfo.h
2014-08-13 Benjamin KramerCanonicalize header guards into a common format.
2014-07-20 Matt ArsenaultR600: Remove unused function
2014-06-17 Tom StellardR600: Use LDS and vectors for private memory
2014-06-13 Tom StellardR600: Remove AMDIL instruction and register definitions
2014-06-13 Tom StellardR600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
2014-04-29 Craig Topper[C++11] Add 'override' keywords and remove 'virtual...
2014-04-28 Craig Topper[C++] Use 'nullptr'.
2014-01-24 Alp TokerFix known typos
2013-11-22 Tom StellardR600: Implement TargetInstrInfo::isLegalToSplitMBBAt()
2013-11-15 Tom StellardR600: Fix scheduling of instructions that use the LDS...
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-10-22 Tom StellardR600: Simplify handling of private address space
2013-10-22 Tom StellardR600: Remove unused InstrInfo::getMovImmInstr() function
2013-10-01 Vincent LejeuneR600: add a pass that merges clauses.
2013-09-30 Arnold SchwaighoferIfConverter: Use TargetSchedule for instruction latencies
2013-09-12 Tom StellardR600: Don't use trans slot for instructions that read...
2013-09-05 Tom StellardR600: Add support for local memory atomic add
2013-09-04 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only...
2013-08-16 Tom StellardR600: Add IsExport bit to TableGen instruction definitions
2013-07-31 Tom StellardRevert "R600: Use SchedModel enum for is{Trans,Vector...
2013-07-31 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only...
2013-07-23 Tom StellardR600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISe...
2013-06-29 Vincent LejeuneR600: Support schedule and packetization of trans-only...
2013-06-29 Vincent LejeuneR600: Bank Swizzle now display SCL equivalent
2013-06-28 Tom StellardR600: Add local memory support via LDS
2013-06-28 Tom StellardR600: Add support for GROUP_BARRIER instruction
2013-06-25 Tom StellardR600: Use new getNamedOperandIdx function generated...
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice...
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4.
2013-05-17 Vincent LejeuneR600: Some factorization
2013-04-30 Vincent LejeuneR600: Rework Scheduling to handle difference between...
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote...
2013-04-03 Vincent LejeuneR600: Factorize maximum alu per clause in a single...
2013-03-14 Vincent LejeuneR600: Factorize code handling Const Read Port limitation
2013-02-06 Tom StellardR600: Support for indirect addressing v4
2013-01-02 Chandler CarruthResort the #include lines in include/... and lib/....
2012-12-11 Tom StellardAdd R600 backend