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[C++] Use 'nullptr'. Target edition.
[oota-llvm.git] / lib / Target / R600 / R600InstrInfo.cpp
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition. blob | commitdiff | raw
2014-04-22 Chandler Carruth[cleanup] Lift using directives, DEBUG_TYPE definitions... blob | commitdiff | raw | diff to current
2014-03-02 Benjamin Kramer[C++11] Replace llvm::next and llvm::prior with std... blob | commitdiff | raw | diff to current
2014-01-23 Tom StellardR600: Remove successive JUMP in AnalyzeBranch when... blob | commitdiff | raw | diff to current
2013-11-22 Tom StellardR600: Implement TargetInstrInfo::isLegalToSplitMBBAt() blob | commitdiff | raw | diff to current
2013-11-19 Juergen Ributzka[weak vtables] Remove a bunch of weak vtables blob | commitdiff | raw | diff to current
2013-11-18 Alexey SamsonovRevert r194865 and r194874. blob | commitdiff | raw | diff to current
2013-11-16 Vincent LejeuneR600: Make dot_4 instructions predicable blob | commitdiff | raw | diff to current
2013-11-15 Juergen Ributzka[weak vtables] Remove a bunch of weak vtables blob | commitdiff | raw | diff to current
2013-11-15 Tom StellardR600: Fix scheduling of instructions that use the LDS... blob | commitdiff | raw | diff to current
2013-11-13 Tom StellardR600/SI: Add support for private address space load... blob | commitdiff | raw | diff to current
2013-10-22 Tom StellardR600: Simplify handling of private address space blob | commitdiff | raw | diff to current
2013-10-22 Tom StellardR600: Remove unused InstrInfo::getMovImmInstr() function blob | commitdiff | raw | diff to current
2013-10-01 Vincent LejeuneR600: add a pass that merges clauses. blob | commitdiff | raw | diff to current
2013-10-01 Vincent LejeuneR600: Enable -verify-machineinstrs in some tests. blob | commitdiff | raw | diff to current
2013-09-30 Arnold SchwaighoferIfConverter: Use TargetSchedule for instruction latencies blob | commitdiff | raw | diff to current
2013-09-12 Tom StellardR600: Don't use trans slot for instructions that read... blob | commitdiff | raw | diff to current
2013-09-04 Vincent LejeuneR600: Use shared op optimization when checking cycle... blob | commitdiff | raw | diff to current
2013-09-04 Vincent LejeuneR600: Non vector only instruction can be scheduled... blob | commitdiff | raw | diff to current
2013-09-04 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only... blob | commitdiff | raw | diff to current
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory stores blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600: Add IsExport bit to TableGen instruction definitions blob | commitdiff | raw | diff to current
2013-08-01 Tom StellardR600: Add 64-bit float load/store support blob | commitdiff | raw | diff to current
2013-07-31 Tom StellardRevert "R600: Non vector only instruction can be schedu... blob | commitdiff | raw | diff to current
2013-07-31 Tom StellardRevert "R600: Use SchedModel enum for is{Trans,Vector... blob | commitdiff | raw | diff to current
2013-07-31 Vincent LejeuneR600: Avoid more than 4 literals in the same instructio... blob | commitdiff | raw | diff to current
2013-07-31 Vincent LejeuneR600: Non vector only instruction can be scheduled... blob | commitdiff | raw | diff to current
2013-07-31 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only... blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISe... blob | commitdiff | raw | diff to current
2013-07-14 Craig TopperUse SmallVectorImpl& instead of SmallVector to avoid... blob | commitdiff | raw | diff to current
2013-07-10 Aaron BallmanReplacing an empty switch with its moral equivalent... blob | commitdiff | raw | diff to current
2013-07-09 Vincent LejeuneR600: Do not predicated basic block with multiple alu... blob | commitdiff | raw | diff to current
2013-06-30 Vincent LejeuneR600: Fix an unitialized variable in R600InstrInfo.cpp blob | commitdiff | raw | diff to current
2013-06-29 Benjamin KramerR600: Unbreak GCC build. blob | commitdiff | raw | diff to current
2013-06-29 Vincent LejeuneR600: Support schedule and packetization of trans-only... blob | commitdiff | raw | diff to current
2013-06-29 Vincent LejeuneR600: Bank Swizzle now display SCL equivalent blob | commitdiff | raw | diff to current
2013-06-28 Tom StellardR600: Add local memory support via LDS blob | commitdiff | raw | diff to current
2013-06-28 Tom StellardR600: Add support for GROUP_BARRIER instruction blob | commitdiff | raw | diff to current
2013-06-28 Tom StellardR600: Add ALUInst bit to tablegen definitions v2 blob | commitdiff | raw | diff to current
2013-06-25 Tom StellardR600: Use new getNamedOperandIdx function generated... blob | commitdiff | raw | diff to current
2013-06-17 Vincent LejeuneR600: PV stores Reg id, not index blob | commitdiff | raw | diff to current
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice... blob | commitdiff | raw | diff to current
2013-06-07 Bill WendlingDon't cache the instruction and register info from... blob | commitdiff | raw | diff to current
2013-06-05 Tom StellardR600: Make sure to schedule AR register uses and defs... blob | commitdiff | raw | diff to current
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4 blob | commitdiff | raw | diff to current
2013-05-23 Benjamin KramerMove passes from namespace llvm into anonymous namespac... blob | commitdiff | raw | diff to current
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4. blob | commitdiff | raw | diff to current
2013-05-17 Vincent LejeuneR600: Some factorization blob | commitdiff | raw | diff to current
2013-05-06 Tom StellardR600: Remove dead code from the CodeEmitter v2 blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Always use texture cache for compute shaders blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Packetize instructions blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Rework Scheduling to handle difference between... blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Add a Bank Swizzle operand blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote... blob | commitdiff | raw | diff to current
2013-04-03 Vincent LejeuneR600: Factorize maximum alu per clause in a single... blob | commitdiff | raw | diff to current
2013-03-14 Vincent LejeuneR600: Factorize code handling Const Read Port limitation blob | commitdiff | raw | diff to current
2013-03-11 Vincent LejeuneR600: Fix JUMP handling so that MachineInstr verificati... blob | commitdiff | raw | diff to current
2013-03-05 Vincent LejeuneR600: Do not predicate vector op blob | commitdiff | raw | diff to current
2013-02-06 Tom StellardR600: Support for indirect addressing v4 blob | commitdiff | raw | diff to current
2013-02-05 Tom StellardR600: improve inputs/interpolation handling blob | commitdiff | raw | diff to current
2013-01-23 Tom StellardR600: rework handling of the constants blob | commitdiff | raw | diff to current
2013-01-02 Chandler CarruthResort the #include lines in include/... and lib/.... blob | commitdiff | raw | diff to current
2012-12-20 NAKAMURA TakumiTarget/R600: Update MIB according to r170588. blob | commitdiff | raw | diff to current
2012-12-13 Tom StellardFix warnings with -DNDEBUG blob | commitdiff | raw | diff to current
2012-12-11 Tom StellardAdd R600 backend blob | commitdiff | raw | diff to current
C/C++ LLVM-based compilers that forbids OOTA behaviors