Revert 239644.
[oota-llvm.git] / lib / Target / R600 / R600ISelLowering.cpp
2015-05-27 Jan VeselyR600: Rely on TypeLegalizer to use divrem instead of...
2015-05-26 Jan VeselyR600: Use SIGN_EXTEND_INREG for SEXT loads
2015-04-30 Jan VeselyReinstate revisions r234755, r234759, r234760
2015-04-28 Sergey DmitroukReapply r235977 "[DebugInfo] Add debug locations to...
2015-04-28 Daniel JasperRevert "[DebugInfo] Add debug locations to constant...
2015-04-28 Sergey Dmitrouk[DebugInfo] Add debug locations to constant SD nodes
2015-04-13 Jan VeselyRevert revisions r234755, r234759, r234760
2015-04-13 Jan VeselyR600: Add carry and borrow instructions. Use them to...
2015-04-10 Benjamin KramerReduce dyn_cast<> to isa<> or cast<> where possible.
2015-03-25 Nico WeberFix typo in comment.
2015-03-24 Marek OlsakR600/SI: Expand fract to floor, then only select V_FRAC...
2015-03-10 Mehdi AminiDataLayout is mandatory, update the API to reflect...
2015-02-26 Eric ChristopherRemove an argument-less call to getSubtargetImpl from...
2015-02-17 Benjamin KramerPrefer SmallVector::append/insert over push_back loops.
2015-02-16 Andrew TrickAArch64: Safely handle the incoming sret call argument.
2015-01-30 Eric ChristopherReuse a bunch of cached subtargets and remove getSubtar...
2015-01-08 Ahmed Bougacha[SelectionDAG] Allow targets to specify legality of...
2014-12-12 Matt ArsenaultR600: Fix min/max matching problems with unordered...
2014-11-26 Matt ArsenaultR600/SI: Use ZeroOrNegativeOneBooleanContent
2014-11-23 Matt ArsenaultR600: Fix extloads of i1 on R600/Evergreen
2014-11-15 Tom StellardR600: Factor i64 UDIVREM lowering into its own fuction
2014-10-14 Jan VeselyReapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 Rafael EspindolaRevert "R600: Add new intrinsic to read work dimensions"
2014-10-14 Jan VeselyR600: Add new intrinsic to read work dimensions
2014-09-11 Aaron WatryR600: Add cmpxchg instruction for evergreen
2014-08-13 Matt ArsenaultR600: Correctly set the src value offset for scalarized...
2014-08-06 Eric ChristopherRemove the target machine from CCState. Previously...
2014-08-05 Eric ChristopherHave MachineFunction cache a pointer to the subtarget...
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn...
2014-08-01 Tom StellardRevert "R600: Move code for generating REGISTER_LOAD...
2014-08-01 Tom StellardR600: Move code for generating REGISTER_LOAD into R600I...
2014-07-31 Louis GerbargMake sure no loads resulting from load->switch DAGCombi...
2014-07-24 Matt ArsenaultR600: Add new functions for splitting vector loads...
2014-07-21 Tom StellardR600/SI: Store constant initializer data in constant...
2014-07-13 Matt ArsenaultR600: Make ShaderType private
2014-07-10 Jan VeselyR600: Implement float to long/ulong
2014-07-07 Matt ArsenaultR600: Fix mishandling of load / store chains.
2014-06-29 Craig TopperAdd ops() method to SDNode that returns an ArrayRef...
2014-06-27 Matt ArsenaultR600: Move load/store ReplaceNodeResults to common...
2014-06-24 Matt ArsenaultR600: Fix inconsistency in rsq instructions.
2014-06-23 Matt ArsenaultR600: Remove AMDILISelLowering
2014-06-23 Matt ArsenaultR600: Move add/sub with overflow out of AMDILISelLowering
2014-06-23 Matt ArsenaultR600/SI: Handle i64 sub.
2014-06-23 Matt ArsenaultR600: Rename AMDIL file
2014-06-22 Jan VeselyR600: Use LowerSDIVREM for i64 node replace
2014-06-18 Jan VeselyR600: Implement 64bit SRA
2014-06-18 Jan VeselyR600: Implement 64bit SRL
2014-06-18 Jan VeselyR600: Implement 64bit SHL
2014-06-17 Tom StellardR600: Use LDS and vectors for private memory
2014-06-13 Tom StellardR600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
2014-05-22 Matt ArsenaultR600: Add dag combine for BFE
2014-05-12 Matt ArsenaultUse cast<> for unchecked use
2014-05-12 Matt ArsenaultUse cast<> for unchecked use
2014-05-12 Matt ArsenaultUse range for
2014-05-09 Tom StellardR600: Move MIN/MAX matching from LowerOperation() to...
2014-04-30 Craig TopperUse makeArrayRef insted of calling ArrayRef<T> construc...
2014-04-29 Tom StellardR600: Remove duplicate setting of SELECT expansion.
2014-04-29 Tom StellardR600: Change UDIV/UREM to UDIVREM when legalizing types
2014-04-27 Craig TopperConvert SelectionDAG::getMergeValues to use ArrayRef.
2014-04-26 Craig TopperConvert getMemIntrinsicNode to take ArrayRef of SDValue...
2014-04-26 Craig TopperConvert SelectionDAG::getNode methods to use ArrayRef...
2014-04-18 Matt ArsenaultR600: Minor cleanups.
2014-04-16 Matt ArsenaultR600: Expand sign extension of vectors.
2014-04-15 Nick LewyckyBreak PseudoSourceValue out of the Value hierarchy...
2014-04-11 Matt ArsenaultR600: Check if a sextload should be used for parameter...
2014-04-07 Tom StellardR600: Match 24-bit arithmetic patterns in a Target...
2014-04-07 Matt ArsenaultUse .data() instead of &x[0]
2014-03-27 Matt ArsenaultR600/SI: Fix unreachable with a sext_in_reg to an illeg...
2014-03-17 Matt ArsenaultR600: Match sign_extend_inreg to BFE instructions
2014-03-02 Benjamin Kramer[C++11] Replace llvm::next and llvm::prior with std...
2014-01-24 Alp TokerFix known typos
2014-01-22 Tom StellardR600/SI: Add support for i8 and i16 private loads/stores
2013-12-10 Matt ArsenaultUse llvm_unreachable instead of assert(0)
2013-12-10 Vincent LejeuneR600: Fix an infinite loop when trying to reorganize...
2013-12-05 Alp TokerCorrect word hyphenations
2013-11-15 Tom StellardR600: Fix scheduling of instructions that use the LDS...
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-11-13 Matt ArsenaultR600: Fix selection failure on EXTLOAD
2013-11-12 Vincent LejeuneR600: Reenable llvm.R600.load.input/interp.input for...
2013-11-11 Vincent LejeuneR600: Use function inputs to represent data stored...
2013-11-01 Matt ArsenaultUse isa<> instead of dyn_cast<> with unused value
2013-10-30 Matt ArsenaultFix a few typos
2013-10-28 NAKAMURA TakumiPrune utf8 chars in comments.
2013-10-28 NAKAMURA TakumiTarget/R600: Un-tab-ify.
2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments
2013-10-13 Vincent LejeuneR600: Use masked read sel for texture instructions
2013-10-13 Vincent LejeuneR600: fix swizzle export
2013-10-02 Vincent LejeuneR600: Add a ldptr intrinsic to support MSAA.
2013-09-28 Tom StellardR600: Fix handling of NAN in comparison instructions
2013-09-28 Tom StellardSelectionDAG: Improve legalization of SELECT_CC with...
2013-09-28 Tom StellardSelectionDAG: Try to expand all condition codes using...
2013-09-12 Vincent LejeuneR600: Move clamp handling code to R600IselLowering.cpp
2013-09-12 Vincent LejeuneR600: Move code handling literal folding into R600ISelL...
2013-09-12 Vincent LejeuneR600: Move fabs/fneg/sel folding logic into PostProcessIsel
2013-09-05 Tom StellardR600: Add support for local memory atomic add
2013-09-05 Tom StellardR600: Expand SELECT nodes rather than custom lowering...
2013-08-26 Tom StellardR600: Add support for vector local memory loads
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory loads
2013-08-26 Tom StellardR600: Add support for v4i32 and v2i32 local stores
2013-08-16 Tom StellardR600: Expand vector float operations for both SI and...
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