[Hexagon] Removing old variants of instructions and updating references.
[oota-llvm.git] / lib / Target / Hexagon / HexagonInstrInfo.td
2014-12-19 Colin LeMahieu[Hexagon] Removing old variants of instructions and...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit extraction and table indexing...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit insertion instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding more xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding transfers to and from control registers.
2014-12-19 Colin LeMahieu[Hexagon] Adding doubleregs for control registers....
2014-12-19 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-18 Colin LeMahieuReverting 224550, was not ready for commit.
2014-12-18 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-16 Colin LeMahieu[Hexagon] Updating doubleword shift usages to new versions.
2014-12-16 Colin LeMahieu[Hexagon] Removing old XTYPE/BIT instructions and repla...
2014-12-16 Colin LeMahieu[Hexagon] Adding tstbit/bitclr/bitset instructions.
2014-12-16 Colin LeMahieu[Hexagon] Adding bit count and twiddling instructions.
2014-12-16 Colin LeMahieu[Hexagon] Adding asr/lsr/asl reg/imm, asl with saturati...
2014-12-16 Colin LeMahieu[Hexagon] Adding absolute value, and negate with saturation
2014-12-16 Colin LeMahieu[Hexagon] Adding saturate and swizzle instructions.
2014-12-16 Colin LeMahieu[Hexagon] Removing old multiply defs and updating refer...
2014-12-16 Colin LeMahieu[Hexagon] Adding doubleword multiplies with and without...
2014-12-15 Colin LeMahieu[Hexagon] Adding halfword to doubleword multiplies.
2014-12-15 Colin LeMahieu[Hexagon] Adding logical-logical accumulation instructi...
2014-12-15 Colin LeMahieu[Hexagon] Adding a number of additional multiply forms...
2014-12-15 Colin LeMahieu[Hexagon] Adding misc multiply encodings and tests.
2014-12-15 Colin LeMahieu[Hexagon] Adding doubleworld accumulating multiplies...
2014-12-15 Colin LeMahieu[Hexagon] Adding accumulating half word multiplies.
2014-12-15 Colin LeMahieu[Hexagon] Adding multiply with rnd/sat/rndsat
2014-12-15 Colin LeMahieu[Hexagon] Adding encoding bits for halfword multiplies.
2014-12-11 Colin LeMahieu[Hexagon] Renaming classes in preparation for replacement.
2014-12-11 Colin LeMahieu[Hexagon] Ading i64 <- i32, i32 sextw pattern.
2014-12-11 Colin LeMahieu[Hexagon] Adding encoding information for sign extend...
2014-12-10 Colin LeMahieu[Hexagon] Adding encodings for JR class instructions...
2014-12-10 Colin LeMahieu[Hexagon] Adding JR class predicated call reg instructions.
2014-12-09 Colin LeMahieu[Hexagon] [NFC] Cleaning up unused classes.
2014-12-09 Colin LeMahieu[Hexagon] Fixing broken tests.
2014-12-09 Colin LeMahieu[Hexagon] Updating rr/ri 32/64 transfer encodings and...
2014-12-09 Colin LeMahieu[Hexagon] Adding word combine dot-new form and replacin...
2014-12-09 Colin LeMahieu[Hexagon] Updating predicate register transfers and...
2014-12-08 Colin LeMahieu[Hexagon] Removing old def versions and replacing usage...
2014-12-08 Colin LeMahieu[Hexagon] Adding any8, all8, and/or/xor/andn/orn/not...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype doubleword add, sub, and, or...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype doubleword comparisons. Removin...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype parity, min, minu, max, maxu...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh...
2014-12-08 Colin LeMahieu[Hexagon] Adding add/sub with saturation. Removing...
2014-12-08 Colin LeMahieu[Hexagon] Adding combine reg, reg with predicated forms.
2014-12-08 Colin LeMahieu[Hexagon] Adding packhl instruction.
2014-12-05 Colin LeMahieu[Hexagon] Relocating logical instructions and templates...
2014-12-05 Colin LeMahieu[Hexagon] Adding sub/and/or reg, imm forms
2014-12-05 Colin LeMahieu[Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
2014-12-05 Colin LeMahieu[Hexagon] Adding tfrih/l instructions.
2014-12-05 Colin LeMahieu[Hexagon] Adding add reg, imm form with encoding bits...
2014-12-05 Colin LeMahieu[Hexagon] Adding DoubleRegs decoder. Moving C2_mux...
2014-12-05 Colin LeMahieu[Hexagon] [NFC] Rearranging patterns and mux instruction.
2014-12-05 Colin LeMahieu[Hexagon] [NFC] Rearranging def order.
2014-12-05 Colin LeMahieu[Hexagon] Adding combine reg-reg forms.
2014-12-05 Colin LeMahieu[Hexagon] Marking several instructions as isCodeGenOnly...
2014-12-04 Colin LeMahieu[Hexagon] Marking some instructions as CodeGenOnly...
2014-11-26 Colin LeMahieu[Hexagon] Adding cmp* immediate form instructions.
2014-11-26 Colin LeMahieu[Hexagon] Adding and64, or64, and xor64 instructions.
2014-11-26 Craig TopperReplace neverHasSideEffects=1 with hasSideEffects=0...
2014-11-25 Colin LeMahieu[Hexagon] Adding add64 and sub64 instructions.
2014-11-25 Colin LeMahieuReverting 222792
2014-11-25 Colin LeMahieu[Hexagon] Adding compare with immediate instructions.
2014-11-25 Colin LeMahieu[Hexagon] Adding NOP encoding bits.
2014-11-25 Colin LeMahieu[Hexagon] Adding C2_mux instruction.
2014-11-25 Colin LeMahieu[Hexagon] Replacing cmp* instructions with ones that...
2014-11-24 Colin LeMahieu[Hexagon] Adding asrh instruction, removing unused...
2014-11-24 Colin LeMahieu[Hexagon] Adding aslh instruction.
2014-11-24 Colin LeMahieu[Hexagon] Adding zxth instruction.
2014-11-24 Colin LeMahieu[Hexagon] Adding zxtb instruction.
2014-11-21 Colin LeMahieu[Hexagon] Adding sxth instruction.
2014-11-21 Colin LeMahieu[Hexagon] Adding sxtb instruction. Renaming some ident...
2014-11-21 Colin LeMahieu[Hexagon] Removing SUB_rr and replacing with A2_sub.
2014-11-19 Colin LeMahieu[Hexagon] Adding A2_xor instruction with IR selection...
2014-11-19 Colin LeMahieu[Hexagon] Adding A2_or instruction with IR selection...
2014-11-18 Colin LeMahieu[Hexagon] Adding A2_and instruction.
2014-11-18 Colin LeMahieu[Hexagon] Adding A2_sub instruction
2014-11-18 Colin LeMahieu[Hexagon] Converting from ADD_rr to A2_add which has...
2014-11-04 Colin LeMahieu[Hexagon] Reverting 220584 to address ASAN errors.
2014-10-24 Colin LeMahieu[Hexagon] Resubmission of 220427
2014-10-23 NAKAMURA TakumiRevert r220427, "[Hexagon] Adding encoding bits for...
2014-10-22 Colin LeMahieu[Hexagon] Adding encoding bits for add opcode.
2014-10-22 Colin LeMahieu[Hexagon] Adding basic disassembler.
2014-05-07 Jyotsna Verma[Hexagon] Add New TSFlags to be used in the upcoming...
2013-05-14 Jyotsna VermaHexagon: Pass to replace tranfer/copy instructions...
2013-05-07 Jyotsna VermaHexagon: Set accessSize and addrMode on all load/store...
2013-05-02 Pranav BhandarkarHexagon - Add peephole optimizations for zero extends.
2013-05-01 Jyotsna VermaHexagon: Use multiclass for Jump instructions.
2013-04-23 Jyotsna VermaHexagon: Use multiclass for combine and STri[bhwd]_shl_...
2013-04-23 Jyotsna VermaHexagon: Remove assembler mapped instruction definitions.
2013-04-12 Jyotsna VermaHexagon: Set isPredicatedNew flag on predicate new...
2013-04-12 Jyotsna VermaHexagon: Set isPredicatedFlase flag for all the instruc...
2013-03-28 Jyotsna VermaHexagon: Replace switch-case in isDotNewInst with TSFlags.
2013-03-28 Jyotsna VermaHexagon: Use multiclass for gp-relative instructions.
2013-03-26 Jyotsna VermaHexagon: Use multiclass for aslh, asrh, sxtb, sxth...
2013-03-08 Jyotsna VermaHexagon: Add patterns for zero extended loads from...
2013-03-07 Jyotsna VermaHexagon: Add support to lower block address.
2013-03-05 Jyotsna Vermareverting patch 176508.
2013-03-05 Jyotsna VermaHexagon: Add support for lowering block address.
2013-03-05 Jyotsna VermaHexagon: Add encoding bits to the TFR64 instructions.
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