Add missing load/store flags to thumb2 instructions.
[oota-llvm.git] / lib / Target / ARM / ARMInstrThumb2.td
2015-07-15 Pete CooperAdd missing load/store flags to thumb2 instructions.
2015-06-01 Luke CheesemanRe-commit of r238201 with fix for building with shared...
2015-05-31 Tim NorthoverARM: recommit r237590: allow jump tables to be placed...
2015-05-26 Diego NovilloRevert "Re-commit changes in r237579 with fix for bug...
2015-05-26 Luke CheesemanRe-commit changes in r237579 with fix for bug breaking...
2015-05-21 Peter CollingbourneRevert r237590, "ARM: allow jump tables to be placed...
2015-05-18 Tim NorthoverARM: allow jump tables to be placed as constant islands.
2015-05-18 Oliver StannardRevert r237579, as it broke windows buildbots
2015-05-18 Oliver Stannard[LLVM - ARM/AArch64] Add ACLE special register intrinsics
2015-05-13 Tim NorthoverARM: remove custom jump table UID
2015-04-28 Sergey DmitroukReapply r235977 "[DebugInfo] Add debug locations to...
2015-04-28 Daniel JasperRevert "[DebugInfo] Add debug locations to constant...
2015-04-28 Sergey Dmitrouk[DebugInfo] Add debug locations to constant SD nodes
2015-04-16 Vladimir Sukharev[ARM] Add v8.1a "Privileged Access Never" extension
2015-04-15 Charlie TurnerFix BXJ is undefined in AArch32.
2015-04-07 Ahmed Bougacha[ARM] Mark a bunch of .td Operands with type _MEMORY.
2015-01-19 Bradley Smith[ARM] Fixup sign extend instruction availability w...
2014-12-01 Charlie TurnerAdd Thumb HVC and ERET virtualisation extension instruc...
2014-11-26 Craig TopperReplace neverHasSideEffects=1 with hasSideEffects=0...
2014-10-21 Oliver Stannard[Thumb2] LDRS?[BH] cannot load to the PC
2014-10-20 Oliver Stannard[Thumb2] RFE, SRS and "SUBS pc, lr" are undefined on v7M
2014-10-20 Oliver Stannard[ARM] Do not select SMULW[BT] or SMLAW[BT]
2014-09-29 Oliver Stannard[Thumb2] ldrexd and strexd are not defined on v7M
2014-09-25 Oliver Stannard[Thumb2] BXJ should be undefined for v7M, v8A
2014-09-24 Oliver Stannard[Thumb] 32-bit encodings of 'cps' are not valid for v7M
2014-09-01 Renato GolinThumb2 M-class MSR instruction support changes
2014-08-26 Yi KongARM: Add patterns for dbg
2014-08-15 Tim NorthoverARM: implement MRS/MSR (banked reg) system instructions.
2014-08-07 Pete CooperFix a whole bunch of binary literals which were the...
2014-08-05 Keith WalkerDefine stc2/stc2l/ldc2/ldc2l as thumb2 instructions
2014-07-23 Tim NorthoverARM: add patterns for [su]xta[bh] from just a shift.
2014-07-03 Yi Kong[ARM] Implement ISB memory barrier intrinsic
2014-05-22 Saleem AbdulrasoolARM: introduce llvm.arm.undefined intrinsic
2014-05-14 Saleem AbdulrasoolARM: implement support for the UDF mnemonic
2014-04-25 Saleem AbdulrasoolARM: provide a new generic hint intrinsic
2014-04-04 Stepan DyatkovskiyFixed register class in STRD instruction for Thumb2...
2014-04-03 Jim GrosbachTidy up. Trailing whitespace.
2014-03-26 Tim NorthoverARM: add intrinsics for the v8 ldaex/stlex
2014-02-11 Jim GrosbachARM: Thumb2 LDR(literal) can target SP.
2014-01-23 Tim NorthoverARM: use litpools for normal i32 imms when compiling...
2014-01-06 Tim NorthoverARM MachO: sort out isTargetDarwin/isTargetIOS/......
2013-11-25 Tim NorthoverARM: remove special cases for Darwin dynamic-no-pic...
2013-11-25 Tim NorthoverARM: remove unused patterns.
2013-11-08 Artyom Skrobov[ARM] Handling for coprocessor instructions that are...
2013-11-05 Tim NorthoverARM: permit bare dmb/dsb/isb aliases on Cortex-M0
2013-10-29 Bernard OgdenARM: Add subtarget feature for CRC
2013-10-23 Artyom SkrobovMake ARM hint ranges consistent, and add tests for...
2013-10-18 Richard BartonAdd hint disassembly syntax for 16-bit Thumb hint instr...
2013-10-03 Amara Emerson[ARM] Warn on deprecated IT blocks in v8 AArch32 assembly.
2013-10-01 Tim NorthoverARM: support interrupt attribute
2013-10-01 Joey Gouly[ARM] Introduce the 'sevl' instruction in ARMv8.
2013-09-26 Amara Emerson[ARM] Use the load-acquire/store-release instructions...
2013-09-23 Amara Emerson[ARM] Split A/R class into separate subtarget features.
2013-09-18 Joey Gouly[ARMv8] Add CRC instructions.
2013-09-17 Joey Gouly[ARM] Fix the deprecation of MCR encodings that map...
2013-09-05 Joey Gouly[ARMv8] Implement the new DMB/DSB operands.
2013-09-05 Richard BartonAdd AArch32 DCPS{1,2,3} and HLT instructions.
2013-09-05 Tilmann SchellerReverting 190043 for now.
2013-09-05 Tilmann SchellerARM: Add GPR register class excluding LR for use with...
2013-08-28 Joey Gouly[ARMv8]
2013-08-28 Joey Gouly[ARMv8] Add a missing IsThumb to t2LDAEXD.
2013-08-27 Joey Gouly[ARMv8] Add MC support for the new load/store acquire...
2013-08-22 Tim NorthoverARM: use TableGen patterns to select CMOV operations.
2013-08-21 Mihai PopaMake "mov" work for all Thumb2 MOV encodings
2013-08-19 Mihai PopaThumb2 add immediate alias for SP
2013-08-16 Mihai PopaFix Thumb2 aliasing complementary instructions taking...
2013-08-15 Mihai PopaThis fixes three issues related to Thumb literal loads:
2013-08-09 Mihai PopaThis fixes the Thumb2 CPS assembly syntax.
2013-08-09 Mihai PopaFix assembling of Thumb2 branch instructions.
2013-08-08 Mihai PopaThe name "tCDP" isn't used anywhere else in the source...
2013-08-06 Mihai PopaThis corrects creation of operands for t2PLDW. It also...
2013-08-06 Mihai PopaSupport APSR_nzcv as operand for Thumb2 mrc. Deprecate...
2013-07-31 Kevin EnderbyAdded the B9.3.19 SUBS PC, LR, #imm (Thumb2) system...
2013-07-22 Mihai PopaThis adds range checking for "ldr Rn, [pc, #imm]" Thumb
2013-07-22 Tim NorthoverARM: remove now unneeded custom Asm converters
2013-07-19 Tilmann SchellerARM: Add instruction aliases for the Thumb2 PLD/PLDW...
2013-07-18 Tilmann SchellerARM: Make sure the instruction alias for PLI uses the...
2013-07-16 Tilmann SchellerARM: Add support for the Thumb2 PLI alternate literal...
2013-07-16 Tim NorthoverARM: implement ldrex, strex and clrex intrinsics
2013-07-09 Jim GrosbachARM: Fix incorrect pack pattern for thumb2
2013-07-03 Mihai PopaThis corrects the implementation of Thumb ADR instruct...
2013-06-26 Tim NorthoverARM: fix more cases where predication may or may not...
2013-06-26 Tim NorthoverARM: allow predicated barriers in Thumb mode
2013-06-24 Amaury de la VieuvilleARM: enable decoding of pc-relative PLD/PLI
2013-06-18 Amaury de la VieuvilleARM: fix literal load with positive offset encoding
2013-06-18 Amaury de la VieuvilleARM: add operands pre-writeback variants when needed
2013-06-18 Amaury de la VieuvilleARM: fix thumb literal loads decoding
2013-06-14 Amaury de la VieuvilleARM: fix thumb coprocessor instruction with pre-writeba...
2013-06-10 Amaury de la VieuvilleARM: ISB cannot be passed the same options as DMB
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions
2013-06-06 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb2 instructions
2013-06-04 Arnold SchwaighoferRevert series of sched model patches until I figure...
2013-06-04 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions
2013-06-04 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions
2013-06-04 Arnold Schwaighofer ARM sched model: Add more ALU and CMP thumb2 instructions
2013-05-29 JF BastienTidy some register classes for ARM and Thumb
2013-04-26 Quentin ColombetARM: Fix encoding of hint instruction for Thumb.
2013-04-12 Quentin ColombetARM: Correct printing of pre-indexed operands.
2013-04-10 Tim NorthoverARM: Make "SMC" instructions conditional on new TrustZo...
next