Add LICENSE.TXT covering contributions made by ARM.
[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.td
2012-11-29 Silviu BarangaAdded atomic 64 min/max/umin/umax instrinsics support...
2012-11-16 Weiming ZhaoRemove hard coded registers in ARM ldrexd and strexd...
2012-11-06 Chad RosierMark the Int_eh_sjlj_dispatchsetup pseudo instruction...
2012-10-24 Evan ChengFix a miscompilation caused by a typo. When turning...
2012-09-29 Bob WilsonAdd LLVM support for Swift.
2012-09-18 Evan ChengMOVi16 (movw) is only legal on cpus with V6T2 support...
2012-09-05 Jakob Stoklund OlesenRemove predicated pseudo-instructions.
2012-09-04 Arnold SchwaighoferPatch to implement UMLAL/SMLAL instructions for the...
2012-08-28 Jakob Stoklund OlesenRevert r162713: "Add ATOMIC_LDR* pseudo-instructions...
2012-08-27 Jakob Stoklund OlesenAdd ATOMIC_LDR* pseudo-instructions to model atomic_loa...
2012-08-24 Jakob Stoklund OlesenExplicitly mark LEApcrel pseudos with hasSideEffects.
2012-08-24 Jakob Stoklund OlesenAdd missing SDNPSideEffect flags.
2012-08-24 Richard SmithFix undefined behavior (negation of INT_MIN) in ARM...
2012-08-16 Jakob Stoklund OlesenAdd ADD and SUB to the predicable ARM instructions.
2012-08-16 Jakob Stoklund OlesenHandle ARM MOVCC optimization in PeepholeOptimizer.
2012-08-15 Jakob Stoklund OlesenFold predicable instructions into MOVCC / t2MOVCC.
2012-08-15 Evan ChengUse vld1/vst1 to load/store f64 if alignment is < 4...
2012-08-15 Jakob Stoklund OlesenAdd missing Rfalse operand to the predicated pseudo...
2012-08-12 Arnold SchwaighoferRevert 161581: Patch to implement UMLAL/SMLAL instructi...
2012-08-09 Arnold SchwaighoferPatch to implement UMLAL/SMLAL instructions for the...
2012-08-02 Jim GrosbachARM: Tidy up. Remove unused template parameters.
2012-08-02 Jiangning LiuFix #13241, a bug around shift immediate operand for...
2012-08-01 Jim GrosbachARM: Remove redundant instalias.
2012-08-01 Jim GrosbachClean up formatting.
2012-07-13 Jakob Stoklund OlesenRemove variable_ops from ARM call instructions.
2012-06-23 Evan Cheng(sub X, imm) gets canonicalized to (add X, -imm)
2012-06-22 Jim GrosbachARM: Add a better diagnostic for some out of range...
2012-06-22 Lang HamesRename -allow-excess-fp-precision flag to -fuse-fp...
2012-06-19 Lang HamesAdd DAG-combines for aggressive FMA formation.
2012-06-18 Jim GrosbachARM: Define generic HINT instruction.
2012-06-11 Bill WendlingRe-enable the CMN instruction.
2012-06-02 Benjamin KramerFix typos found by github.com/lyda/misspell-check
2012-06-01 Manman RenARM: properly handle alignment for struct byval.
2012-06-01 Manman RenARM: support struct byval in llvm
2012-05-17 Tim NorthoverRemove incorrect pattern for ARM SMML instruction.
2012-05-11 Silviu BarangaAdded the missing bit definition for the 4th bit of...
2012-04-24 Jim GrosbachARM: improved assembler diagnostics for missing CPU...
2012-04-23 Jim GrosbachTidy up. 80 columns, whitespace, et. al.
2012-04-19 Jim GrosbachARM let TableGen handle a few two-operand aliases.
2012-04-18 Silviu BarangaAdded support for disassembling unpredictable swp/swpb...
2012-04-18 Silviu BarangaFix the bahavior of the disassembler when decoding...
2012-04-18 Silviu BarangaAdded support for unpredictable mcrr/mcrr2/mrrc/mrrc2...
2012-04-18 Silviu BarangaFixed decoding for the ARM cdp2 instruction. The restri...
2012-04-18 Silviu BarangaAdd suport for unpredicatble cases of the cmp, tst...
2012-04-17 Chad RosierTypo.
2012-04-13 Evan ChengOn Darwin targets, only use vfma etc. if the source...
2012-04-11 Evan ChengClean up ARM fused multiply + add/sub support some...
2012-04-11 Evan ChengFix a number of problems with ARM fused multiply add...
2012-04-06 Jakob Stoklund OlesenARMPat is equivalent to Requires<[IsARM]>.
2012-04-06 Jakob Stoklund OlesenEliminate iOS-specific tail call instructions.
2012-04-06 Jakob Stoklund OlesenDeduplicate ARM call-related instructions.
2012-04-05 Silviu BarangaAdded support for unpredictable ADC/SBC instructions...
2012-04-05 Silviu BarangaAdded support for handling unpredictable arithmetic...
2012-04-04 Jakob Stoklund OlesenImplement ARMBaseInstrInfo::commuteInstruction() for...
2012-03-29 Jim GrosbachARM assembly 'cmp lr, #0' should not encode using ...
2012-03-22 Silviu BarangaAdded soft fail cases for the disassembler when decodin...
2012-03-22 Silviu BarangaAdded soft fail cases for the disassembler when decodin...
2012-03-20 Evan ChengChange conditional instructions definitions, e.g. ANDCC...
2012-03-20 Silviu BarangaThe ARM instructions that have an unpredictable behavio...
2012-03-20 Richard BartonTest Commit - add a newline
2012-03-16 Jim GrosbachARM optional operand on MRC/MCR assembly instructions.
2012-03-07 Jim GrosbachARM pre-v6 assembly parsing for umull/smull.
2012-03-07 Jim GrosbachARM pre-v6 alias for 'nop' to 'mov r0, r0'
2012-03-05 Sebastian Popupdated patch for the ARM fused multiply add/sub
2012-02-28 Evan ChengRe-commit r151623 with fix. Only issue special no-retur...
2012-02-28 Daniel DunbarRevert r151623 "Some ARM implementaions, e.g. A-series...
2012-02-28 Evan ChengSome ARM implementaions, e.g. A-series, does return...
2012-02-27 Jim GrosbachARM BL/BLX instruction fixups should use relocations.
2012-02-24 Jakob Stoklund OlesenSwitch ARM target to register masks.
2012-02-23 Evan ChengOptimize a couple of common patterns involving conditio...
2012-01-25 Jim GrosbachARM assemly parsing and validation of IT instruction.
2012-01-24 Anton KorobeynikovUse correct register class for am2offset register operands.
2012-01-23 Anton KorobeynikovAdd missed mayStore flag to STREXD / t2STREXD
2012-01-22 Anton KorobeynikovAdd fused multiple+add instructions from VFPv4.
2012-01-13 Jakob Stoklund OlesenUse RegisterTuples to generate pseudo-registers.
2011-12-22 Bob WilsonAdd variants of the dispatchsetup pseudo for Thumb...
2011-12-22 Bob WilsonAdd missing usesCustomInserter flag on Int_eh_sjlj_setj...
2011-12-21 Chad RosierFix a couple of copy-n-paste bugs. Noticed by George...
2011-12-21 Evan ChengFix a couple of copy-n-paste bugs. Noticed by George...
2011-12-20 Evan ChengARM target code clean up. Check for iOS, not Darwin...
2011-12-20 Bob WilsonMark ARM eh_sjlj_dispatchsetup as clobbering all regist...
2011-12-14 Jim GrosbachFix copy/pasto that skipped the 'modify' step.
2011-12-14 Jim GrosbachARM/Thumb2 mov vs. mvn alias goes both ways.
2011-12-14 Jim GrosbachARM/Thumb2 'cmp rn, #imm' alias to cmn.
2011-12-13 Jim GrosbachARM LDM/STM system instruction variants.
2011-12-13 Jim GrosbachARM pre-UAL NEG mnemonic for convenience when porting...
2011-12-09 Jim GrosbachARM assembly aliases for BIC<-->AND (immediate).
2011-12-08 Jim GrosbachARM NEON two-operand aliases for VSHL(immediate).
2011-12-08 Jim GrosbachARM assembler aliases for "add Rd, #-imm" to "sub Rd...
2011-12-07 Jim GrosbachARM: NEON SHLL instruction immediate operand range...
2011-12-06 Jim GrosbachARM mode 'mul' operand ordering tweak.
2011-12-02 Jim GrosbachARM NEON VEXT aliases for data type suffices.
2011-11-30 Jim GrosbachARM parsing aliases for VLD1 single register all lanes.
2011-11-16 Jim GrosbachARM assembly parsing for shifted register operands...
2011-11-16 Jim GrosbachARM assmebly two operand forms for LSR, ASR, LSL, ROR...
2011-11-16 Jim GrosbachARM assembly parsing for RRX mnemonic.
2011-11-16 Jim GrosbachARM mode aliases for bitwise instructions w/ register...
2011-11-16 Bob WilsonFix tablegen warning: hasSideEffects is inferred for...
2011-11-16 Bob WilsonFix ARM SjLj-EH dispatch setup code. <rdar://problem...
2011-11-15 Jim GrosbachARM assembly parsing two operand forms for shift instru...
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