[C++11] Add 'override' keyword to virtual methods that override their base class.
[oota-llvm.git] / lib / Target / ARM / ARMISelDAGToDAG.cpp
2014-03-10 Craig Topper[C++11] Add 'override' keyword to virtual methods that...
2014-01-24 Alp TokerFix known typos
2014-01-23 Tim NorthoverARM: use litpools for normal i32 imms when compiling...
2014-01-16 Jiangning LiuFor ARM, fix assertuib failures for some ld/st 3/4...
2013-12-02 Tim NorthoverARM: add pseudo-instructions for lit-pool global materi...
2013-09-26 Amara Emerson[ARM] Use the load-acquire/store-release instructions...
2013-09-22 Tim NorthoverISelDAG: spot chain cycles involving MachineNodes
2013-08-22 Tim NorthoverARM: use TableGen patterns to select CMOV operations.
2013-08-18 Tim NorthoverARM: make sure we keep inline asm operands tied.
2013-07-29 Silviu BarangaAllow generation of vmla.f32 instructions when targetin...
2013-07-16 Tim NorthoverARM: implement ldrex, strex and clrex intrinsics
2013-07-08 Joey GoulyAdd a comment to this change, requested by Eric Christo...
2013-07-05 Joey GoulyPR16490: fix a crash in ARMDAGToDAGISel::SelectInlineAsm.
2013-06-28 Eric ChristopherRemove unused variables.
2013-06-28 Weiming ZhaoBug 13662: Enable GPRPair for all i64 operands of inlin...
2013-06-19 Bill WendlingAccess the TargetLoweringInfo from the TargetMachine...
2013-06-06 Bill WendlingCache the TargetLowering info object as a pointer.
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4.
2013-05-24 Michael J. SpencerReplace Count{Leading,Trailing}Zeros_{32,64} with count...
2013-04-19 Michael LiaoArrayRefize getMachineNode(). No functionality change.
2013-03-09 Lang HamesDon't glue users to extract_subreg when selecting the...
2013-03-07 Benjamin KramerArrayRefize some code. No functionality change.
2013-02-14 Weiming ZhaoRe-apply r175088 for bug fix 13622: Add paired register...
2013-02-13 Weiming Zhaotemporarily revert the patch due to some conflicts
2013-02-13 Weiming ZhaoBug fix 13622: Add paired register support for inline...
2013-01-02 Chandler CarruthMove all of the header files which are involved in...
2012-12-19 Evan ChengLLVM sdisel normalize bit extraction of the form:
2012-12-03 Chandler CarruthUse the new script to sort the includes of every file...
2012-11-29 Silviu BarangaAdded atomic 64 min/max/umin/umax instrinsics support...
2012-11-17 Weiming ZhaoRename methods like PairSRegs() to createSRegpairNode...
2012-11-16 Weiming ZhaoRemove hard coded registers in ARM ldrexd and strexd...
2012-09-29 Bob WilsonAdd LLVM support for Swift.
2012-09-27 Sylvestre LedruRevert 'Fix a typo 'iff' => 'if''. iff is an abreviatio...
2012-09-27 Sylvestre LedruFix a typo 'iff' => 'if'
2012-09-14 Dmitri GribenkoFix Doxygen issues:
2012-09-13 Silviu BarangaThis patch introduces A15 as a target in LLVM.
2012-09-04 Arnold SchwaighoferPatch to implement UMLAL/SMLAL instructions for the...
2012-08-18 Jakob Stoklund OlesenRemove the CAND/COR/CXOR custom ISD nodes and their...
2012-08-15 Jakob Stoklund OlesenAdd missing Rfalse operand to the predicated pseudo...
2012-08-12 Arnold SchwaighoferRevert 161581: Patch to implement UMLAL/SMLAL instructi...
2012-08-09 Arnold SchwaighoferPatch to implement UMLAL/SMLAL instructions for the...
2012-08-01 Jim GrosbachClean up formatting.
2012-08-01 Jim GrosbachTidy up.
2012-05-24 Craig TopperMake some opcode tables static and const. Allows code...
2012-04-26 Tim NorthoverTest commit.
2012-04-11 Jim GrosbachARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
2012-04-11 Jim GrosbachARM 'vzip.32 Dd, Dm' is a pseudo-instruction.
2012-03-06 Jim GrosbachARM refactor more NEON VLD/VST instructions to use...
2012-03-05 Jim GrosbachARM refactor away a bunch of VLD/VST pseudo instructions.
2012-02-23 Duncan SandsRemove unused variable.
2012-02-23 Evan ChengOptimize a couple of common patterns involving conditio...
2012-02-07 Craig TopperConvert assert(0) to llvm_unreachable
2012-01-20 David BlaikieMore dead code removal (using -Wunreachable-code)
2012-01-10 Jim GrosbachARM updating VST2 pseudo-lowering fixed vs. register...
2011-12-21 Jim GrosbachARM NEON assmebly parsing for VLD2 to all lanes instruc...
2011-12-14 Jim GrosbachARM NEON refactor VST2 w/ writeback instructions.
2011-12-09 Jim GrosbachARM assembly parsing and encoding for VLD2 with writeback.
2011-11-29 Jim GrosbachARM assembly parsing and encoding for four-register...
2011-11-29 Jim GrosbachARM assembly parsing and encoding for three-register...
2011-10-31 Jim GrosbachARM VST1 w/ writeback assembly parsing and encoding.
2011-10-27 Jakob Stoklund OlesenAlso set addrmode6 alignment when align==size.
2011-10-27 Jim GrosbachARM isel for vld1, opcode selection for register stride...
2011-10-24 Jim GrosbachARM refactor am6offset usage for VLD1.
2011-10-18 Eli FriedmanFix misc warnings. Patch by Joe Abbey.
2011-10-10 Bill WendlingReapply r141365 now that PR11107 is fixed.
2011-10-10 Bill WendlingRevert r141365. It was causing MultiSource/Benchmarks...
2011-10-08 Anton KorobeynikovDisable ABS optimization for Thumb1 target, we don...
2011-10-07 Anton KorobeynikovPeephole optimization for ABS on ARM.
2011-10-05 Cameron ZwarichAlways merge profitable shifts on A9, not just when...
2011-10-05 Cameron ZwarichRemove a check from ARM shifted operand isel helper...
2011-10-05 Cameron ZwarichAdd braces around something that throws me for a loop.
2011-10-05 Cameron ZwarichThere is no point in setting out-parameters for a Compl...
2011-09-23 Jakob Stoklund OlesenAlso match negative offsets for addrmode3 and addrmode5.
2011-09-13 Jim GrosbachTidy up a few 80 column violations.
2011-08-31 Owen AndersonWhen performing instruction selection for LDR_PRE_IMM...
2011-08-31 Eli Friedman64-bit atomic cmpxchg for ARM.
2011-08-31 Eli FriedmanSome 64-bit atomic operations on ARM. 64-bit cmpxchg...
2011-08-29 Owen Andersonaddrmode_imm12 and addrmode2_offset encode their immedi...
2011-08-26 Owen AndersonFix ARM codegen breakage caused by r138653.
2011-08-26 Owen Andersoninvalid-LDR_PRE-arm.txt was already passing, but for...
2011-08-24 Jim GrosbachThumb1 ADD/SUB SP instructions are predicable in Thumb2...
2011-08-05 Jim GrosbachARM refactor indexed store instructions.
2011-07-27 Jim GrosbachARM parsing and encoding of SBFX and UBFX.
2011-07-26 Owen AndersonSplit am2offset into register addend and immediate...
2011-07-22 Owen AndersonFix test failures caused by my so_reg refactoring.
2011-07-21 Owen AndersonGet rid of the extraneous GPR operand on so_reg_imm...
2011-07-21 Owen AndersonSplit up the ARM so_reg ComplexPattern into so_reg_reg...
2011-07-20 Evan ChengSink ARMMCExpr and ARMAddressingModes into MC layer...
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-06-16 Owen AndersonChange the REG_SEQUENCE SDNode to take an explict regis...
2011-05-28 Bruno Cardoso LopesAdd support for ARM ldrexd/strexd intrinsics. They...
2011-04-29 Eli FriedmanZap a couple now-unused functions.
2011-04-19 Bob WilsonThis patch combines several changes from Evan Cheng...
2011-04-19 Evan ChengDo not lose mem_operands while lowering VLD / VST intri...
2011-03-18 Owen AndersonReduce code duplication.
2011-03-14 Bill WendlingGenerate a VTBL instruction instead of a series of...
2011-03-11 Jim GrosbachRemove dead code. These ARM instruction definitions...
2011-03-05 Bob WilsonRemove unused conditional negate operations.
2011-02-25 Bob WilsonAdd patterns to use post-increment addressing for Neon...
2011-02-13 Chris LattnerEnhance ComputeMaskedBits to know that aligned frameindexes
next