[ADT] Switch a bunch of places in LLVM that were doing single-character
[oota-llvm.git] / lib / Target / ARM / ARMISelDAGToDAG.cpp
2012-01-10 Jim GrosbachARM updating VST2 pseudo-lowering fixed vs. register...
2011-12-21 Jim GrosbachARM NEON assmebly parsing for VLD2 to all lanes instruc...
2011-12-14 Jim GrosbachARM NEON refactor VST2 w/ writeback instructions.
2011-12-09 Jim GrosbachARM assembly parsing and encoding for VLD2 with writeback.
2011-11-29 Jim GrosbachARM assembly parsing and encoding for four-register...
2011-11-29 Jim GrosbachARM assembly parsing and encoding for three-register...
2011-10-31 Jim GrosbachARM VST1 w/ writeback assembly parsing and encoding.
2011-10-27 Jakob Stoklund OlesenAlso set addrmode6 alignment when align==size.
2011-10-27 Jim GrosbachARM isel for vld1, opcode selection for register stride...
2011-10-24 Jim GrosbachARM refactor am6offset usage for VLD1.
2011-10-18 Eli FriedmanFix misc warnings. Patch by Joe Abbey.
2011-10-10 Bill WendlingReapply r141365 now that PR11107 is fixed.
2011-10-10 Bill WendlingRevert r141365. It was causing MultiSource/Benchmarks...
2011-10-08 Anton KorobeynikovDisable ABS optimization for Thumb1 target, we don...
2011-10-07 Anton KorobeynikovPeephole optimization for ABS on ARM.
2011-10-05 Cameron ZwarichAlways merge profitable shifts on A9, not just when...
2011-10-05 Cameron ZwarichRemove a check from ARM shifted operand isel helper...
2011-10-05 Cameron ZwarichAdd braces around something that throws me for a loop.
2011-10-05 Cameron ZwarichThere is no point in setting out-parameters for a Compl...
2011-09-23 Jakob Stoklund OlesenAlso match negative offsets for addrmode3 and addrmode5.
2011-09-13 Jim GrosbachTidy up a few 80 column violations.
2011-08-31 Owen AndersonWhen performing instruction selection for LDR_PRE_IMM...
2011-08-31 Eli Friedman64-bit atomic cmpxchg for ARM.
2011-08-31 Eli FriedmanSome 64-bit atomic operations on ARM. 64-bit cmpxchg...
2011-08-29 Owen Andersonaddrmode_imm12 and addrmode2_offset encode their immedi...
2011-08-26 Owen AndersonFix ARM codegen breakage caused by r138653.
2011-08-26 Owen Andersoninvalid-LDR_PRE-arm.txt was already passing, but for...
2011-08-24 Jim GrosbachThumb1 ADD/SUB SP instructions are predicable in Thumb2...
2011-08-05 Jim GrosbachARM refactor indexed store instructions.
2011-07-27 Jim GrosbachARM parsing and encoding of SBFX and UBFX.
2011-07-26 Owen AndersonSplit am2offset into register addend and immediate...
2011-07-22 Owen AndersonFix test failures caused by my so_reg refactoring.
2011-07-21 Owen AndersonGet rid of the extraneous GPR operand on so_reg_imm...
2011-07-21 Owen AndersonSplit up the ARM so_reg ComplexPattern into so_reg_reg...
2011-07-20 Evan ChengSink ARMMCExpr and ARMAddressingModes into MC layer...
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-06-16 Owen AndersonChange the REG_SEQUENCE SDNode to take an explict regis...
2011-05-28 Bruno Cardoso LopesAdd support for ARM ldrexd/strexd intrinsics. They...
2011-04-29 Eli FriedmanZap a couple now-unused functions.
2011-04-19 Bob WilsonThis patch combines several changes from Evan Cheng...
2011-04-19 Evan ChengDo not lose mem_operands while lowering VLD / VST intri...
2011-03-18 Owen AndersonReduce code duplication.
2011-03-14 Bill WendlingGenerate a VTBL instruction instead of a series of...
2011-03-11 Jim GrosbachRemove dead code. These ARM instruction definitions...
2011-03-05 Bob WilsonRemove unused conditional negate operations.
2011-02-25 Bob WilsonAdd patterns to use post-increment addressing for Neon...
2011-02-13 Chris LattnerEnhance ComputeMaskedBits to know that aligned frameindexes
2011-02-07 Bob WilsonAdd codegen support for using post-increment NEON load...
2011-02-07 Bob WilsonChange VLD3/4 and VST3/4 for quad registers to not...
2011-01-20 Evan ChengSorry, several patches in one.
2011-01-19 Daniel DunbarARM/ISel: Factor out isScaledConstantInRange() helper.
2011-01-17 Evan ChengMaterialize GA addresses with movw + movt pairs for...
2011-01-01 Anton KorobeynikovModel operand restrictions of mul-like instructions...
2010-12-24 Andrew Trickwhitespace
2010-12-21 Chris Lattnerrename MVT::Flag to MVT::Glue. "Flag" is a terrible...
2010-12-17 Bob WilsonUse PairDRegs to implement ConcatVectors. No functiona...
2010-12-15 Jim GrosbachThumb1 had two patterns for the same load-from-constant...
2010-12-15 Bill WendlingReapply r121808 now that the missing patterns have...
2010-12-15 Bill WendlingRevert r121808 until I can fix the build.
2010-12-14 Bill WendlingMake the ISel selections for LDR/STR the same as before...
2010-12-14 Bill WendlingThe tLDR et al instructions were emitting either a...
2010-12-10 Bob WilsonFix some invalid alignments for Neon vld-dup and vld...
2010-12-05 Evan ChengMaking use of VFP / NEON floating point multiply-accumu...
2010-11-30 Bob WilsonAdd support for NEON VLD3-dup instructions.
2010-11-29 Bob WilsonAdd support for NEON VLD3-dup instructions.
2010-11-28 Bob WilsonAdd support for NEON VLD2-dup instructions.
2010-11-19 Evan ChengFix a cut-n-paste-error.
2010-11-17 Evan ChengAvoid isel movcc of large immediates when the large...
2010-11-13 Evan ChengAdd conditional move of large immediate.
2010-11-13 Evan ChengFix an obvious typo which inverted an immediate.
2010-11-12 Evan ChengAdd conditional mvn instructions.
2010-11-03 Duncan SandsSimplify uses of MVT and EVT. An MVT can be compared...
2010-11-03 Jim GrosbachBreak ARM addrmode4 (load/store multiple base address...
2010-11-01 Bob WilsonAdd support for alignment operands on VLD1-lane instruc...
2010-10-27 Evan ChengShifter ops are not always free. Do not fold them ...
2010-10-26 Jim GrosbachFirst part of refactoring ARM addrmode2 (load/store...
2010-10-21 Jim Grosbachtrailing whitespace
2010-10-19 Bob WilsonSupport alignment for NEON vld-lane and vst-lane instru...
2010-10-07 Jim GrosbachAllow use of the 16-bit literal move instruction in...
2010-10-07 Jim GrosbachAllow use of the 16-bit literal move instruction in...
2010-09-29 Jim GrosbachAdd specializations of addrmode2 that allow differentia...
2010-09-29 Jim GrosbachAdd braces for legibility.
2010-09-23 Bob WilsonSet alignment operand for NEON VST instructions.
2010-09-23 Bob WilsonSet alignment operand for NEON VLD instructions.
2010-09-21 Chris Lattnerfix a long standing wart: all the ComplexPattern's...
2010-09-14 Eric ChristopherFix QOpcode assignment to Opc.
2010-09-13 Bob WilsonConvert some VTBL and VTBX instructions to use pseudo...
2010-09-13 Bob WilsonSwitch all the NEON vld-lane and vst-lane instructions...
2010-09-05 Chris Lattnerremove some dead code. t2addrmode_imm8s4 is never...
2010-09-03 Bob WilsonFinish converting the rest of the NEON VLD instructions...
2010-09-02 Bob WilsonConvert VLD1 and VLD2 instructions to use pseudo-instru...
2010-09-01 Chris Lattnertemporarily revert r112664, it is causing a decoding...
2010-08-31 Bill WendlingWe have a chance for an optimization. Consider this...
2010-08-28 Bob WilsonUse pseudo instructions for VST1 and VST2.
2010-08-28 Bob WilsonWe don't need to custom-select VLDMQ and VSTMQ anymore.
2010-08-27 Bob WilsonChange ARM VFP VLDM/VSTM instructions to use addressing...
2010-08-26 Bob WilsonUse pseudo instructions for VST3.
2010-08-26 Bob WilsonUse pseudo instructions for VST1d64Q.
2010-08-25 Bob WilsonStart converting NEON load/stores to use pseudo instruc...
2010-08-17 Jakob Stoklund OlesenDon't call tablegen'ed Predicate_* functions in the...
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