[cleanup] Re-sort all the #include lines in LLVM using
[oota-llvm.git] / lib / Target / ARM / ARMExpandPseudoInsts.cpp
2015-01-14 Chandler Carruth[cleanup] Re-sort all the #include lines in LLVM using
2015-01-08 Kristof BeylsFix large stack alignment codegen for ARM and Thumb2...
2014-12-10 Tim NorthoverARM: correctly expand LDR-lit based globals.
2014-08-05 Eric ChristopherHave MachineFunction cache a pointer to the subtarget...
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn...
2014-06-24 Christian PirkerARM: Fix TPsoft for Thumb mode
2014-05-21 Saleem AbdulrasoolARM: correct bundle generation for MOV32T relocations
2014-05-01 Saleem AbdulrasoolARM: support expanding external symbols in 32-bit moves
2014-04-30 Saleem AbdulrasoolARM: move llvm_unreachable use
2014-04-30 Saleem AbdulrasoolARM: partially handle 32-bit relocations for WoA
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition.
2014-04-22 Chandler Carruth[Modules] Fix potential ODR violations by sinking the...
2014-03-10 Craig Topper[C++11] Add 'override' keyword to virtual methods that...
2014-03-02 Benjamin Kramer[C++11] Replace llvm::next and llvm::prior with std...
2014-01-20 James MolloyRemove the useless pseudo instructions VDUPfdf and...
2014-01-16 Jiangning LiuFor ARM, fix assertuib failures for some ld/st 3/4...
2014-01-15 Weiming ZhaoPR 18466: Fix ARM Pseudo Expansion
2013-12-02 Tim NorthoverARM: add pseudo-instructions for lit-pool global materi...
2013-11-25 Tim NorthoverARM: remove special cases for Darwin dynamic-no-pic...
2013-10-04 Matthias BraunARM: preserve undef flag in pseudo instruction expanders
2013-10-01 Tim NorthoverARM: support interrupt attribute
2013-09-28 Robert WilhelmEven more spelling fixes for "instruction".
2013-08-22 Tim NorthoverARM: use TableGen patterns to select CMOV operations.
2012-12-03 Chandler CarruthUse the new script to sort the includes of every file...
2012-11-06 Chad RosierMark the Int_eh_sjlj_dispatchsetup pseudo instruction...
2012-10-26 Jakob Stoklund OlesenRevert r163298 "Optimize codegen for VSETLNi{8,16,32...
2012-09-20 Craig TopperChange enum type in a static table to uint8_t instead...
2012-09-06 James MolloyOptimize codegen for VSETLNi{8,16,32} operating on...
2012-08-09 Eric ChristopherRemove getARMRegisterNumbering and replace with calls...
2012-06-15 Jakob Stoklund OlesenPreserve <undef> flags in ARMExpandPseudo.
2012-05-20 Jakob Stoklund OlesenTransfer memory operands to the right instruction.
2012-03-27 Craig TopperRemove unnecessary llvm:: qualifications
2012-03-26 Craig TopperPrune includes and replace uses of ARMRegisterInfo...
2012-03-11 Craig TopperUse uint16_t to store registers and opcode in static...
2012-03-06 Jim GrosbachARM refactor more NEON VLD/VST instructions to use...
2012-03-05 Jim GrosbachARM refactor away a bunch of VLD/VST pseudo instructions.
2012-02-18 Jia LiuEmacs-tag and some comment fix for all ARM, CellSPU...
2012-01-20 David BlaikieMore dead code removal (using -Wunreachable-code)
2012-01-10 Jim GrosbachARM updating VST2 pseudo-lowering fixed vs. register...
2011-12-22 Bob WilsonAdd variants of the dispatchsetup pseudo for Thumb...
2011-12-21 Jim GrosbachARM NEON assmebly parsing for VLD2 to all lanes instruc...
2011-12-21 Jim GrosbachARM NEON VLD2 assembly parsing for structure to all...
2011-12-17 Jakob Stoklund OlesenPreserve more memory operands in ARMExpandPseudo.
2011-12-15 Jim GrosbachARM NEON VTBL/VTBX assembly parsing and encoding.
2011-12-14 Jim GrosbachARM NEON refactor VST2 w/ writeback instructions.
2011-12-14 Jim GrosbachARM NEON VST2 assembly parsing and encoding.
2011-12-09 Jim GrosbachARM assembly parsing and encoding for VLD2 with writeback.
2011-11-30 Jim GrosbachARM parsing for VLD1 all lanes, with writeback.
2011-11-30 Jim GrosbachARM parsing for VLD1 two register all lanes, no writeback.
2011-11-29 Jim GrosbachARM assembly parsing and encoding for four-register...
2011-11-29 Jim GrosbachARM assembly parsing and encoding for three-register...
2011-11-16 Bob WilsonFix ARM SjLj-EH dispatch setup code. <rdar://problem...
2011-11-12 Jim GrosbachRe-apply 144430, this time with the associated isel...
2011-10-31 Jim GrosbachARM VST1 w/ writeback assembly parsing and encoding.
2011-10-31 Jim GrosbachARM writeback vs. stride operands for VST/VLD.
2011-10-24 Jim GrosbachNuke dead code. Nothing generates the VLD1d64QPseudo_UP...
2011-10-24 Jim GrosbachARM assembly parsing and encoding for VLD1 w/ writeback.
2011-10-24 Jim GrosbachARM refactor am6offset usage for VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 4-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 2-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 4-register variant of VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 3-register variant of VLD1.
2011-10-21 Jim GrosbachARM VLD parsing and encoding.
2011-09-02 Jim GrosbachTidy up. Formatting.
2011-08-20 Chad RosierRemove the VMOVQQ pseudo instruction.
2011-08-20 Chad RosierVMOVQQQQs pseudo instructions are only created by ARMBa...
2011-08-19 Benjamin KramerMake a bunch of symbols private.
2011-08-13 Bob WilsonExpand VMOVQQQQ pseudo instructions.
2011-07-29 Jakob Stoklund OlesenAdd -verify-arm-pseudo-expand.
2011-07-21 Owen AndersonGet rid of the extraneous GPR operand on so_reg_imm...
2011-07-21 Owen AndersonSplit up the ARM so_reg ComplexPattern into so_reg_reg...
2011-07-20 Evan ChengSink ARMMCExpr and ARMAddressingModes into MC layer...
2011-07-15 Owen AndersonRemove VMOVDneon and VMOVQ, which are just aliases...
2011-07-13 Jim Grosbach80 columns.
2011-07-01 Jim GrosbachPseudo-ize t2MOVCC[ri].
2011-06-30 Jim GrosbachPseudo-ize the Thumb tTPsoft instruction.
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-04-29 Chris Lattneruse the MachineInstrBuilder operator-> to simplify...
2011-04-19 Evan ChengDo not lose mem_operands while lowering VLD / VST intri...
2011-04-05 Owen AndersonFix bugs in the pseuo-ization of ADCS/SBCS pointed...
2011-04-05 Owen AndersonConvert ADCS and SBCS instructions into pseudos that...
2011-03-29 Owen AndersonGet rid of the non-writeback versions VLDMDB and VSTMDB...
2011-03-17 Owen AndersonThere are two pseudos in this case that are Thumb mode...
2011-03-11 Jim GrosbachPseudo-ize VMOVDcc and VMOVScc.
2011-03-11 Jim Grosbach80 columns
2011-03-11 Jim GrosbachARM VDUPLNfq and VDUPLNfd definitions can just be Pat...
2011-03-11 Jim GrosbachProperly pseudo-ize ARM MVNCCi.
2011-03-11 Jim GrosbachProperly pseudo-ize ARM MOVCCi and MOVCCi16.
2011-03-10 Jim GrosbachProperly pseudo-ize MOVCCr and MOVCCs.
2011-03-05 Anton KorobeynikovPreliminary support for ARM frame save directives emiss...
2011-02-08 Owen AndersonRevert both r121082 (which broke a bunch of constant...
2011-02-07 Bob WilsonChange VLD3/4 and VST3/4 for quad registers to not...
2011-01-23 Ted KremenekNull initialize a few variables flagged by
2011-01-21 Evan ChengLast round of fixes for movw + movt global address...
2011-01-20 Evan ChengSorry, several patches in one.
2011-01-17 Evan ChengMaterialize GA addresses with movw + movt pairs for...
2011-01-10 Anton KorobeynikovRename TargetFrameInfo into TargetFrameLowering. Also...
2010-12-13 Owen AndersonRevert r121721, which broke buildbots.
2010-12-13 Owen AndersonMake Thumb2 LEA-like instruction into pseudos, which...
2010-12-13 Bob WilsonUse COPY_TO_REGCLASS instead of pseudo instructions...
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