[PowerPC] Enable interleaved-access vectorization
[oota-llvm.git] / lib / Target / AMDGPU /
2015-09-03 Sanjay Patelcheck for fastness before merging in DAGCombiner::Merge...
2015-09-01 Matt ArsenaultAMDGPU: Fix adding redundant implicit operands
2015-08-29 Matt ArsenaultAMDGPU: Add sdst operand to VOP2b instructions
2015-08-29 Matt ArsenaultAMDGPU: Set mem operands for spill instructions
2015-08-29 Matt ArsenaultAMDGPU: Fix dropping mem operands when moving to VALU
2015-08-29 Tom StellardAMDGPU/SI: Fix some invaild assumptions when folding...
2015-08-28 Tom StellardAMDGPU/SI: Factor operand folding code into its own...
2015-08-26 Matt ArsenaultAMDGPU: Delete dead code
2015-08-26 Matt ArsenaultAMDGPU: Don't reprocess instructions when splitting...
2015-08-26 Matt ArsenaultAMDGPU: Fix not moving users of s_bfe_i64 to VALU
2015-08-26 Matt ArsenaultAMDGPU: Don't create intermediate SALU instructions
2015-08-26 Matt ArsenaultAMDGPU/SI: Report SIFixSGPRLiveRanges changed function
2015-08-26 Matt ArsenaultAMDGPU: Make sure to reserve super registers
2015-08-26 Matt ArsenaultAMDGPU: Produce error on dynamic_stackalloc
2015-08-22 Matt ArsenaultAMDGPU: Allow specifying different opcode on VI for...
2015-08-22 Matt ArsenaultAMDGPU: Improve accuracy of instruction rates for some...
2015-08-22 Matt ArsenaultAMDGPU: Use DFS to avoid second loop over function
2015-08-22 Matt ArsenaultAMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges
2015-08-22 Matt ArsenaultAMDGPU: Improve debug printing in SIFixSGPRLiveRanges
2015-08-22 Matt ArsenaultAMDGPU: Move CI instructions into CIInstructions.td
2015-08-21 Matt ArsenaultAMDGPU: Minor cleanups to help with f16 support
2015-08-21 Tom StellardAMDGPU/SI: Better handle s_wait insertion
2015-08-19 Michael Kuperstein[TLI] Refactor "is integer division cheap" queries.
2015-08-18 Matthias BraunMachineRegisterInfo: Introduce isPhysRegUsed()
2015-08-16 Yaron KerenAdd missing include guard.
2015-08-15 Matt ArsenaultAMDGPU/SI: Only look at live out SGPR defs
2015-08-15 James Y KnightRemove redundant TargetFrameLowering::getFrameIndexOffs...
2015-08-15 Matt ArsenaultAMDGPU/SI: Fix printing useless info with amdhsa
2015-08-15 Matt ArsenaultAMDGPU/SI: Update LiveVariables
2015-08-15 Matt ArsenaultAMDGPU/SI: Update LiveIntervals during SIFixSGPRLiveRanges
2015-08-15 Matt ArsenaultAMDGPU: Remove unnecessary assert
2015-08-15 Matt ArsenaultAMDGPU/SI: Make comments more precise.
2015-08-14 Tom StellardAMDGPU/SI: Add missing spill class
2015-08-13 Simon Pilgrim[AMDGPU] Use the general SMAX/SMIN/UMAX/UMIN pattern...
2015-08-13 Yaron KerenRemove and forbid raw_svector_ostream::flush() calls.
2015-08-12 Matt ArsenaultAMDGPU: Fix assert on dbg_value instructions
2015-08-11 Alex LorenzPseudoSourceValue: Replace global manager with a manage...
2015-08-08 Benjamin KramerFix some comment typos.
2015-08-08 Tom StellardAMDGPU/SI: Another attempt to fix Windows bots broken...
2015-08-08 Matt ArsenaultAMDGPU: Implement AMDGPUOperand::print()
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove VCCReg
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove source uses of VCCReg
2015-08-08 Tom StellardAMDGPU/SI: Attempt to fix Windows bots broken by r244372
2015-08-07 Tom StellardAMDGPU: Add pass to lower OpenCL image and sampler...
2015-08-07 Tom StellardAMDGPU/SI: Use InstAlias instead of MnemonicAlias for...
2015-08-07 Matt ArsenaultAMDGPU: Assume SMRD access for constant address space
2015-08-07 Tom StellardAMDGPU/SI: Use correct encoding of vopc for VI in the...
2015-08-07 Tom StellardAMDGPU/SI: v_mac_legacy_f32 does not exist on VI
2015-08-07 Tom StellardAMDGPU/SI: Remove unused outs parameter from VOPC Table...
2015-08-06 Tom StellardAMDGPU/SI: Add Fiji support
2015-08-06 Tom StellardAMDGPU/SI: Add support for 32-bit immediate SMRD offset...
2015-08-06 Tom StellardAMDGPU/SI: Use ComplexPatterns for SMRD addressing...
2015-08-05 Matt ArsenaultAMDGPU/SI: Remove EXECReg
2015-08-05 Matt ArsenaultAMDGPU: Remove SCCReg.
2015-08-01 Craig TopperDe-constify pointers to Type since they can't be modifi...
2015-07-31 Alex LorenzAMDGPU/SI: Add implicit register operands in the correc...
2015-07-31 Matt ArsenaultAMDGPU: Fix v16i32 to v16i8 truncstore
2015-07-31 Matt ArsenaultAMDGPU/SI: Set DwarfRegNum
2015-07-31 Tom StellardAMDGPU/SI: Remove unused pattern for f32 constant loads
2015-07-30 Matt ArsenaultAMDGPU: Set SubRegIndex size and offset
2015-07-30 Matt ArsenaultAMDGPU: Fix unreachable when emitting binary debug...
2015-07-30 Tom StellardAMDGPU/SI: Simplify moveSMRDToVALU()
2015-07-30 Tom StellardAMDGPU/SI: Remove isTriviallyReMaterializable() functio...
2015-07-29 Nick LewyckyFix typo "fuction" noticed in comments in AssumptionCac...
2015-07-28 Alex LorenzFix broken ArrayRef conversion from r243497.
2015-07-28 Alex LorenzMIR Serialization: Serialize the target index machine...
2015-07-28 Matt ArsenaultAMDGPU: Don't try to use LDS/vector for private if...
2015-07-28 Matt ArsenaultAMDGPU: Fix crash if called function is a bitcast
2015-07-28 Matt ArsenaultAMDGPU: Fix return type of getImplicitParameterOffset.
2015-07-27 Colin LeMahieu[llvm-mc] Pushing plumbing through for --fatal-warnings...
2015-07-27 Marek OlsakAMDGPU: don't match vgpr loads for constant loads
2015-07-27 Marek OlsakAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
2015-07-22 Chandler Carruth[PM/AA] Remove all of the dead AliasAnalysis pointers...
2015-07-21 Matt ArsenaultAMDGPU: Set isMoveImm on s_movk_i32
2015-07-20 Tom StellardAMDGPU/SI: Add VI patterns to select FLAT instructions...
2015-07-19 Simon PilgrimRemove TargetInstrInfo::canFoldMemoryOperand
2015-07-16 Tom StellardAMDPGU/SI: Negative offsets aren't allowed in MUBUF...
2015-07-16 Tom StellardAMDPGU/SI: Use AssertZext node to mask high bit for...
2015-07-16 Tom StellardAMDGPU/R600: Remove unused variable
2015-07-16 Tom StellardAMDPGU/R600: Replace llvm_unreachable() call with LLVMC...
2015-07-16 Mehdi AminiAdd missing break in switch case in R600ISelLowering
2015-07-14 Pete CooperAdd allnodes() iterator range to SelectionDAG. NFC.
2015-07-14 Matt ArsenaultAMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)
2015-07-14 Matt ArsenaultAMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 Matthias BraunMachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 Tom StellardAMDGPU/SI: Add support for shrinking v_cndmask_b32_e32...
2015-07-13 Matt ArsenaultAMDGPU: Minor cleanups to always inline pass
2015-07-13 Tom StellardAMDGPU/SI: Select mad patterns to v_mac_f32
2015-07-10 Matt ArsenaultAMDGPU: Fix chains for memory ops dependent on argument...
2015-07-10 Duncan P. N. Exon... MC: Remove MCSubtargetInfo() default constructor
2015-07-10 Matt ArsenaultAMDGPU: Use requested chain when lowering arguments
2015-07-09 Tom StellardAMDGPU: Add helper function for implicit parameter...
2015-07-09 Matt ArsenaultAMDGPU/R600: Return correct chain when lowering loads
2015-07-09 Tom StellardAMDGPU/SI: The SIShrinkInstructions pass should only...
2015-07-09 Tom StellardAMDGPU/SI: Fix crash on physical registers in SIInstrIn...
2015-07-09 Mehdi AminiRe-instate the EVT parameter to getScalarShiftAmountTy...
2015-07-09 Mehdi AminiRemove getDataLayout() from TargetLowering
2015-07-09 Mehdi AminiMake isLegalAddressingMode() taking DataLayout as an...
2015-07-09 Mehdi AminiMake TargetLowering::getShiftAmountTy() taking DataLayo...
2015-07-09 Mehdi AminiMake TargetLowering::getPointerTy() taking DataLayout...
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