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AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
[oota-llvm.git]
/
lib
/
Target
/
AMDGPU
/
SIInstructions.td
2015-12-15
Tom Stellard
AMDGPU/SI: Select constant loads with non-uniform addre...
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2015-12-15
Tom Stellard
AMDGPU/SI: Fix bitcast between v2f32 and f64
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2015-12-15
Tom Stellard
AMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsics
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2015-12-14
Matt Arsenault
AMDGPU: Use generic bitreverse intrinsic
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2015-12-11
Matt Arsenault
Start replacing vector_extract/vector_insert with extra...
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2015-12-10
Tom Stellard
AMDGPU/SI: Emit constant arrays in the .text section
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2015-12-01
Tom Stellard
AMDGPU/SI: Remove REGISTER_STORE/REGISTER_LOAD code...
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2015-11-25
Marek Olsak
AMDGPU/SI: select S_ABS_I32 when possible (v2)
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2015-11-25
Matt Arsenault
AMDGPU: Make v2i64/v2f64 legal types.
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2015-11-06
Tom Stellard
AMDGPU/SI: Refactor VOP[12C] tablegen definitions
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2015-11-06
Matt Arsenault
AMDGPU: Remove unused scratch resource operands
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2015-10-29
Marek Olsak
AMDGPU/SI: use S_OR for fneg (fabs f32)
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2015-10-29
Marek Olsak
AMDGPU/SI: use S_AND for i1 trunc
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2015-10-07
Matt Arsenault
AMDGPU: Fix missing implicit m0 uses on movrel instructions
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2015-10-07
Matt Arsenault
AMDGPU: Use explicit register size indirect pseudos
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2015-10-06
Tom Stellard
AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
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2015-10-02
Matt Arsenault
AMDGPU/SI: Add verifier check for exec reads
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2015-09-26
Matt Arsenault
AMDGPU: VOP3b definition cleanups
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2015-09-24
Matt Arsenault
AMDGPU: Add s_dcache_* instructions
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2015-09-24
Matt Arsenault
AMDGPU: Add cache invalidation instructions.
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2015-09-10
Matt Arsenault
AMDGPU/SI: Fix more cases of losing exec operands
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2015-09-08
Matt Arsenault
AMDGPU/SI: Fix input vcc operand for VOP2b instructions
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2015-09-08
Matt Arsenault
AMDGPU: Mark s_barrier as a high latency instruction
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2015-09-08
Matt Arsenault
AMDGPU: Fix s_barrier flags
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2015-08-29
Matt Arsenault
AMDGPU: Add sdst operand to VOP2b instructions
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2015-08-29
Matt Arsenault
AMDGPU: Set mem operands for spill instructions
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2015-08-26
Matt Arsenault
AMDGPU: Delete dead code
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2015-08-22
Matt Arsenault
AMDGPU: Allow specifying different opcode on VI for...
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2015-08-22
Matt Arsenault
AMDGPU: Improve accuracy of instruction rates for some...
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2015-08-22
Matt Arsenault
AMDGPU: Move CI instructions into CIInstructions.td
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2015-08-08
Matt Arsenault
AMDGPU/SI: Remove source uses of VCCReg
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2015-08-07
Tom Stellard
AMDGPU/SI: v_mac_legacy_f32 does not exist on VI
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2015-08-06
Tom Stellard
AMDGPU/SI: Add support for 32-bit immediate SMRD offset...
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2015-08-06
Tom Stellard
AMDGPU/SI: Use ComplexPatterns for SMRD addressing...
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2015-08-05
Matt Arsenault
AMDGPU/SI: Remove EXECReg
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2015-08-05
Matt Arsenault
AMDGPU: Remove SCCReg.
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2015-07-31
Tom Stellard
AMDGPU/SI: Remove unused pattern for f32 constant loads
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2015-07-27
Marek Olsak
AMDGPU: don't match vgpr loads for constant loads
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2015-07-27
Marek Olsak
AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
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2015-07-21
Matt Arsenault
AMDGPU: Set isMoveImm on s_movk_i32
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2015-07-13
Tom Stellard
AMDGPU/SI: Select mad patterns to v_mac_f32
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2015-06-13
Tom Stellard
R600 -> AMDGPU rename
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2012-07-16
Tom Stellard
Revert "AMDGPU: Add core backend files for R600/SI...
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2012-07-16
Tom Stellard
AMDGPU: Add core backend files for R600/SI codegen v6
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