AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM
[oota-llvm.git] / lib / Target / AMDGPU / SIInstructions.td
2015-08-22 Matt ArsenaultAMDGPU: Allow specifying different opcode on VI for...
2015-08-22 Matt ArsenaultAMDGPU: Improve accuracy of instruction rates for some...
2015-08-22 Matt ArsenaultAMDGPU: Move CI instructions into CIInstructions.td
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove source uses of VCCReg
2015-08-07 Tom StellardAMDGPU/SI: v_mac_legacy_f32 does not exist on VI
2015-08-06 Tom StellardAMDGPU/SI: Add support for 32-bit immediate SMRD offset...
2015-08-06 Tom StellardAMDGPU/SI: Use ComplexPatterns for SMRD addressing...
2015-08-05 Matt ArsenaultAMDGPU/SI: Remove EXECReg
2015-08-05 Matt ArsenaultAMDGPU: Remove SCCReg.
2015-07-31 Tom StellardAMDGPU/SI: Remove unused pattern for f32 constant loads
2015-07-27 Marek OlsakAMDGPU: don't match vgpr loads for constant loads
2015-07-27 Marek OlsakAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
2015-07-21 Matt ArsenaultAMDGPU: Set isMoveImm on s_movk_i32
2015-07-13 Tom StellardAMDGPU/SI: Select mad patterns to v_mac_f32
2015-06-13 Tom StellardR600 -> AMDGPU rename
2012-07-16 Tom StellardRevert "AMDGPU: Add core backend files for R600/SI...
2012-07-16 Tom StellardAMDGPU: Add core backend files for R600/SI codegen v6