AMDGPU: Factor switch into separate function
[oota-llvm.git] / lib / Target / AMDGPU / SIInstrInfo.cpp
2015-09-28 Matt ArsenaultAMDGPU: Factor switch into separate function
2015-09-28 Matt ArsenaultAMDGPU: Fix splitting x16 SMRD loads
2015-09-28 Matt ArsenaultAMDGPU: Fix moving SMRD loads with literal offsets...
2015-09-28 Matt ArsenaultAMDGPU: Fix splitting SMRD with large offset
2015-09-28 Andrew KaylorImproved the interface of methods commuting operands...
2015-09-25 Matt ArsenaultAMDGPU: Construct new buffer instruction when moving...
2015-09-25 Matt ArsenaultAMDGPU: Re-justify workaround and fix worked around...
2015-09-25 Matt ArsenaultAMDGPU: Don't create REG_SEQUENCE with SGPR dest and...
2015-09-24 Matt ArsenaultAMDGPU: Return after instruction is processed.
2015-09-24 Matt ArsenaultAMDGPU: Remove another unnecessary check from commuteIn...
2015-09-24 Matt ArsenaultAMDGPU: Reduce number of copies emitted
2015-09-22 Matt ArsenaultAMDGPU: Remove unnecessary check
2015-09-10 Matt ArsenaultAMDGPU/SI: Fix more cases of losing exec operands
2015-09-09 Matt ArsenaultAMDGPU: Extract full 64-bit subregister and use subregs
2015-09-01 Matt ArsenaultAMDGPU: Fix adding redundant implicit operands
2015-08-29 Matt ArsenaultAMDGPU: Set mem operands for spill instructions
2015-08-29 Matt ArsenaultAMDGPU: Fix dropping mem operands when moving to VALU
2015-08-26 Matt ArsenaultAMDGPU: Delete dead code
2015-08-26 Matt ArsenaultAMDGPU: Don't reprocess instructions when splitting...
2015-08-26 Matt ArsenaultAMDGPU: Fix not moving users of s_bfe_i64 to VALU
2015-08-26 Matt ArsenaultAMDGPU: Don't create intermediate SALU instructions
2015-08-08 Benjamin KramerFix some comment typos.
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove VCCReg
2015-08-05 Matt ArsenaultAMDGPU/SI: Remove EXECReg
2015-07-31 Alex LorenzAMDGPU/SI: Add implicit register operands in the correc...
2015-07-30 Tom StellardAMDGPU/SI: Simplify moveSMRDToVALU()
2015-07-30 Tom StellardAMDGPU/SI: Remove isTriviallyReMaterializable() functio...
2015-07-14 Matt ArsenaultAMDGPU/SI: Fix read2 merging into a super register.
2015-07-13 Tom StellardAMDGPU/SI: Select mad patterns to v_mac_f32
2015-07-09 Tom StellardAMDGPU/SI: Fix crash on physical registers in SIInstrIn...
2015-06-26 Tom StellardAMDPGU/SI: Use correct resource descriptors for VI...
2015-06-26 Marek OlsakAMDGPU: really don't commute REV opcodes if the target...
2015-06-19 Eric ChristopherFix "the the" in comments.
2015-06-15 Sanjoy Das[TargetInstrInfo] Rename getLdStBaseRegImmOfs and imple...
2015-06-13 Tom StellardR600 -> AMDGPU rename
2012-07-16 Tom StellardRevert "AMDGPU: Add core backend files for R600/SI...
2012-07-16 Tom StellardAMDGPU: Add core backend files for R600/SI codegen v6