Taints the non-acquire RMW's store address with the load part
[oota-llvm.git] / lib / Target / AMDGPU /
2016-02-12 Hans WennborgMerging r260427:
2016-01-29 Tom StellardMerging r258922:
2016-01-29 Tom StellardMerging r257666:
2016-01-26 Tom StellardMerging r258386:
2016-01-13 Hans WennborgMerging r257648:
2016-01-13 Marek OlsakAMDGPU/SI: Fix a GPU hang with POS_W_FLOAT enabled
2016-01-13 Marek OlsakAMDGPU/SI: Remove ending s_endpgm from non-void functions
2016-01-13 Marek OlsakAMDGPU/SI: Add s_waitcnt at the end of non-void functions
2016-01-13 Marek OlsakAMDGPU/SI: Add support for non-void functions
2016-01-13 Nicolai HaehnleAMDGPU/SI: Add SI Machine Scheduler
2016-01-13 Marek OlsakAMDGPU/SI: Allow more shader inputs
2016-01-13 Marek OlsakAMDGPU/SI: Allow any number of PS inputs
2016-01-13 Marek OlsakAMDGPU/SI: Add new target attribute InitialPSInputAddr
2016-01-13 Marek OlsakAMDGPU/SI: Fix a bug in SIFoldOperands
2016-01-12 Tom StellardAMDGPU: Emit note directive for HSA even if there are...
2016-01-11 Matt ArsenaultAMDGPU: Implement {{s|u}}int_to_fp i64 -> f32
2016-01-11 Matt ArsenaultAMDGPU: Fix crash with dispatch.ptr intrinsic with...
2016-01-11 Matt ArsenaultAMDGPU: Fix ctlz combine for sub 32-bit types
2016-01-11 Matt ArsenaultAMDGPU: Pattern match ffbh pattern to instruction.
2016-01-11 Matt ArsenaultAMDGPU: Custom lower i64 ctlz
2016-01-11 Matt ArsenaultLegalizeDAG: Expand ctlz with ctlz_zero_undef if legal
2016-01-11 Matt ArsenaultAMDGPU: Remove dead target dag combine
2016-01-08 Tom StellardAMDGPU/SI: Emit global variable sizes when targeting HSA
2016-01-08 Tom StellardAMDGPU: Emit functions sizes
2016-01-07 Nicolai HaehnleAMDGPU/SI: Fold operands with sub-registers
2016-01-07 Nicolai HaehnleAMDGPU/SI: xnack_mask is always reserved on VI
2016-01-06 Nicolai HaehnleAMDGPU/SI: Fix crash when inline assembly is used in...
2016-01-05 Nicolai HaehnleAMDGPU/SI: Do not move scratch resource register on...
2016-01-05 Matt ArsenaultAMDGPU: Remove redundant let mayLoad = 1
2016-01-05 Tom StellardAMDGPU/SI: Select non-uniform constant addrspace loads...
2016-01-05 Tom StellardAMDGPU/SI: Consolidate FLAT patterns
2016-01-04 Nicolai HaehnleAMDGPU: add +xnack feature
2016-01-04 Tom StellardAMDGPU/SI: Move VI SMEM pattern back into VIInstructions.td
2016-01-04 Nicolai HaehnleAMDGPU: Avoid assertions after SGPR spilling failed
2015-12-25 Craig TopperRemove extra forward declarations and scrub includes...
2015-12-24 Matt ArsenaultAMDGPU: Fix getRegisterBitWidth for vectors
2015-12-24 Tom StellardAMDGPU/SI: Fix encoding of flat instructions on VI
2015-12-24 Tom StellardAMDGPU/SI: Remove non-existent flat instructions
2015-12-22 Changpeng Fang AMDGPU/SI: Use flat for global load/store when targeti...
2015-12-22 Rafael EspindolaRevert "AMDGPU/SI: Use flat for global load/store when...
2015-12-22 Changpeng FangAMDGPU/SI: Use flat for global load/store when targetin...
2015-12-21 Tom StellardAMDGPU/SI: Fix encoding for FLAT_SCRATCH registers...
2015-12-21 Tom StellardAMDGPU/SI: Change assembly name for flat scratch regist...
2015-12-19 Tom StellardAMDGPU/SI: Fix implemenation of isSourceOfDivergence...
2015-12-19 Matt ArsenaultAMDGPU: Switch barrier intrinsics to using convergent
2015-12-19 Nicolai HaehnleAMDGPU/SI: use S_MOV_B64 for larger copies in copyPhysReg
2015-12-19 Nicolai HaehnleAMDGPU: fix overlapping copies in copyPhysReg
2015-12-18 Changpeng FangAMDGPU/SI: Test commit
2015-12-18 Changpeng FangRevert "AMDGPU/SI: Test commit"
2015-12-18 Changpeng FangAMDGPU/SI: Test commit
2015-12-17 Tom StellardAMDGPU/SI: Reserve appropriate number of sgprs for...
2015-12-17 Nicolai HaehnleAMDGPU: Fix off-by-one in SIRegisterInfo::eliminateFram...
2015-12-16 Matt ArsenaultAMDGPU: Override getCFInstrCost
2015-12-15 Tom StellardAMDGPU/SI: Set the code object work group segment size...
2015-12-15 Tom StellardAMDGPU/SI: Set the code objects private segment size...
2015-12-15 Tom StellardAMDGPU/SI: Emit constant variables in the .hsatext...
2015-12-15 Tom StellardAMDGPU/SI: Select constant loads with non-uniform addre...
2015-12-15 Tom StellardAMDGPU/SI: Implement AMDGPUTargetTransformInfo::isSourc...
2015-12-15 Tom StellardAMDGPU/SI: Fix bitcast between v2f32 and f64
2015-12-15 Tom StellardAMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsics
2015-12-15 Tom StellardAMDGPU/SI: Add llvm.amdgcn.v.interp.p[12] intrinsics
2015-12-15 Tom StellardAMDGPU/SI: Add getShaderType() function to Utils/
2015-12-14 Krzysztof Parzyszek[Packetizer] Add AliasAnalysis as a parameter to the...
2015-12-14 Krzysztof ParzyszekAdd "const" to function arguments in DFAPacketizer
2015-12-14 Matt ArsenaultAMDGPU: Use generic bitreverse intrinsic
2015-12-14 Matt ArsenaultAMDGPU: Fix splitting vector loads with existing offsets
2015-12-13 Cong HouNormalize MBB's successors' probabilities in several...
2015-12-11 Matt ArsenaultStart replacing vector_extract/vector_insert with extra...
2015-12-10 Tom StellardAMDGPU/SI: Fix warning introduced by r255204
2015-12-10 Tom StellardAMDGPU/SI: Emit constant arrays in the .text section
2015-12-10 Tom StellardAMDGPU/SI: Add support for sgpr and vgpr inline assembl...
2015-12-03 Tom StellardAMDGPU/SI: Emit constant arrays in the .hsrodata_readon...
2015-12-02 Tom StellardAMDGPU/SI: Correctly emit agent global segment variable...
2015-12-02 Tom StellardAMDGPU: Fix msan test failure
2015-12-02 Tom StellardAMDGPU/SI: Don't emit group segment global variables
2015-12-01 Matt ArsenaultAMDGPU: Error on addrspacecasts that aren't actually...
2015-12-01 Matt ArsenaultAMDGPU: Implement isNoopAddrSpaceCast
2015-12-01 Matt ArsenaultAMDGPU: Disallow flat_scr in SI assembler
2015-12-01 Matt ArsenaultAMDGPU: Optimize VOP2 operand legalization
2015-12-01 Matt ArsenaultAMDGPU: Report extractelement as free in cost model
2015-12-01 Tom StellardAMDGPU/SI: Remove REGISTER_STORE/REGISTER_LOAD code...
2015-12-01 Tom StellardAMDGPU: Use the default strings for data emission direc...
2015-12-01 Cong HouReplace all weight-based interfaces in MBB with probabi...
2015-12-01 Hans WennborgRevert r254348: "Replace all weight-based interfaces...
2015-12-01 Matt ArsenaultSquelch unused variable warning in SIRegisterInfo.cpp.
2015-12-01 Cong HouReplace all weight-based interfaces in MBB with probabi...
2015-11-30 Matt ArsenaultAMDGPU: Fix unused function
2015-11-30 Matt ArsenaultAMDGPU: Error if too many user SGPRs used
2015-11-30 Matt ArsenaultAMDGPU: Rework how private buffer passed for HSA
2015-11-30 Matt ArsenaultAMDGPU: Rename enums to be consistent with HSA code...
2015-11-30 Matt ArsenaultAMDGPU: Remove SIPrepareScratchRegs
2015-11-30 Matt ArsenaultAMDGPU: Use assert zext for workgroup sizes
2015-11-30 Matt ArsenaultAMDGPU: Don't reserve SCRATCH_PTR input register
2015-11-26 Tom StellardAMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic
2015-11-25 Marek OlsakAMDGPU/SI: select S_ABS_I32 when possible (v2)
2015-11-25 Matt ArsenaultAMDGPU: Check feature attributes in SIMachineFunctionInfo
2015-11-25 Matt ArsenaultAMDGPU: Make v2i64/v2f64 legal types.
2015-11-25 Artyom SkrobovExpose isXxxConstant() functions from SelectionDAGNodes...
2015-11-24 Matt ArsenaultAMDGPU: Split LDS vector loads
2015-11-24 Matt ArsenaultAMDGPU: Split x8 and x16 vector loads instead of scalarize
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